Lines Matching +full:390 +full:khz
87 RATETAB_ENT(390, 18, IEEE80211_TX_RC_MCS),
487 /* Clock is in KHz */
491 case 0x32C8: /* 13000 KHz */ in cw1200_dpll_from_clk()
493 case 0x3E80: /* 16000 KHz */ in cw1200_dpll_from_clk()
495 case 0x41A0: /* 16800 KHz */ in cw1200_dpll_from_clk()
497 case 0x4B00: /* 19200 KHz */ in cw1200_dpll_from_clk()
499 case 0x5DC0: /* 24000 KHz */ in cw1200_dpll_from_clk()
501 case 0x6590: /* 26000 KHz */ in cw1200_dpll_from_clk()
503 case 0x8340: /* 33600 KHz */ in cw1200_dpll_from_clk()
505 case 0x9600: /* 38400 KHz */ in cw1200_dpll_from_clk()
507 case 0x9C40: /* 40000 KHz */ in cw1200_dpll_from_clk()
509 case 0xBB80: /* 48000 KHz */ in cw1200_dpll_from_clk()
511 case 0xCB20: /* 52000 KHz */ in cw1200_dpll_from_clk()
514 pr_err("Unknown Refclk freq (0x%04x), using 26000KHz\n", in cw1200_dpll_from_clk()