58 MODULE_PARM_DESC(cw1200_power_mode, "WSM power mode.  0 == active, 1 == doze, 2 == quiescent (defau…
69 	RATETAB_ENT(20,  1,   0),
120 	CHAN2G(1, 2412, 0),
165 			(1 << IEEE80211_HT_CAP_RX_STBC_SHIFT) |
167 		.ht_supported = 1,
185 			(1 << IEEE80211_HT_CAP_RX_STBC_SHIFT) |
187 		.ht_supported = 1,
199 	1 * HZ,	/* VO */
242 static int cw1200_ba_rx_tids = -1;
243 static int cw1200_ba_tx_tids = -1;
270 	priv->hw_type = -1;  in cw1200_init_common()
274 	if (cw1200_ba_rx_tids != -1)  in cw1200_init_common()
278 	if (cw1200_ba_tx_tids != -1)  in cw1200_init_common()
307 	priv->rts_threshold = -1;  in cw1200_init_common()
355 	sema_init(&priv->scan.lock, 1);  in cw1200_init_common()
399 				cw1200_queue_deinit(&priv->tx_queue[i - 1]);  in cw1200_init_common()
413 	priv->wsm_cmd.done = 1;  in cw1200_init_common()
487 /* Clock is in KHz */
491 	case 0x32C8: /* 13000 KHz */  in cw1200_dpll_from_clk()
493 	case 0x3E80: /* 16000 KHz */  in cw1200_dpll_from_clk()
495 	case 0x41A0: /* 16800 KHz */  in cw1200_dpll_from_clk()
497 	case 0x4B00: /* 19200 KHz */  in cw1200_dpll_from_clk()
499 	case 0x5DC0: /* 24000 KHz */  in cw1200_dpll_from_clk()
501 	case 0x6590: /* 26000 KHz */  in cw1200_dpll_from_clk()
503 	case 0x8340: /* 33600 KHz */  in cw1200_dpll_from_clk()
505 	case 0x9600: /* 38400 KHz */  in cw1200_dpll_from_clk()
507 	case 0x9C40: /* 40000 KHz */  in cw1200_dpll_from_clk()
509 	case 0xBB80: /* 48000 KHz */  in cw1200_dpll_from_clk()
511 	case 0xCB20: /* 52000 KHz */  in cw1200_dpll_from_clk()
514 		pr_err("Unknown Refclk freq (0x%04x), using 26000KHz\n",  in cw1200_dpll_from_clk()