Lines Matching +full:csi +full:- +full:no +full:- +full:ss
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
20 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy0_phy1_offset()
22 return phy->phy0_phy1_offset(rtwdev, addr); in rtw89_phy0_phy1_offset()
28 u32 bit_rate = report->bit_rate; in get_max_amsdu_len()
35 if (report->might_fallback_legacy) in get_max_amsdu_len()
38 /* lower than 20M vht 2ss mcs8, make it small */ in get_max_amsdu_len()
42 /* lower than 40M vht 2ss mcs9, make it medium */ in get_max_amsdu_len()
46 /* not yet 80M vht 2ss mcs8/9, make it twice regular packet size */ in get_max_amsdu_len()
50 return rtwdev->chip->max_amsdu_limit; in get_max_amsdu_len()
66 ra_mask |= GENMASK_ULL(highest_mcs - gap, 0) << nss; in get_mcs_ra_mask()
69 ra_mask |= GENMASK_ULL(highest_mcs - gap * 2, 0) << nss; in get_mcs_ra_mask()
81 struct ieee80211_sta_he_cap cap = link_sta->he_cap; in get_he_ra_mask()
84 switch (link_sta->bandwidth) { in get_he_ra_mask()
124 struct ieee80211_sta_eht_cap *eht_cap = &link_sta->eht_cap; in get_eht_ra_mask()
127 u8 *he_phy_cap = link_sta->he_cap.he_cap_elem.phy_cap_info; in get_eht_ra_mask()
129 switch (link_sta->bandwidth) { in get_eht_ra_mask()
131 mcs_nss = &eht_cap->eht_mcs_nss_supp.bw._320; in get_eht_ra_mask()
133 return get_eht_mcs_ra_mask(mcs_nss->rx_tx_max_nss, 9, 3); in get_eht_ra_mask()
135 mcs_nss = &eht_cap->eht_mcs_nss_supp.bw._160; in get_eht_ra_mask()
137 return get_eht_mcs_ra_mask(mcs_nss->rx_tx_max_nss, 9, 3); in get_eht_ra_mask()
141 mcs_nss_20mhz = &eht_cap->eht_mcs_nss_supp.only_20mhz; in get_eht_ra_mask()
143 return get_eht_mcs_ra_mask(mcs_nss_20mhz->rx_tx_max_nss, 7, 4); in get_eht_ra_mask()
148 mcs_nss = &eht_cap->eht_mcs_nss_supp.bw._80; in get_eht_ra_mask()
150 return get_eht_mcs_ra_mask(mcs_nss->rx_tx_max_nss, 9, 3); in get_eht_ra_mask()
204 struct cfg80211_bitrate_mask *mask = &rtwsta_link->mask; in rtw89_phy_ra_mask_cfg()
208 if (!rtwsta_link->use_cfg_mask) in rtw89_phy_ra_mask_cfg()
209 return -1; in rtw89_phy_ra_mask_cfg()
211 switch (chan->band_type) { in rtw89_phy_ra_mask_cfg()
214 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_2GHZ].legacy, in rtw89_phy_ra_mask_cfg()
219 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_5GHZ].legacy, in rtw89_phy_ra_mask_cfg()
224 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_6GHZ].legacy, in rtw89_phy_ra_mask_cfg()
228 rtw89_warn(rtwdev, "unhandled band type %d\n", chan->band_type); in rtw89_phy_ra_mask_cfg()
229 return -1; in rtw89_phy_ra_mask_cfg()
232 if (link_sta->he_cap.has_he) { in rtw89_phy_ra_mask_cfg()
233 cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[0], in rtw89_phy_ra_mask_cfg()
235 cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[1], in rtw89_phy_ra_mask_cfg()
237 } else if (link_sta->vht_cap.vht_supported) { in rtw89_phy_ra_mask_cfg()
238 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0], in rtw89_phy_ra_mask_cfg()
240 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1], in rtw89_phy_ra_mask_cfg()
242 } else if (link_sta->ht_cap.ht_supported) { in rtw89_phy_ra_mask_cfg()
243 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0], in rtw89_phy_ra_mask_cfg()
245 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1], in rtw89_phy_ra_mask_cfg()
274 struct cfg80211_bitrate_mask *mask = &rtwsta_link->mask; in rtw89_phy_ra_gi_ltf()
275 u8 band = chan->band_type; in rtw89_phy_ra_gi_ltf()
277 u8 he_ltf = mask->control[nl_band].he_ltf; in rtw89_phy_ra_gi_ltf()
278 u8 he_gi = mask->control[nl_band].he_gi; in rtw89_phy_ra_gi_ltf()
282 if (rtwdev->chip->chip_id == RTL8852C && in rtw89_phy_ra_gi_ltf()
283 chan->band_width == RTW89_CHANNEL_WIDTH_160 && in rtw89_phy_ra_gi_ltf()
289 if (!(rtwsta_link->use_cfg_mask && link_sta->he_cap.has_he)) in rtw89_phy_ra_gi_ltf()
311 bool p2p, bool csi) in rtw89_phy_ra_sta_update() argument
313 struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif_link->rate_pattern; in rtw89_phy_ra_sta_update()
314 struct rtw89_ra_info *ra = &rtwsta_link->ra; in rtw89_phy_ra_sta_update()
316 rtwvif_link->chanctx_idx); in rtw89_phy_ra_sta_update()
318 u8 rssi = ewma_rssi_read(&rtwsta_link->avg_rssi); in rtw89_phy_ra_sta_update()
333 if (link_sta->eht_cap.has_eht) { in rtw89_phy_ra_sta_update()
337 if (rtwdev->hal.no_mcs_12_13) in rtw89_phy_ra_sta_update()
344 } else if (link_sta->he_cap.has_he) { in rtw89_phy_ra_sta_update()
349 if (link_sta->he_cap.he_cap_elem.phy_cap_info[2] & in rtw89_phy_ra_sta_update()
352 if (link_sta->he_cap.he_cap_elem.phy_cap_info[1] & in rtw89_phy_ra_sta_update()
357 } else if (link_sta->vht_cap.vht_supported) { in rtw89_phy_ra_sta_update()
358 u16 mcs_map = le16_to_cpu(link_sta->vht_cap.vht_mcs.rx_mcs_map); in rtw89_phy_ra_sta_update()
362 /* MCS9 (non-20MHz), MCS8, MCS7 */ in rtw89_phy_ra_sta_update()
363 if (link_sta->bandwidth == IEEE80211_STA_RX_BW_20) in rtw89_phy_ra_sta_update()
368 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) in rtw89_phy_ra_sta_update()
370 if (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) in rtw89_phy_ra_sta_update()
372 } else if (link_sta->ht_cap.ht_supported) { in rtw89_phy_ra_sta_update()
375 ra_mask |= ((u64)link_sta->ht_cap.mcs.rx_mask[3] << 48) | in rtw89_phy_ra_sta_update()
376 ((u64)link_sta->ht_cap.mcs.rx_mask[2] << 36) | in rtw89_phy_ra_sta_update()
377 ((u64)link_sta->ht_cap.mcs.rx_mask[1] << 24) | in rtw89_phy_ra_sta_update()
378 ((u64)link_sta->ht_cap.mcs.rx_mask[0] << 12); in rtw89_phy_ra_sta_update()
380 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC) in rtw89_phy_ra_sta_update()
382 if (link_sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING) in rtw89_phy_ra_sta_update()
386 switch (chan->band_type) { in rtw89_phy_ra_sta_update()
388 ra_mask |= link_sta->supp_rates[NL80211_BAND_2GHZ]; in rtw89_phy_ra_sta_update()
389 if (link_sta->supp_rates[NL80211_BAND_2GHZ] & 0xf) in rtw89_phy_ra_sta_update()
391 if (link_sta->supp_rates[NL80211_BAND_2GHZ] & 0xff0) in rtw89_phy_ra_sta_update()
395 ra_mask |= (u64)link_sta->supp_rates[NL80211_BAND_5GHZ] << 4; in rtw89_phy_ra_sta_update()
399 ra_mask |= (u64)link_sta->supp_rates[NL80211_BAND_6GHZ] << 4; in rtw89_phy_ra_sta_update()
411 for (i = 0; i < rtwdev->hal.tx_nss; i++) in rtw89_phy_ra_sta_update()
428 switch (link_sta->bandwidth) { in rtw89_phy_ra_sta_update()
431 sgi = link_sta->vht_cap.vht_supported && in rtw89_phy_ra_sta_update()
432 (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160); in rtw89_phy_ra_sta_update()
436 sgi = link_sta->vht_cap.vht_supported && in rtw89_phy_ra_sta_update()
437 (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80); in rtw89_phy_ra_sta_update()
441 sgi = link_sta->ht_cap.ht_supported && in rtw89_phy_ra_sta_update()
442 (link_sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40); in rtw89_phy_ra_sta_update()
446 sgi = link_sta->ht_cap.ht_supported && in rtw89_phy_ra_sta_update()
447 (link_sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20); in rtw89_phy_ra_sta_update()
451 if (link_sta->he_cap.he_cap_elem.phy_cap_info[3] & in rtw89_phy_ra_sta_update()
453 ra->dcm_cap = 1; in rtw89_phy_ra_sta_update()
455 if (rate_pattern->enable && !p2p) { in rtw89_phy_ra_sta_update()
457 ra_mask &= rate_pattern->ra_mask; in rtw89_phy_ra_sta_update()
458 mode = rate_pattern->ra_mode; in rtw89_phy_ra_sta_update()
461 ra->bw_cap = bw_mode; in rtw89_phy_ra_sta_update()
462 ra->er_cap = rtwsta_link->er_cap; in rtw89_phy_ra_sta_update()
463 ra->mode_ctrl = mode; in rtw89_phy_ra_sta_update()
464 ra->macid = rtwsta_link->mac_id; in rtw89_phy_ra_sta_update()
465 ra->stbc_cap = stbc_en; in rtw89_phy_ra_sta_update()
466 ra->ldpc_cap = ldpc_en; in rtw89_phy_ra_sta_update()
467 ra->ss_num = min(link_sta->rx_nss, rtwdev->hal.tx_nss) - 1; in rtw89_phy_ra_sta_update()
468 ra->en_sgi = sgi; in rtw89_phy_ra_sta_update()
469 ra->ra_mask = ra_mask; in rtw89_phy_ra_sta_update()
470 ra->fix_giltf_en = fix_giltf_en; in rtw89_phy_ra_sta_update()
471 ra->fix_giltf = fix_giltf; in rtw89_phy_ra_sta_update()
473 if (!csi) in rtw89_phy_ra_sta_update()
476 ra->fixed_csi_rate_en = false; in rtw89_phy_ra_sta_update()
477 ra->ra_csi_rate_en = true; in rtw89_phy_ra_sta_update()
478 ra->cr_tbl_sel = false; in rtw89_phy_ra_sta_update()
479 ra->band_num = rtwvif_link->phy_idx; in rtw89_phy_ra_sta_update()
480 ra->csi_bw = bw_mode; in rtw89_phy_ra_sta_update()
481 ra->csi_gi_ltf = RTW89_GILTF_LGI_4XHE32; in rtw89_phy_ra_sta_update()
482 ra->csi_mcs_ss_idx = 5; in rtw89_phy_ra_sta_update()
483 ra->csi_mode = csi_mode; in rtw89_phy_ra_sta_update()
490 struct rtw89_vif_link *rtwvif_link = rtwsta_link->rtwvif_link; in rtw89_phy_ra_update_sta_link()
492 struct rtw89_ra_info *ra = &rtwsta_link->ra; in rtw89_phy_ra_update_sta_link()
499 link_sta, vif->p2p, false); in rtw89_phy_ra_update_sta_link()
504 ra->upd_mask = 1; in rtw89_phy_ra_update_sta_link()
506 ra->upd_bw_nss_mask = 1; in rtw89_phy_ra_update_sta_link()
510 ra->macid, in rtw89_phy_ra_update_sta_link()
511 ra->bw_cap, in rtw89_phy_ra_update_sta_link()
512 ra->ss_num, in rtw89_phy_ra_update_sta_link()
513 ra->en_sgi, in rtw89_phy_ra_update_sta_link()
514 ra->giltf); in rtw89_phy_ra_update_sta_link()
546 if (next->enable) in __check_rate_pattern()
550 next->rate = rate_base + c; in __check_rate_pattern()
551 next->ra_mode = ra_mode; in __check_rate_pattern()
552 next->ra_mask = ra_mask; in __check_rate_pattern()
553 next->enable = true; in __check_rate_pattern()
572 rtwvif_link->chanctx_idx); in __rtw89_phy_rate_pattern_vif()
591 u8 band = chan->band_type; in __rtw89_phy_rate_pattern_vif()
593 enum rtw89_chip_gen chip_gen = rtwdev->chip->chip_gen; in __rtw89_phy_rate_pattern_vif()
594 u8 tx_nss = rtwdev->hal.tx_nss; in __rtw89_phy_rate_pattern_vif()
600 mask->control[nl_band].he_mcs[i], in __rtw89_phy_rate_pattern_vif()
607 mask->control[nl_band].vht_mcs[i], in __rtw89_phy_rate_pattern_vif()
614 mask->control[nl_band].ht_mcs[i], in __rtw89_phy_rate_pattern_vif()
622 sband = rtwdev->hw->wiphy->bands[nl_band]; in __rtw89_phy_rate_pattern_vif()
627 mask->control[nl_band].legacy, in __rtw89_phy_rate_pattern_vif()
628 BIT(sband->n_bitrates) - 1, false)) in __rtw89_phy_rate_pattern_vif()
633 mask->control[nl_band].legacy, in __rtw89_phy_rate_pattern_vif()
634 BIT(sband->n_bitrates) - 1, false)) in __rtw89_phy_rate_pattern_vif()
641 rtwvif_link->rate_pattern = next_pattern; in __rtw89_phy_rate_pattern_vif()
650 rtwvif_link->rate_pattern.enable = false; in __rtw89_phy_rate_pattern_vif()
675 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_ra_update()
682 struct rtw89_vif_link *rtwvif_link = rtwsta_link->rtwvif_link; in rtw89_phy_ra_assoc()
684 struct rtw89_ra_info *ra = &rtwsta_link->ra; in rtw89_phy_ra_assoc()
685 u8 rssi = ewma_rssi_read(&rtwsta_link->avg_rssi) >> RSSI_FACTOR; in rtw89_phy_ra_assoc()
687 bool csi; in rtw89_phy_ra_assoc() local
692 csi = rtw89_sta_has_beamformer_cap(link_sta); in rtw89_phy_ra_assoc()
695 link_sta, vif->p2p, csi); in rtw89_phy_ra_assoc()
700 ra->init_rate_lv = 1; in rtw89_phy_ra_assoc()
702 ra->init_rate_lv = 2; in rtw89_phy_ra_assoc()
704 ra->init_rate_lv = 3; in rtw89_phy_ra_assoc()
706 ra->init_rate_lv = 0; in rtw89_phy_ra_assoc()
707 ra->upd_all = 1; in rtw89_phy_ra_assoc()
710 ra->macid, in rtw89_phy_ra_assoc()
711 ra->mode_ctrl, in rtw89_phy_ra_assoc()
712 ra->bw_cap, in rtw89_phy_ra_assoc()
713 ra->ss_num, in rtw89_phy_ra_assoc()
714 ra->init_rate_lv); in rtw89_phy_ra_assoc()
717 ra->dcm_cap, in rtw89_phy_ra_assoc()
718 ra->er_cap, in rtw89_phy_ra_assoc()
719 ra->ldpc_cap, in rtw89_phy_ra_assoc()
720 ra->stbc_cap, in rtw89_phy_ra_assoc()
721 ra->en_sgi, in rtw89_phy_ra_assoc()
722 ra->giltf); in rtw89_phy_ra_assoc()
724 rtw89_fw_h2c_ra(rtwdev, ra, csi); in rtw89_phy_ra_assoc()
731 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_get_txsc()
732 u8 pri_ch = chan->primary_channel; in rtw89_phy_get_txsc()
733 u8 central_ch = chan->channel; in rtw89_phy_get_txsc()
747 txsc_idx = (pri_ch - central_ch) >> 1; in rtw89_phy_get_txsc()
749 txsc_idx = ((central_ch - pri_ch) >> 1) + 1; in rtw89_phy_get_txsc()
756 tmp = (pri_ch - central_ch) >> 1; in rtw89_phy_get_txsc()
758 tmp = ((central_ch - pri_ch) >> 1) + 1; in rtw89_phy_get_txsc()
780 txsc_idx = (10 - (pri_ch - central_ch)) >> 1; in rtw89_phy_get_txsc()
782 txsc_idx = ((central_ch - pri_ch) >> 1) + 5; in rtw89_phy_get_txsc()
800 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_get_txsb()
801 u8 pri_ch = chan->primary_channel; in rtw89_phy_get_txsb()
802 u8 central_ch = chan->channel; in rtw89_phy_get_txsb()
814 txsb_idx = (pri_ch - central_ch + 6) / 4; in rtw89_phy_get_txsb()
820 txsb_idx = (pri_ch - central_ch + 14) / 4; in rtw89_phy_get_txsb()
822 txsb_idx = (pri_ch - central_ch + 12) / 8; in rtw89_phy_get_txsb()
828 txsb_idx = (pri_ch - central_ch + 30) / 4; in rtw89_phy_get_txsb()
830 txsb_idx = (pri_ch - central_ch + 28) / 8; in rtw89_phy_get_txsb()
832 txsb_idx = (pri_ch - central_ch + 24) / 16; in rtw89_phy_get_txsb()
853 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_read_rf()
854 const u32 *base_addr = chip->rf_base_addr; in rtw89_phy_read_rf()
857 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf()
910 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf_v1()
975 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_read_rf_v2()
990 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_write_rf()
991 const u32 *base_addr = chip->rf_base_addr; in rtw89_phy_write_rf()
994 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf()
1054 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf_v1()
1114 if (rf_path >= rtwdev->chip->rf_path_num) { in rtw89_phy_write_rf_v2()
1128 return rtwdev->chip->ops->write_rf == rtw89_phy_write_rf_v1; in rtw89_chip_rf_v1()
1134 const struct rtw89_chip_info *chip = rtwdev->chip; in __rtw89_phy_bb_reset()
1136 chip->ops->bb_reset(rtwdev, phy_idx); in __rtw89_phy_bb_reset()
1142 if (rtwdev->dbcc_en) in rtw89_phy_bb_reset()
1153 if (reg->addr == 0xfe) { in rtw89_phy_config_bb_reg()
1155 } else if (reg->addr == 0xfd) { in rtw89_phy_config_bb_reg()
1157 } else if (reg->addr == 0xfc) { in rtw89_phy_config_bb_reg()
1159 } else if (reg->addr == 0xfb) { in rtw89_phy_config_bb_reg()
1161 } else if (reg->addr == 0xfa) { in rtw89_phy_config_bb_reg()
1163 } else if (reg->addr == 0xf9) { in rtw89_phy_config_bb_reg()
1165 } else if (reg->data == BYPASS_CR_DATA) { in rtw89_phy_config_bb_reg()
1166 rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "Bypass CR 0x%x\n", reg->addr); in rtw89_phy_config_bb_reg()
1168 addr = reg->addr; in rtw89_phy_config_bb_reg()
1171 addr += rtw89_phy0_phy1_offset(rtwdev, reg->addr); in rtw89_phy_config_bb_reg()
1173 rtw89_phy_write32(rtwdev, addr, reg->data); in rtw89_phy_config_bb_reg()
1197 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_gain_error()
1206 gain->lna_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
1210 gain->lna_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
1214 gain->tia_gain[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_error()
1236 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_rpl_ofst()
1247 gain->rpl_ofst_20[gband][path] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1251 gain->rpl_ofst_40[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1256 gain->rpl_ofst_40[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1262 gain->rpl_ofst_80[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1267 gain->rpl_ofst_80[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1273 gain->rpl_ofst_80[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1279 gain->rpl_ofst_160[gband][path][0] = (s8)data; in rtw89_phy_cfg_bb_rpl_ofst()
1284 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1290 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1296 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1302 gain->rpl_ofst_160[gband][path][rxsc] = ofst; in rtw89_phy_cfg_bb_rpl_ofst()
1318 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_gain_bypass()
1327 gain->lna_gain_bypass[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_bypass()
1331 gain->lna_gain_bypass[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_bypass()
1345 struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain.ax; in rtw89_phy_cfg_bb_gain_op1db()
1354 gain->lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1358 gain->lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1362 gain->tia_lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1366 gain->tia_lna_op1db[gband][path][i] = data & 0xff; in rtw89_phy_cfg_bb_gain_op1db()
1381 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_config_bb_gain_ax()
1382 union rtw89_phy_bb_gain_arg arg = { .addr = reg->addr }; in rtw89_phy_config_bb_gain_ax()
1383 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw89_phy_config_bb_gain_ax()
1388 if (arg.path >= chip->rf_path_num) in rtw89_phy_config_bb_gain_ax()
1398 rtw89_phy_cfg_bb_gain_error(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1401 rtw89_phy_cfg_bb_rpl_ofst(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1404 rtw89_phy_cfg_bb_gain_bypass(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1407 rtw89_phy_cfg_bb_gain_op1db(rtwdev, arg, reg->data); in rtw89_phy_config_bb_gain_ax()
1411 if (efuse->rfe_type < 50) in rtw89_phy_config_bb_gain_ax()
1417 arg.addr, reg->data, arg.cfg_type); in rtw89_phy_config_bb_gain_ax()
1428 u16 idx = info->curr_idx % RTW89_H2C_RF_PAGE_SIZE; in rtw89_phy_cofig_rf_reg_store()
1429 u8 page = info->curr_idx / RTW89_H2C_RF_PAGE_SIZE; in rtw89_phy_cofig_rf_reg_store()
1433 rf_path, info->curr_idx); in rtw89_phy_cofig_rf_reg_store()
1437 info->rtw89_phy_config_rf_h2c[page][idx] = in rtw89_phy_cofig_rf_reg_store()
1438 cpu_to_le32((reg->addr << 20) | reg->data); in rtw89_phy_cofig_rf_reg_store()
1439 info->curr_idx++; in rtw89_phy_cofig_rf_reg_store()
1445 u16 remain = info->curr_idx; in rtw89_phy_config_rf_reg_fw()
1454 ret = -EINVAL; in rtw89_phy_config_rf_reg_fw()
1458 for (i = 0; i < RTW89_H2C_RF_PAGE_NUM && remain; i++, remain -= len) { in rtw89_phy_config_rf_reg_fw()
1465 info->curr_idx = 0; in rtw89_phy_config_rf_reg_fw()
1475 u32 addr = reg->addr; in rtw89_phy_config_rf_reg_noio()
1493 if (reg->addr == 0xfe) { in rtw89_phy_config_rf_reg()
1495 } else if (reg->addr == 0xfd) { in rtw89_phy_config_rf_reg()
1497 } else if (reg->addr == 0xfc) { in rtw89_phy_config_rf_reg()
1499 } else if (reg->addr == 0xfb) { in rtw89_phy_config_rf_reg()
1501 } else if (reg->addr == 0xfa) { in rtw89_phy_config_rf_reg()
1503 } else if (reg->addr == 0xf9) { in rtw89_phy_config_rf_reg()
1506 rtw89_write_rf(rtwdev, rf_path, reg->addr, 0xfffff, reg->data); in rtw89_phy_config_rf_reg()
1517 rtw89_write_rf(rtwdev, rf_path, reg->addr, RFREG_MASK, reg->data); in rtw89_phy_config_rf_reg_v1()
1519 if (reg->addr < 0x100) in rtw89_phy_config_rf_reg_v1()
1540 for (i = 0; i < table->n_regs; i++) { in rtw89_phy_sel_headline()
1541 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1542 headline = get_phy_headline(reg->addr); in rtw89_phy_sel_headline()
1553 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1554 target = get_phy_target(reg->addr); in rtw89_phy_sel_headline()
1564 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1565 target = get_phy_target(reg->addr); in rtw89_phy_sel_headline()
1574 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1575 rfe_para = get_phy_cond_rfe(reg->addr); in rtw89_phy_sel_headline()
1576 cv_para = get_phy_cond_cv(reg->addr); in rtw89_phy_sel_headline()
1591 reg = &table->regs[i]; in rtw89_phy_sel_headline()
1592 rfe_para = get_phy_cond_rfe(reg->addr); in rtw89_phy_sel_headline()
1593 cv_para = get_phy_cond_cv(reg->addr); in rtw89_phy_sel_headline()
1606 return -EINVAL; in rtw89_phy_sel_headline()
1618 enum rtw89_rf_path rf_path = table->rf_path; in rtw89_phy_init_reg()
1619 u8 rfe = rtwdev->efuse.rfe_type; in rtw89_phy_init_reg()
1620 u8 cv = rtwdev->hal.cv; in rtw89_phy_init_reg()
1636 cfg_target = get_phy_target(table->regs[headline_idx].addr); in rtw89_phy_init_reg()
1637 for (i = headline_size; i < table->n_regs; i++) { in rtw89_phy_init_reg()
1638 reg = &table->regs[i]; in rtw89_phy_init_reg()
1639 cond = get_phy_cond(reg->addr); in rtw89_phy_init_reg()
1643 target = get_phy_target(reg->addr); in rtw89_phy_init_reg()
1649 reg->addr, reg->data); in rtw89_phy_init_reg()
1681 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_bb_reg()
1682 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_bb_reg()
1686 bb_table = elm_info->bb_tbl ? elm_info->bb_tbl : chip->bb_table; in rtw89_phy_init_bb_reg()
1688 if (rtwdev->dbcc_en) in rtw89_phy_init_bb_reg()
1694 bb_gain_table = elm_info->bb_gain ? elm_info->bb_gain : chip->bb_gain_table; in rtw89_phy_init_bb_reg()
1697 chip->phy_def->config_bb_gain, NULL); in rtw89_phy_init_bb_reg()
1713 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_rf_reg()
1714 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_rf_reg()
1723 for (path = RF_PATH_A; path < chip->rf_path_num; path++) { in rtw89_phy_init_rf_reg()
1724 rf_table = elm_info->rf_radio[path] ? in rtw89_phy_init_rf_reg()
1725 elm_info->rf_radio[path] : chip->rf_table[path]; in rtw89_phy_init_rf_reg()
1726 rf_reg_info->rf_path = rf_table->rf_path; in rtw89_phy_init_rf_reg()
1730 config = rf_table->config ? rf_table->config : in rtw89_phy_init_rf_reg()
1735 rf_reg_info->rf_path); in rtw89_phy_init_rf_reg()
1742 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_preinit_rf_nctl_ax()
1750 if (chip->chip_id != RTL8851B) in rtw89_phy_preinit_rf_nctl_ax()
1752 if (chip->chip_id == RTL8852B || chip->chip_id == RTL8852BT) in rtw89_phy_preinit_rf_nctl_ax()
1766 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_init_rf_nctl()
1767 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_init_rf_nctl()
1772 nctl_table = elm_info->rf_nctl ? elm_info->rf_nctl : chip->nctl_table; in rtw89_phy_init_rf_nctl()
1775 if (chip->nctl_post_table) in rtw89_phy_init_rf_nctl()
1776 rtw89_rfk_parser(rtwdev, chip->nctl_post_table); in rtw89_phy_init_rf_nctl()
1813 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_write32_idx()
1822 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_write32_idx_set()
1831 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_write32_idx_clr()
1840 if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) in rtw89_phy_read32_idx()
1851 if (!rtwdev->dbcc_en) in rtw89_phy_set_phy_regs()
1864 for (i = 0; i < tbl->size; i++) { in rtw89_phy_write_reg3_tbl()
1865 reg3 = &tbl->reg3[i]; in rtw89_phy_write_reg3_tbl()
1866 rtw89_phy_write32_mask(rtwdev, reg3->addr, reg3->mask, reg3->data); in rtw89_phy_write_reg3_tbl()
1885 #define RTW89_ANT_GAIN_2GHZ_MIN -8
1887 #define RTW89_ANT_GAIN_5GHZ_MIN -8
1889 #define RTW89_ANT_GAIN_6GHZ_MIN -8
1898 struct rtw89_ant_gain_info *ant_gain = &rtwdev->ant_gain; in rtw89_phy_ant_gain_init()
1899 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ant_gain_init()
1907 if (!chip->support_ant_gain) in rtw89_phy_ant_gain_init()
1932 ant_gain->regd_enabled |= BIT(regd); in rtw89_phy_ant_gain_init()
1941 val = RTW89_ANT_GAIN_REF_2GHZ - in rtw89_phy_ant_gain_init()
1950 val = RTW89_ANT_GAIN_REF_5GHZ - in rtw89_phy_ant_gain_init()
1961 val = RTW89_ANT_GAIN_REF_6GHZ - in rtw89_phy_ant_gain_init()
1966 ant_gain->offset[i][j] = val; in rtw89_phy_ant_gain_init()
2015 struct rtw89_ant_gain_info *ant_gain = &rtwdev->ant_gain; in rtw89_phy_ant_gain_query()
2022 subband_l = span->ant_gain_subband_low; in rtw89_phy_ant_gain_query()
2023 subband_h = span->ant_gain_subband_high; in rtw89_phy_ant_gain_query()
2033 return min(ant_gain->offset[path][subband_l], in rtw89_phy_ant_gain_query()
2034 ant_gain->offset[path][subband_h]); in rtw89_phy_ant_gain_query()
2039 struct rtw89_ant_gain_info *ant_gain = &rtwdev->ant_gain; in rtw89_phy_ant_gain_offset()
2040 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ant_gain_offset()
2044 if (!chip->support_ant_gain) in rtw89_phy_ant_gain_offset()
2047 if (!(ant_gain->regd_enabled & BIT(regd))) in rtw89_phy_ant_gain_offset()
2059 struct rtw89_ant_gain_info *ant_gain = &rtwdev->ant_gain; in rtw89_phy_ant_gain_pwr_offset()
2060 u8 regd = rtw89_regd_get(rtwdev, chan->band_type); in rtw89_phy_ant_gain_pwr_offset()
2063 if (!(ant_gain->regd_enabled & BIT(regd))) in rtw89_phy_ant_gain_pwr_offset()
2066 offset_patha = rtw89_phy_ant_gain_query(rtwdev, RF_PATH_A, chan->freq); in rtw89_phy_ant_gain_pwr_offset()
2067 offset_pathb = rtw89_phy_ant_gain_query(rtwdev, RF_PATH_B, chan->freq); in rtw89_phy_ant_gain_pwr_offset()
2069 return rtw89_phy_txpwr_rf_to_bb(rtwdev, offset_patha - offset_pathb); in rtw89_phy_ant_gain_pwr_offset()
2076 struct rtw89_ant_gain_info *ant_gain = &rtwdev->ant_gain; in rtw89_print_ant_gain()
2077 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_print_ant_gain()
2078 u8 regd = rtw89_regd_get(rtwdev, chan->band_type); in rtw89_print_ant_gain()
2081 if (!chip->support_ant_gain || !(ant_gain->regd_enabled & BIT(regd))) { in rtw89_print_ant_gain()
2082 seq_puts(m, "no DAG is applied\n"); in rtw89_print_ant_gain()
2086 offset_patha = rtw89_phy_ant_gain_query(rtwdev, RF_PATH_A, chan->freq); in rtw89_print_ant_gain()
2087 offset_pathb = rtw89_phy_ant_gain_query(rtwdev, RF_PATH_B, chan->freq); in rtw89_print_ant_gain()
2113 switch (desc->rs) { in rtw89_phy_raw_byr_seek()
2115 return &head->cck[desc->idx]; in rtw89_phy_raw_byr_seek()
2117 return &head->ofdm[desc->idx]; in rtw89_phy_raw_byr_seek()
2119 return &head->mcs[desc->ofdma][desc->nss][desc->idx]; in rtw89_phy_raw_byr_seek()
2121 return &head->hedcm[desc->ofdma][desc->nss][desc->idx]; in rtw89_phy_raw_byr_seek()
2123 return &head->offset[desc->idx]; in rtw89_phy_raw_byr_seek()
2125 rtw89_warn(rtwdev, "unrecognized byr rs: %d\n", desc->rs); in rtw89_phy_raw_byr_seek()
2126 return &head->trap; in rtw89_phy_raw_byr_seek()
2133 const struct rtw89_txpwr_byrate_cfg *cfg = tbl->data; in rtw89_phy_load_txpwr_byrate()
2134 const struct rtw89_txpwr_byrate_cfg *end = cfg + tbl->size; in rtw89_phy_load_txpwr_byrate()
2142 byr_head = &rtwdev->byr[cfg->band][0]; in rtw89_phy_load_txpwr_byrate()
2143 desc.rs = cfg->rs; in rtw89_phy_load_txpwr_byrate()
2144 desc.nss = cfg->nss; in rtw89_phy_load_txpwr_byrate()
2145 data = cfg->data; in rtw89_phy_load_txpwr_byrate()
2147 for (i = 0; i < cfg->len; i++, data >>= 8) { in rtw89_phy_load_txpwr_byrate()
2148 desc.idx = cfg->shf + i; in rtw89_phy_load_txpwr_byrate()
2162 dbm -= tssi_max_deviation; in rtw89_phy_txpwr_dbm_without_tolerance()
2169 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_get_tpe_constraint()
2170 const struct rtw89_reg_6ghz_tpe *tpe = ®ulatory->reg_6ghz_tpe; in rtw89_phy_get_tpe_constraint()
2173 if (band == RTW89_BAND_6G && tpe->valid) in rtw89_phy_get_tpe_constraint()
2174 cstr = rtw89_phy_txpwr_dbm_without_tolerance(tpe->constraint); in rtw89_phy_get_tpe_constraint()
2185 if (rate_desc->rs == RTW89_RS_CCK) in rtw89_phy_read_txpwr_byrate()
2188 byr_head = &rtwdev->byr[band][bw]; in rtw89_phy_read_txpwr_byrate()
2198 return (channel_6g - 1) / 2; in rtw89_channel_6g_to_idx()
2200 return (channel_6g - 3) / 2; in rtw89_channel_6g_to_idx()
2202 return (channel_6g - 5) / 2; in rtw89_channel_6g_to_idx()
2204 return (channel_6g - 7) / 2; in rtw89_channel_6g_to_idx()
2206 return (channel_6g - 9) / 2; in rtw89_channel_6g_to_idx()
2208 return (channel_6g - 11) / 2; in rtw89_channel_6g_to_idx()
2210 return (channel_6g - 13) / 2; in rtw89_channel_6g_to_idx()
2212 return (channel_6g - 15) / 2; in rtw89_channel_6g_to_idx()
2226 return channel - 1; in rtw89_channel_to_idx()
2228 return (channel - 36) / 2; in rtw89_channel_to_idx()
2230 return ((channel - 100) / 2) + 15; in rtw89_channel_to_idx()
2232 return ((channel - 149) / 2) + 38; in rtw89_channel_to_idx()
2242 const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; in rtw89_phy_read_txpwr_limit()
2243 const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; in rtw89_phy_read_txpwr_limit()
2244 const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; in rtw89_phy_read_txpwr_limit()
2245 const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; in rtw89_phy_read_txpwr_limit()
2246 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_read_txpwr_limit()
2251 u8 reg6 = regulatory->reg_6ghz_power; in rtw89_phy_read_txpwr_limit()
2257 lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; in rtw89_phy_read_txpwr_limit()
2261 lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit()
2264 lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; in rtw89_phy_read_txpwr_limit()
2268 lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit()
2271 lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][regd][reg6][ch_idx]; in rtw89_phy_read_txpwr_limit()
2275 lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][RTW89_WW] in rtw89_phy_read_txpwr_limit()
2308 __fill_txpwr_limit_nonbf_bf(lmt->cck_20m, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_20m_ax()
2310 __fill_txpwr_limit_nonbf_bf(lmt->cck_40m, band, RTW89_CHANNEL_WIDTH_40, in rtw89_phy_fill_txpwr_limit_20m_ax()
2312 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_20m_ax()
2314 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_20m_ax()
2323 __fill_txpwr_limit_nonbf_bf(lmt->cck_20m, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_40m_ax()
2324 ntx, RTW89_RS_CCK, ch - 2); in rtw89_phy_fill_txpwr_limit_40m_ax()
2325 __fill_txpwr_limit_nonbf_bf(lmt->cck_40m, band, RTW89_CHANNEL_WIDTH_40, in rtw89_phy_fill_txpwr_limit_40m_ax()
2327 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_40m_ax()
2329 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_40m_ax()
2331 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_40m_ax()
2332 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_40m_ax()
2335 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_40m_ax()
2348 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_80m_ax()
2350 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2352 ntx, RTW89_RS_MCS, ch - 6); in rtw89_phy_fill_txpwr_limit_80m_ax()
2353 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2355 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_80m_ax()
2356 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[2], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2359 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[3], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2362 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2364 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_80m_ax()
2365 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[1], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2368 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[0], band, in rtw89_phy_fill_txpwr_limit_80m_ax()
2373 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_80m_ax()
2378 lmt->mcs_40m_0p5[i] = min_t(s8, val_0p5_n[i], val_0p5_p[i]); in rtw89_phy_fill_txpwr_limit_80m_ax()
2392 __fill_txpwr_limit_nonbf_bf(lmt->ofdm, band, RTW89_CHANNEL_WIDTH_20, in rtw89_phy_fill_txpwr_limit_160m_ax()
2396 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[0], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2398 ntx, RTW89_RS_MCS, ch - 14); in rtw89_phy_fill_txpwr_limit_160m_ax()
2399 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[1], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2401 ntx, RTW89_RS_MCS, ch - 10); in rtw89_phy_fill_txpwr_limit_160m_ax()
2402 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[2], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2404 ntx, RTW89_RS_MCS, ch - 6); in rtw89_phy_fill_txpwr_limit_160m_ax()
2405 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[3], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2407 ntx, RTW89_RS_MCS, ch - 2); in rtw89_phy_fill_txpwr_limit_160m_ax()
2408 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[4], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2411 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[5], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2414 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[6], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2417 __fill_txpwr_limit_nonbf_bf(lmt->mcs_20m[7], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2422 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[0], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2424 ntx, RTW89_RS_MCS, ch - 12); in rtw89_phy_fill_txpwr_limit_160m_ax()
2425 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[1], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2427 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_160m_ax()
2428 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[2], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2431 __fill_txpwr_limit_nonbf_bf(lmt->mcs_40m[3], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2436 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[0], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2438 ntx, RTW89_RS_MCS, ch - 8); in rtw89_phy_fill_txpwr_limit_160m_ax()
2439 __fill_txpwr_limit_nonbf_bf(lmt->mcs_80m[1], band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2444 __fill_txpwr_limit_nonbf_bf(lmt->mcs_160m, band, in rtw89_phy_fill_txpwr_limit_160m_ax()
2450 ntx, RTW89_RS_MCS, ch - 4); in rtw89_phy_fill_txpwr_limit_160m_ax()
2455 lmt->mcs_40m_0p5[i] = min_t(s8, val_0p5_n[i], val_0p5_p[i]); in rtw89_phy_fill_txpwr_limit_160m_ax()
2459 ntx, RTW89_RS_MCS, ch - 8); in rtw89_phy_fill_txpwr_limit_160m_ax()
2464 lmt->mcs_40m_2p5[i] = min_t(s8, val_2p5_n[i], val_2p5_p[i]); in rtw89_phy_fill_txpwr_limit_160m_ax()
2473 u8 band = chan->band_type; in rtw89_phy_fill_txpwr_limit_ax()
2474 u8 pri_ch = chan->primary_channel; in rtw89_phy_fill_txpwr_limit_ax()
2475 u8 ch = chan->channel; in rtw89_phy_fill_txpwr_limit_ax()
2476 u8 bw = chan->band_width; in rtw89_phy_fill_txpwr_limit_ax()
2502 const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; in rtw89_phy_read_txpwr_limit_ru()
2503 const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; in rtw89_phy_read_txpwr_limit_ru()
2504 const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; in rtw89_phy_read_txpwr_limit_ru()
2505 const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; in rtw89_phy_read_txpwr_limit_ru()
2506 struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; in rtw89_phy_read_txpwr_limit_ru()
2511 u8 reg6 = regulatory->reg_6ghz_power; in rtw89_phy_read_txpwr_limit_ru()
2517 lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][regd][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2521 lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2524 lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][regd][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2528 lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2531 lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][regd][reg6][ch_idx]; in rtw89_phy_read_txpwr_limit_ru()
2535 lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][RTW89_WW] in rtw89_phy_read_txpwr_limit_ru()
2557 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m_ax()
2560 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m_ax()
2563 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_20m_ax()
2573 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2575 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2576 lmt_ru->ru26[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2579 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2581 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2582 lmt_ru->ru52[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2585 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2587 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2588 lmt_ru->ru106[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_40m_ax()
2598 lmt_ru->ru26[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2600 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2601 lmt_ru->ru26[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2603 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2604 lmt_ru->ru26[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2607 lmt_ru->ru26[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2610 lmt_ru->ru52[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2612 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2613 lmt_ru->ru52[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2615 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2616 lmt_ru->ru52[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2619 lmt_ru->ru52[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2622 lmt_ru->ru106[0] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2624 ntx, ch - 6); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2625 lmt_ru->ru106[1] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2627 ntx, ch - 2); in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2628 lmt_ru->ru106[2] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2631 lmt_ru->ru106[3] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_80m_ax()
2641 static const int ofst[] = { -14, -10, -6, -2, 2, 6, 10, 14 }; in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2646 lmt_ru->ru26[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2650 lmt_ru->ru52[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2654 lmt_ru->ru106[i] = rtw89_phy_read_txpwr_limit_ru(rtwdev, band, in rtw89_phy_fill_txpwr_limit_ru_160m_ax()
2667 u8 band = chan->band_type; in rtw89_phy_fill_txpwr_limit_ru_ax()
2668 u8 ch = chan->channel; in rtw89_phy_fill_txpwr_limit_ru_ax()
2669 u8 bw = chan->band_width; in rtw89_phy_fill_txpwr_limit_ru_ax()
2697 u8 max_nss_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_byrate_ax()
2705 u8 band = chan->band_type; in rtw89_phy_set_txpwr_byrate_ax()
2706 u8 ch = chan->channel; in rtw89_phy_set_txpwr_byrate_ax()
2758 u8 band = chan->band_type; in rtw89_phy_set_txpwr_offset_ax()
2782 u8 max_ntx_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_limit_ax()
2784 u8 ch = chan->channel; in rtw89_phy_set_txpwr_limit_ax()
2785 u8 bw = chan->band_width; in rtw89_phy_set_txpwr_limit_ax()
2817 u8 max_ntx_num = rtwdev->chip->rf_path_num; in rtw89_phy_set_txpwr_limit_ru_ax()
2819 u8 ch = chan->channel; in rtw89_phy_set_txpwr_limit_ru_ax()
2820 u8 bw = chan->band_width; in rtw89_phy_set_txpwr_limit_ru_ax()
2857 struct rtw89_dev *rtwdev = ra_data->rtwdev; in __rtw89_phy_c2h_ra_rpt_iter()
2859 (const struct rtw89_c2h_ra_rpt *)ra_data->c2h->data; in __rtw89_phy_c2h_ra_rpt_iter()
2860 struct rtw89_ra_report *ra_report = &rtwsta_link->ra_report; in __rtw89_phy_c2h_ra_rpt_iter()
2861 const struct rtw89_chip_info *chip = rtwdev->chip; in __rtw89_phy_c2h_ra_rpt_iter()
2862 bool format_v1 = chip->chip_gen == RTW89_CHIP_BE; in __rtw89_phy_c2h_ra_rpt_iter()
2869 mac_id = le32_get_bits(c2h->w2, RTW89_C2H_RA_RPT_W2_MACID); in __rtw89_phy_c2h_ra_rpt_iter()
2870 if (mac_id != rtwsta_link->mac_id) in __rtw89_phy_c2h_ra_rpt_iter()
2873 rate = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MCSNSS); in __rtw89_phy_c2h_ra_rpt_iter()
2874 bw = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_BW); in __rtw89_phy_c2h_ra_rpt_iter()
2875 giltf = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_GILTF); in __rtw89_phy_c2h_ra_rpt_iter()
2876 mode = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MD_SEL); in __rtw89_phy_c2h_ra_rpt_iter()
2879 t = le32_get_bits(c2h->w2, RTW89_C2H_RA_RPT_W2_MCSNSS_B7); in __rtw89_phy_c2h_ra_rpt_iter()
2881 t = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_BW_B2); in __rtw89_phy_c2h_ra_rpt_iter()
2883 t = le32_get_bits(c2h->w3, RTW89_C2H_RA_RPT_W3_MD_SEL_B2); in __rtw89_phy_c2h_ra_rpt_iter()
2893 memset(&ra_report->txrate, 0, sizeof(ra_report->txrate)); in __rtw89_phy_c2h_ra_rpt_iter()
2897 ra_report->txrate.legacy = legacy_bitrate; in __rtw89_phy_c2h_ra_rpt_iter()
2900 ra_report->txrate.flags |= RATE_INFO_FLAGS_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
2901 if (RTW89_CHK_FW_FEATURE(OLD_HT_RA_FORMAT, &rtwdev->fw)) in __rtw89_phy_c2h_ra_rpt_iter()
2906 ra_report->txrate.mcs = rate; in __rtw89_phy_c2h_ra_rpt_iter()
2908 ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; in __rtw89_phy_c2h_ra_rpt_iter()
2909 mcs = ra_report->txrate.mcs & 0x07; in __rtw89_phy_c2h_ra_rpt_iter()
2912 ra_report->txrate.flags |= RATE_INFO_FLAGS_VHT_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
2913 ra_report->txrate.mcs = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2916 ra_report->txrate.nss = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2920 ra_report->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; in __rtw89_phy_c2h_ra_rpt_iter()
2921 mcs = ra_report->txrate.mcs; in __rtw89_phy_c2h_ra_rpt_iter()
2924 ra_report->txrate.flags |= RATE_INFO_FLAGS_HE_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
2925 ra_report->txrate.mcs = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2928 ra_report->txrate.nss = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2932 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_0_8; in __rtw89_phy_c2h_ra_rpt_iter()
2934 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_1_6; in __rtw89_phy_c2h_ra_rpt_iter()
2936 ra_report->txrate.he_gi = NL80211_RATE_INFO_HE_GI_3_2; in __rtw89_phy_c2h_ra_rpt_iter()
2937 mcs = ra_report->txrate.mcs; in __rtw89_phy_c2h_ra_rpt_iter()
2940 ra_report->txrate.flags |= RATE_INFO_FLAGS_EHT_MCS; in __rtw89_phy_c2h_ra_rpt_iter()
2941 ra_report->txrate.mcs = u8_get_bits(rate, RTW89_RA_RATE_MASK_MCS_V1); in __rtw89_phy_c2h_ra_rpt_iter()
2942 ra_report->txrate.nss = u8_get_bits(rate, RTW89_RA_RATE_MASK_NSS_V1) + 1; in __rtw89_phy_c2h_ra_rpt_iter()
2944 ra_report->txrate.eht_gi = NL80211_RATE_INFO_EHT_GI_0_8; in __rtw89_phy_c2h_ra_rpt_iter()
2946 ra_report->txrate.eht_gi = NL80211_RATE_INFO_EHT_GI_1_6; in __rtw89_phy_c2h_ra_rpt_iter()
2948 ra_report->txrate.eht_gi = NL80211_RATE_INFO_EHT_GI_3_2; in __rtw89_phy_c2h_ra_rpt_iter()
2949 mcs = ra_report->txrate.mcs; in __rtw89_phy_c2h_ra_rpt_iter()
2953 ra_report->txrate.bw = rtw89_hw_to_rate_info_bw(bw); in __rtw89_phy_c2h_ra_rpt_iter()
2954 ra_report->bit_rate = cfg80211_calculate_bitrate(&ra_report->txrate); in __rtw89_phy_c2h_ra_rpt_iter()
2955 ra_report->hw_rate = format_v1 ? in __rtw89_phy_c2h_ra_rpt_iter()
2960 ra_report->might_fallback_legacy = mcs <= 2; in __rtw89_phy_c2h_ra_rpt_iter()
2961 link_sta->agg.max_rc_amsdu_len = get_max_amsdu_len(rtwdev, ra_report); in __rtw89_phy_c2h_ra_rpt_iter()
2962 rtwsta_link->max_agg_wait = link_sta->agg.max_rc_amsdu_len / 1500 - 1; in __rtw89_phy_c2h_ra_rpt_iter()
2990 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_c2h_ra_rpt()
3022 "[IQK] iqk->is_iqk_init = %x\n", iqk->is_iqk_init); in rtw89_phy_c2h_rfk_rpt_log()
3024 "[IQK] iqk->is_reload = %x\n", iqk->is_reload); in rtw89_phy_c2h_rfk_rpt_log()
3026 "[IQK] iqk->is_nbiqk = %x\n", iqk->is_nbiqk); in rtw89_phy_c2h_rfk_rpt_log()
3028 "[IQK] iqk->txiqk_en = %x\n", iqk->txiqk_en); in rtw89_phy_c2h_rfk_rpt_log()
3030 "[IQK] iqk->rxiqk_en = %x\n", iqk->rxiqk_en); in rtw89_phy_c2h_rfk_rpt_log()
3032 "[IQK] iqk->lok_en = %x\n", iqk->lok_en); in rtw89_phy_c2h_rfk_rpt_log()
3034 "[IQK] iqk->iqk_xym_en = %x\n", iqk->iqk_xym_en); in rtw89_phy_c2h_rfk_rpt_log()
3036 "[IQK] iqk->iqk_sram_en = %x\n", iqk->iqk_sram_en); in rtw89_phy_c2h_rfk_rpt_log()
3038 "[IQK] iqk->iqk_fft_en = %x\n", iqk->iqk_fft_en); in rtw89_phy_c2h_rfk_rpt_log()
3040 "[IQK] iqk->is_fw_iqk = %x\n", iqk->is_fw_iqk); in rtw89_phy_c2h_rfk_rpt_log()
3042 "[IQK] iqk->is_iqk_enable = %x\n", iqk->is_iqk_enable); in rtw89_phy_c2h_rfk_rpt_log()
3044 "[IQK] iqk->iqk_cfir_en = %x\n", iqk->iqk_cfir_en); in rtw89_phy_c2h_rfk_rpt_log()
3046 "[IQK] iqk->thermal_rek_en = %x\n", iqk->thermal_rek_en); in rtw89_phy_c2h_rfk_rpt_log()
3048 "[IQK] iqk->version = %x\n", iqk->version); in rtw89_phy_c2h_rfk_rpt_log()
3050 "[IQK] iqk->phy = %x\n", iqk->phy); in rtw89_phy_c2h_rfk_rpt_log()
3052 "[IQK] iqk->fwk_status = %x\n", iqk->fwk_status); in rtw89_phy_c2h_rfk_rpt_log()
3057 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_band[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3058 i, iqk->iqk_band[i]); in rtw89_phy_c2h_rfk_rpt_log()
3059 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_ch[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3060 i, iqk->iqk_ch[i]); in rtw89_phy_c2h_rfk_rpt_log()
3061 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_bw[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3062 i, iqk->iqk_bw[i]); in rtw89_phy_c2h_rfk_rpt_log()
3063 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->lok_idac[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3064 i, le32_to_cpu(iqk->lok_idac[i])); in rtw89_phy_c2h_rfk_rpt_log()
3065 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->lok_vbuf[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3066 i, le32_to_cpu(iqk->lok_vbuf[i])); in rtw89_phy_c2h_rfk_rpt_log()
3067 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_tx_fail[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3068 i, iqk->iqk_tx_fail[i]); in rtw89_phy_c2h_rfk_rpt_log()
3069 rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] iqk->iqk_rx_fail[%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3070 i, iqk->iqk_rx_fail[i]); in rtw89_phy_c2h_rfk_rpt_log()
3073 "[IQK] iqk->rftxgain[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3074 i, j, le32_to_cpu(iqk->rftxgain[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
3077 "[IQK] iqk->tx_xym[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3078 i, j, le32_to_cpu(iqk->tx_xym[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
3081 "[IQK] iqk->rfrxgain[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3082 i, j, le32_to_cpu(iqk->rfrxgain[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
3085 "[IQK] iqk->rx_xym[%d][%d] = %x\n", in rtw89_phy_c2h_rfk_rpt_log()
3086 i, j, le32_to_cpu(iqk->rx_xym[i][j])); in rtw89_phy_c2h_rfk_rpt_log()
3096 dpk->ver, dpk->idx, dpk->band, dpk->bw, dpk->ch, dpk->path_ok); in rtw89_phy_c2h_rfk_rpt_log()
3099 dpk->txagc, dpk->ther, dpk->gs, dpk->dc_i, dpk->dc_q); in rtw89_phy_c2h_rfk_rpt_log()
3102 dpk->corr_val, dpk->corr_idx, dpk->is_timeout, dpk->rxbb_ov); in rtw89_phy_c2h_rfk_rpt_log()
3113 dack->fwdack_ver, dack->fwdack_info_ver, 0x2); in rtw89_phy_c2h_rfk_rpt_log()
3117 dack->addck_timeout, dack->cdack_timeout, dack->dadck_timeout, in rtw89_phy_c2h_rfk_rpt_log()
3118 dack->adgaink_timeout, dack->msbk_timeout); in rtw89_phy_c2h_rfk_rpt_log()
3120 "[DACK]DACK fail = 0x%x\n", dack->dack_fail); in rtw89_phy_c2h_rfk_rpt_log()
3122 "[DACK]S0 WBADCK = [0x%x]\n", dack->wbdck_d[0]); in rtw89_phy_c2h_rfk_rpt_log()
3124 "[DACK]S1 WBADCK = [0x%x]\n", dack->wbdck_d[1]); in rtw89_phy_c2h_rfk_rpt_log()
3126 "[DACK]DRCK = [0x%x]\n", dack->rck_d); in rtw89_phy_c2h_rfk_rpt_log()
3128 dack->cdack_d[0][0][0], dack->cdack_d[0][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3130 dack->cdack_d[0][1][0], dack->cdack_d[0][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3132 dack->cdack_d[1][0][0], dack->cdack_d[1][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3134 dack->cdack_d[1][1][0], dack->cdack_d[1][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3137 ((u32)dack->addck2_hd[0][0][0] << 8) | dack->addck2_ld[0][0][0], in rtw89_phy_c2h_rfk_rpt_log()
3138 ((u32)dack->addck2_hd[0][0][1] << 8) | dack->addck2_ld[0][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3140 ((u32)dack->addck2_hd[0][1][0] << 8) | dack->addck2_ld[0][1][0], in rtw89_phy_c2h_rfk_rpt_log()
3141 ((u32)dack->addck2_hd[0][1][1] << 8) | dack->addck2_ld[0][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3143 ((u32)dack->addck2_hd[1][0][0] << 8) | dack->addck2_ld[1][0][0], in rtw89_phy_c2h_rfk_rpt_log()
3144 ((u32)dack->addck2_hd[1][0][1] << 8) | dack->addck2_ld[1][0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3146 ((u32)dack->addck2_hd[1][1][0] << 8) | dack->addck2_ld[1][1][0], in rtw89_phy_c2h_rfk_rpt_log()
3147 ((u32)dack->addck2_hd[1][1][1] << 8) | dack->addck2_ld[1][1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3150 dack->adgaink_d[0][0], dack->adgaink_d[0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3152 dack->adgaink_d[1][0], dack->adgaink_d[1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3155 dack->dadck_d[0][0], dack->dadck_d[0][1]); in rtw89_phy_c2h_rfk_rpt_log()
3157 dack->dadck_d[1][0], dack->dadck_d[1][1]); in rtw89_phy_c2h_rfk_rpt_log()
3160 ((u32)dack->biask_hd[0][0] << 8) | dack->biask_ld[0][0]); in rtw89_phy_c2h_rfk_rpt_log()
3162 ((u32)dack->biask_hd[1][0] << 8) | dack->biask_ld[1][0]); in rtw89_phy_c2h_rfk_rpt_log()
3167 dack->msbk_d[0][0][i]); in rtw89_phy_c2h_rfk_rpt_log()
3172 dack->msbk_d[0][1][i]); in rtw89_phy_c2h_rfk_rpt_log()
3177 dack->msbk_d[1][0][i]); in rtw89_phy_c2h_rfk_rpt_log()
3182 dack->msbk_d[1][1][i]); in rtw89_phy_c2h_rfk_rpt_log()
3191 rxdck->ver, rxdck->band, rxdck->bw, rxdck->ch, in rtw89_phy_c2h_rfk_rpt_log()
3192 rxdck->timeout); in rtw89_phy_c2h_rfk_rpt_log()
3204 i, j, k, tssi->alignment_power_cw_h[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
3207 i, j, k, tssi->alignment_power_cw_l[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
3210 i, j, k, tssi->alignment_power[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
3214 (tssi->alignment_power_cw_h[i][j][k] << 8) + in rtw89_phy_c2h_rfk_rpt_log()
3215 tssi->alignment_power_cw_l[i][j][k]); in rtw89_phy_c2h_rfk_rpt_log()
3220 i, j, tssi->tssi_alimk_state[i][j]); in rtw89_phy_c2h_rfk_rpt_log()
3223 j, tssi->default_txagc_offset[0][j]); in rtw89_phy_c2h_rfk_rpt_log()
3234 le32_to_cpu(txgapk->r0x8010[0]), in rtw89_phy_c2h_rfk_rpt_log()
3235 le32_to_cpu(txgapk->r0x8010[1])); in rtw89_phy_c2h_rfk_rpt_log()
3237 txgapk->chk_id); in rtw89_phy_c2h_rfk_rpt_log()
3239 le32_to_cpu(txgapk->chk_cnt)); in rtw89_phy_c2h_rfk_rpt_log()
3241 txgapk->ver); in rtw89_phy_c2h_rfk_rpt_log()
3243 txgapk->rsv1); in rtw89_phy_c2h_rfk_rpt_log()
3246 (int)sizeof(txgapk->track_d[0]), txgapk->track_d[0]); in rtw89_phy_c2h_rfk_rpt_log()
3248 (int)sizeof(txgapk->power_d[0]), txgapk->power_d[0]); in rtw89_phy_c2h_rfk_rpt_log()
3250 (int)sizeof(txgapk->track_d[1]), txgapk->track_d[1]); in rtw89_phy_c2h_rfk_rpt_log()
3252 (int)sizeof(txgapk->power_d[1]), txgapk->power_d[1]); in rtw89_phy_c2h_rfk_rpt_log()
3267 struct rtw89_fw_elm_info *elm_info = &rtwdev->fw.elm_info; in rtw89_phy_c2h_rfk_run_log()
3276 if (!elm_info->rfk_log_fmt) in rtw89_phy_c2h_rfk_run_log()
3279 elm = elm_info->rfk_log_fmt->elm[func]; in rtw89_phy_c2h_rfk_run_log()
3280 fmt_idx = le32_to_cpu(log->fmt_idx); in rtw89_phy_c2h_rfk_run_log()
3281 if (!elm || fmt_idx >= elm->u.rfk_log_fmt.nr) in rtw89_phy_c2h_rfk_run_log()
3284 offset = le16_to_cpu(elm->u.rfk_log_fmt.offset[fmt_idx]); in rtw89_phy_c2h_rfk_run_log()
3288 rtw89_debug(rtwdev, RTW89_DBG_RFK, &elm->u.common.contents[offset], in rtw89_phy_c2h_rfk_run_log()
3289 le32_to_cpu(log->arg[0]), le32_to_cpu(log->arg[1]), in rtw89_phy_c2h_rfk_run_log()
3290 le32_to_cpu(log->arg[2]), le32_to_cpu(log->arg[3])); in rtw89_phy_c2h_rfk_run_log()
3299 struct rtw89_c2h_hdr *c2h_hdr = (struct rtw89_c2h_hdr *)c2h->data; in rtw89_phy_c2h_rfk_log()
3310 len -= sizeof(*c2h_hdr); in rtw89_phy_c2h_rfk_log()
3314 content_len = le16_to_cpu(log_hdr->len); in rtw89_phy_c2h_rfk_log()
3320 switch (log_hdr->type) { in rtw89_phy_c2h_rfk_log()
3323 log_hdr->content, content_len); in rtw89_phy_c2h_rfk_log()
3328 rfk_name, content_len, log_hdr->content); in rtw89_phy_c2h_rfk_log()
3332 log_hdr->content, content_len); in rtw89_phy_c2h_rfk_log()
3339 len -= chunk_len; in rtw89_phy_c2h_rfk_log()
3399 struct rtw89_rfk_wait_info *wait = &rtwdev->rfk_wait; in rtw89_phy_rfk_report_prep()
3401 wait->state = RTW89_RFK_STATE_START; in rtw89_phy_rfk_report_prep()
3402 wait->start_time = ktime_get(); in rtw89_phy_rfk_report_prep()
3403 reinit_completion(&wait->completion); in rtw89_phy_rfk_report_prep()
3410 struct rtw89_rfk_wait_info *wait = &rtwdev->rfk_wait; in rtw89_phy_rfk_report_wait()
3414 if (test_bit(RTW89_FLAG_SER_HANDLING, rtwdev->flags)) { in rtw89_phy_rfk_report_wait()
3419 time_left = wait_for_completion_timeout(&wait->completion, in rtw89_phy_rfk_report_wait()
3423 return -ETIMEDOUT; in rtw89_phy_rfk_report_wait()
3424 } else if (wait->state != RTW89_RFK_STATE_OK) { in rtw89_phy_rfk_report_wait()
3426 rfk_name, wait->state); in rtw89_phy_rfk_report_wait()
3427 return -EFAULT; in rtw89_phy_rfk_report_wait()
3432 rfk_name, ktime_ms_delta(ktime_get(), wait->start_time)); in rtw89_phy_rfk_report_wait()
3441 (const struct rtw89_c2h_rfk_report *)c2h->data; in rtw89_phy_c2h_rfk_report_state()
3442 struct rtw89_rfk_wait_info *wait = &rtwdev->rfk_wait; in rtw89_phy_c2h_rfk_report_state()
3444 wait->state = report->state; in rtw89_phy_c2h_rfk_report_state()
3445 wait->version = report->version; in rtw89_phy_c2h_rfk_report_state()
3447 complete(&wait->completion); in rtw89_phy_c2h_rfk_report_state()
3451 wait->state, wait->version, in rtw89_phy_c2h_rfk_report_state()
3452 (int)(len - sizeof(report->hdr)), &report->state); in rtw89_phy_c2h_rfk_report_state()
3953 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in phy_tssi_get_ofdm_de()
3954 enum rtw89_band band = chan->band_type; in phy_tssi_get_ofdm_de()
3955 u8 ch = chan->channel; in phy_tssi_get_ofdm_de()
3975 de_1st = tssi_info->tssi_mcs[path][gidx_1st]; in phy_tssi_get_ofdm_de()
3976 de_2nd = tssi_info->tssi_mcs[path][gidx_2nd]; in phy_tssi_get_ofdm_de()
3983 val = tssi_info->tssi_mcs[path][gidx]; in phy_tssi_get_ofdm_de()
4001 de_1st = tssi_info->tssi_6g_mcs[path][gidx_1st]; in phy_tssi_get_ofdm_de()
4002 de_2nd = tssi_info->tssi_6g_mcs[path][gidx_2nd]; in phy_tssi_get_ofdm_de()
4009 val = tssi_info->tssi_6g_mcs[path][gidx]; in phy_tssi_get_ofdm_de()
4023 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in phy_tssi_get_ofdm_trim_de()
4024 enum rtw89_band band = chan->band_type; in phy_tssi_get_ofdm_trim_de()
4025 u8 ch = chan->channel; in phy_tssi_get_ofdm_trim_de()
4045 tde_1st = tssi_info->tssi_trim[path][tgidx_1st]; in phy_tssi_get_ofdm_trim_de()
4046 tde_2nd = tssi_info->tssi_trim[path][tgidx_2nd]; in phy_tssi_get_ofdm_trim_de()
4053 val = tssi_info->tssi_trim[path][tgidx]; in phy_tssi_get_ofdm_trim_de()
4072 tde_1st = tssi_info->tssi_trim_6g[path][tgidx_1st]; in phy_tssi_get_ofdm_trim_de()
4073 tde_2nd = tssi_info->tssi_trim_6g[path][tgidx_2nd]; in phy_tssi_get_ofdm_trim_de()
4080 val = tssi_info->tssi_trim_6g[path][tgidx]; in phy_tssi_get_ofdm_trim_de()
4095 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4096 u8 ch = chan->channel; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4109 h2c->curr_tssi_trim_de[i] = trim_de; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4115 cck_de = tssi_info->tssi_cck[i][gidx]; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4118 h2c->curr_tssi_cck_de[i] = 0x0; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4119 h2c->curr_tssi_cck_de_20m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4120 h2c->curr_tssi_cck_de_40m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4121 h2c->curr_tssi_efuse_cck_de[i] = cck_de; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4129 h2c->curr_tssi_ofdm_de[i] = 0x0; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4130 h2c->curr_tssi_ofdm_de_20m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4131 h2c->curr_tssi_ofdm_de_40m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4132 h2c->curr_tssi_ofdm_de_80m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4133 h2c->curr_tssi_ofdm_de_160m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4134 h2c->curr_tssi_ofdm_de_320m[i] = val; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4135 h2c->curr_tssi_efuse_ofdm_de[i] = ofdm_de; in rtw89_phy_rfk_tssi_fill_fwcmd_efuse_to_de()
4147 struct rtw89_fw_txpwr_track_cfg *trk = rtwdev->fw.elm_info.txpwr_trk; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4148 struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4151 u8 subband = chan->subband_type; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4160 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GA_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4161 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GA_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4162 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GB_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4163 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_2GB_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4166 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4167 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4168 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4169 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4172 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4173 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4174 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4175 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4178 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4179 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GA_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4180 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4181 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_5GB_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4185 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4186 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4187 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4188 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4192 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4193 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4194 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4195 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4199 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4200 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4201 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4202 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4206 thm_up[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_P][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4207 thm_down[RF_PATH_A] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GA_N][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4208 thm_up[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_P][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4209 thm_down[RF_PATH_B] = trk->delta[RTW89_FW_TXPWR_TRK_TYPE_6GB_N][3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4217 thermal = tssi_info->thermal[path]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4222 h2c->pg_thermal[path] = 0x38; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4223 memset(h2c->ftable[path], 0, sizeof(h2c->ftable[path])); in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4227 h2c->pg_thermal[path] = thermal; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4233 thm_up[path][DELTA_SWINGIDX_SIZE - 1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4236 for (j = 127; j >= 64; j--) in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4238 -thm_down[path][i++] : in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4239 -thm_down[path][DELTA_SWINGIDX_SIZE - 1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4242 h2c->ftable[path][i + 0] = thm_ofst[i + 3]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4243 h2c->ftable[path][i + 1] = thm_ofst[i + 2]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4244 h2c->ftable[path][i + 2] = thm_ofst[i + 1]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4245 h2c->ftable[path][i + 3] = thm_ofst[i + 0]; in rtw89_phy_rfk_tssi_fill_fwcmd_tmeter_tbl()
4257 const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info; in rtw89_phy_cfo_get_xcap_reg()
4261 reg_mask = xtal->sc_xo_mask; in rtw89_phy_cfo_get_xcap_reg()
4263 reg_mask = xtal->sc_xi_mask; in rtw89_phy_cfo_get_xcap_reg()
4265 return (u8)rtw89_read32_mask(rtwdev, xtal->xcap_reg, reg_mask); in rtw89_phy_cfo_get_xcap_reg()
4271 const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info; in rtw89_phy_cfo_set_xcap_reg()
4275 reg_mask = xtal->sc_xo_mask; in rtw89_phy_cfo_set_xcap_reg()
4277 reg_mask = xtal->sc_xi_mask; in rtw89_phy_cfo_set_xcap_reg()
4279 rtw89_write32_mask(rtwdev, xtal->xcap_reg, reg_mask, val); in rtw89_phy_cfo_set_xcap_reg()
4285 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_set_crystal_cap()
4286 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_cfo_set_crystal_cap()
4289 if (!force && cfo->crystal_cap == crystal_cap) in rtw89_phy_cfo_set_crystal_cap()
4291 if (chip->chip_id == RTL8852A || chip->chip_id == RTL8851B) { in rtw89_phy_cfo_set_crystal_cap()
4304 cfo->crystal_cap = sc_xi_val; in rtw89_phy_cfo_set_crystal_cap()
4305 cfo->x_cap_ofst = (s8)((int)cfo->crystal_cap - cfo->def_x_cap); in rtw89_phy_cfo_set_crystal_cap()
4310 cfo->x_cap_ofst); in rtw89_phy_cfo_set_crystal_cap()
4316 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_reset()
4319 cfo->def_x_cap = cfo->crystal_cap_default & B_AX_XTAL_SC_MASK; in rtw89_phy_cfo_reset()
4320 cfo->is_adjust = false; in rtw89_phy_cfo_reset()
4321 if (cfo->crystal_cap == cfo->def_x_cap) in rtw89_phy_cfo_reset()
4323 cap = cfo->crystal_cap; in rtw89_phy_cfo_reset()
4324 cap += (cap > cfo->def_x_cap ? -1 : 1); in rtw89_phy_cfo_reset()
4327 "(0x%x) approach to dflt_val=(0x%x)\n", cfo->crystal_cap, in rtw89_phy_cfo_reset()
4328 cfo->def_x_cap); in rtw89_phy_cfo_reset()
4333 const struct rtw89_reg_def *dcfo_comp = rtwdev->chip->dcfo_comp; in rtw89_dcfo_comp()
4334 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_dcfo_comp()
4339 if (rtwdev->chip->chip_id == RTL8922A) in rtw89_dcfo_comp()
4351 sign = curr_cfo > 0 ? 1 : -1; in rtw89_dcfo_comp()
4354 if (rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv == CHIP_CBV) in rtw89_dcfo_comp()
4355 cfo_avg_312 = -cfo_avg_312; in rtw89_dcfo_comp()
4356 rtw89_phy_set_phy_regs(rtwdev, dcfo_comp->addr, dcfo_comp->mask, in rtw89_dcfo_comp()
4362 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_dcfo_comp_init()
4363 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_dcfo_comp_init()
4364 const struct rtw89_cfo_regs *cfo = phy->cfo; in rtw89_dcfo_comp_init()
4366 rtw89_phy_set_phy_regs(rtwdev, cfo->comp_seg0, cfo->valid_0_mask, 1); in rtw89_dcfo_comp_init()
4367 rtw89_phy_set_phy_regs(rtwdev, cfo->comp, cfo->weighting_mask, 8); in rtw89_dcfo_comp_init()
4369 if (chip->chip_gen == RTW89_CHIP_AX) { in rtw89_dcfo_comp_init()
4370 if (chip->cfo_hw_comp) { in rtw89_dcfo_comp_init()
4383 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_init()
4384 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw89_phy_cfo_init()
4386 cfo->crystal_cap_default = efuse->xtal_cap & B_AX_XTAL_SC_MASK; in rtw89_phy_cfo_init()
4387 cfo->crystal_cap = cfo->crystal_cap_default; in rtw89_phy_cfo_init()
4388 cfo->def_x_cap = cfo->crystal_cap; in rtw89_phy_cfo_init()
4389 cfo->x_cap_ub = min_t(int, cfo->def_x_cap + CFO_BOUND, 0x7f); in rtw89_phy_cfo_init()
4390 cfo->x_cap_lb = max_t(int, cfo->def_x_cap - CFO_BOUND, 0x1); in rtw89_phy_cfo_init()
4391 cfo->is_adjust = false; in rtw89_phy_cfo_init()
4392 cfo->divergence_lock_en = false; in rtw89_phy_cfo_init()
4393 cfo->x_cap_ofst = 0; in rtw89_phy_cfo_init()
4394 cfo->lock_cnt = 0; in rtw89_phy_cfo_init()
4395 cfo->rtw89_multi_cfo_mode = RTW89_TP_BASED_AVG_MODE; in rtw89_phy_cfo_init()
4396 cfo->apply_compensation = false; in rtw89_phy_cfo_init()
4397 cfo->residual_cfo_acc = 0; in rtw89_phy_cfo_init()
4399 cfo->crystal_cap_default); in rtw89_phy_cfo_init()
4400 rtw89_phy_cfo_set_crystal_cap(rtwdev, cfo->crystal_cap_default, true); in rtw89_phy_cfo_init()
4402 cfo->cfo_timer_ms = 2000; in rtw89_phy_cfo_init()
4403 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_init()
4404 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_init()
4405 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_init()
4406 cfo->cfo_ul_ofdma_acc_mode = RTW89_CFO_UL_OFDMA_ACC_ENABLE; in rtw89_phy_cfo_init()
4412 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_crystal_cap_adjust()
4413 int crystal_cap = cfo->crystal_cap; in rtw89_phy_cfo_crystal_cap_adjust()
4421 if (!cfo->is_adjust) { in rtw89_phy_cfo_crystal_cap_adjust()
4423 cfo->is_adjust = true; in rtw89_phy_cfo_crystal_cap_adjust()
4426 cfo->is_adjust = false; in rtw89_phy_cfo_crystal_cap_adjust()
4428 if (!cfo->is_adjust) { in rtw89_phy_cfo_crystal_cap_adjust()
4432 sign = curr_cfo > 0 ? 1 : -1; in rtw89_phy_cfo_crystal_cap_adjust()
4448 cfo->crystal_cap, cfo->def_x_cap); in rtw89_phy_cfo_crystal_cap_adjust()
4453 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_average_cfo_calc()
4454 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_average_cfo_calc()
4460 if (rtwdev->total_sta_assoc != 1) in rtw89_phy_average_cfo_calc()
4464 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_average_cfo_calc()
4466 cfo_khz_all += cfo->cfo_tail[i]; in rtw89_phy_average_cfo_calc()
4467 cfo_cnt_all += cfo->cfo_cnt[i]; in rtw89_phy_average_cfo_calc()
4469 cfo->pre_cfo_avg[i] = cfo->cfo_avg[i]; in rtw89_phy_average_cfo_calc()
4470 cfo->dcfo_avg = phy_div(cfo_khz_all << chip->dcfo_comp_sft, in rtw89_phy_average_cfo_calc()
4483 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_multi_sta_cfo_calc()
4484 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_multi_sta_cfo_calc()
4499 if (cfo->rtw89_multi_cfo_mode == RTW89_PKT_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
4502 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_multi_sta_cfo_calc()
4504 cfo_khz_all += cfo->cfo_tail[i]; in rtw89_phy_multi_sta_cfo_calc()
4505 cfo_cnt_all += cfo->cfo_cnt[i]; in rtw89_phy_multi_sta_cfo_calc()
4512 } else if (cfo->rtw89_multi_cfo_mode == RTW89_ENTRY_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
4515 if (cfo->cfo_cnt[i] == 0) in rtw89_phy_multi_sta_cfo_calc()
4517 cfo->cfo_avg[i] = phy_div(cfo->cfo_tail[i], in rtw89_phy_multi_sta_cfo_calc()
4518 (s32)cfo->cfo_cnt[i]); in rtw89_phy_multi_sta_cfo_calc()
4519 cfo_khz_all += cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4522 cfo->cfo_avg[i]); in rtw89_phy_multi_sta_cfo_calc()
4524 sta_cnt = rtwdev->total_sta_assoc; in rtw89_phy_multi_sta_cfo_calc()
4530 } else if (cfo->rtw89_multi_cfo_mode == RTW89_TP_BASED_AVG_MODE) { in rtw89_phy_multi_sta_cfo_calc()
4532 cfo_tol = cfo->sta_cfo_tolerance; in rtw89_phy_multi_sta_cfo_calc()
4535 if (cfo->cfo_cnt[i] != 0) { in rtw89_phy_multi_sta_cfo_calc()
4536 cfo->cfo_avg[i] = phy_div(cfo->cfo_tail[i], in rtw89_phy_multi_sta_cfo_calc()
4537 (s32)cfo->cfo_cnt[i]); in rtw89_phy_multi_sta_cfo_calc()
4540 cfo->cfo_avg[i] = cfo->pre_cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4542 max_cfo_lb = max(cfo->cfo_avg[i] - cfo_tol, max_cfo_lb); in rtw89_phy_multi_sta_cfo_calc()
4543 min_cfo_ub = min(cfo->cfo_avg[i] + cfo_tol, min_cfo_ub); in rtw89_phy_multi_sta_cfo_calc()
4544 cfo_khz_all += cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4548 i, cfo->cfo_avg[i]); in rtw89_phy_multi_sta_cfo_calc()
4549 if (sta_cnt >= rtwdev->total_sta_assoc) in rtw89_phy_multi_sta_cfo_calc()
4552 tp_all = stats->rx_throughput; /* need tp for each entry */ in rtw89_phy_multi_sta_cfo_calc()
4567 min_cfo_ub - max_cfo_lb); in rtw89_phy_multi_sta_cfo_calc()
4571 "No intersection of cfo tolerance windows\n"); in rtw89_phy_multi_sta_cfo_calc()
4575 cfo->pre_cfo_avg[i] = cfo->cfo_avg[i]; in rtw89_phy_multi_sta_cfo_calc()
4583 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_statistics_reset()
4585 memset(&cfo->cfo_tail, 0, sizeof(cfo->cfo_tail)); in rtw89_phy_cfo_statistics_reset()
4586 memset(&cfo->cfo_cnt, 0, sizeof(cfo->cfo_cnt)); in rtw89_phy_cfo_statistics_reset()
4587 cfo->packet_count = 0; in rtw89_phy_cfo_statistics_reset()
4588 cfo->packet_count_pre = 0; in rtw89_phy_cfo_statistics_reset()
4589 cfo->cfo_avg_pre = 0; in rtw89_phy_cfo_statistics_reset()
4594 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_dm()
4597 u8 pre_x_cap = cfo->crystal_cap; in rtw89_phy_cfo_dm()
4598 u8 dcfo_comp_sft = rtwdev->chip->dcfo_comp_sft; in rtw89_phy_cfo_dm()
4600 cfo->dcfo_avg = 0; in rtw89_phy_cfo_dm()
4602 rtwdev->total_sta_assoc); in rtw89_phy_cfo_dm()
4603 if (rtwdev->total_sta_assoc == 0) { in rtw89_phy_cfo_dm()
4607 if (cfo->packet_count == 0) { in rtw89_phy_cfo_dm()
4611 if (cfo->packet_count == cfo->packet_count_pre) { in rtw89_phy_cfo_dm()
4615 if (rtwdev->total_sta_assoc == 1) in rtw89_phy_cfo_dm()
4619 if (cfo->divergence_lock_en) { in rtw89_phy_cfo_dm()
4620 cfo->lock_cnt++; in rtw89_phy_cfo_dm()
4621 if (cfo->lock_cnt > CFO_PERIOD_CNT) { in rtw89_phy_cfo_dm()
4622 cfo->divergence_lock_en = false; in rtw89_phy_cfo_dm()
4623 cfo->lock_cnt = 0; in rtw89_phy_cfo_dm()
4629 if (cfo->crystal_cap >= cfo->x_cap_ub || in rtw89_phy_cfo_dm()
4630 cfo->crystal_cap <= cfo->x_cap_lb) { in rtw89_phy_cfo_dm()
4631 cfo->divergence_lock_en = true; in rtw89_phy_cfo_dm()
4637 cfo->cfo_avg_pre = new_cfo; in rtw89_phy_cfo_dm()
4638 cfo->dcfo_avg_pre = cfo->dcfo_avg; in rtw89_phy_cfo_dm()
4639 x_cap_update = cfo->crystal_cap != pre_x_cap; in rtw89_phy_cfo_dm()
4641 rtw89_debug(rtwdev, RTW89_DBG_CFO, "Xcap: D:%x C:%x->%x, ofst=%d\n", in rtw89_phy_cfo_dm()
4642 cfo->def_x_cap, pre_x_cap, cfo->crystal_cap, in rtw89_phy_cfo_dm()
4643 cfo->x_cap_ofst); in rtw89_phy_cfo_dm()
4645 if (cfo->dcfo_avg > 0) in rtw89_phy_cfo_dm()
4646 cfo->dcfo_avg -= CFO_SW_COMP_FINE_TUNE << dcfo_comp_sft; in rtw89_phy_cfo_dm()
4648 cfo->dcfo_avg += CFO_SW_COMP_FINE_TUNE << dcfo_comp_sft; in rtw89_phy_cfo_dm()
4650 rtw89_dcfo_comp(rtwdev, cfo->dcfo_avg); in rtw89_phy_cfo_dm()
4658 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_track_work()
4660 mutex_lock(&rtwdev->mutex); in rtw89_phy_cfo_track_work()
4661 if (!cfo->cfo_trig_by_timer_en) in rtw89_phy_cfo_track_work()
4665 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->cfo_track_work, in rtw89_phy_cfo_track_work()
4666 msecs_to_jiffies(cfo->cfo_timer_ms)); in rtw89_phy_cfo_track_work()
4668 mutex_unlock(&rtwdev->mutex); in rtw89_phy_cfo_track_work()
4673 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_start_work()
4675 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->cfo_track_work, in rtw89_phy_cfo_start_work()
4676 msecs_to_jiffies(cfo->cfo_timer_ms)); in rtw89_phy_cfo_start_work()
4681 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_track()
4682 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_cfo_track()
4685 if (stats->rx_tf_periodic > CFO_TF_CNT_TH) in rtw89_phy_cfo_track()
4687 if (cfo->cfo_ul_ofdma_acc_mode == RTW89_CFO_UL_OFDMA_ACC_ENABLE && in rtw89_phy_cfo_track()
4691 switch (cfo->phy_cfo_status) { in rtw89_phy_cfo_track()
4693 if (stats->tx_throughput >= CFO_TP_UPPER) { in rtw89_phy_cfo_track()
4694 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_ENHANCE; in rtw89_phy_cfo_track()
4695 cfo->cfo_trig_by_timer_en = true; in rtw89_phy_cfo_track()
4696 cfo->cfo_timer_ms = CFO_COMP_PERIOD; in rtw89_phy_cfo_track()
4701 if (stats->tx_throughput <= CFO_TP_LOWER) in rtw89_phy_cfo_track()
4702 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
4704 cfo->phy_cfo_trk_cnt >= CFO_PERIOD_CNT) in rtw89_phy_cfo_track()
4705 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_HOLD; in rtw89_phy_cfo_track()
4707 cfo->phy_cfo_trk_cnt++; in rtw89_phy_cfo_track()
4709 if (cfo->phy_cfo_status == RTW89_PHY_DCFO_STATE_NORMAL) { in rtw89_phy_cfo_track()
4710 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
4711 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_track()
4715 if (stats->tx_throughput <= CFO_TP_LOWER) { in rtw89_phy_cfo_track()
4716 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
4717 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
4718 cfo->cfo_trig_by_timer_en = false; in rtw89_phy_cfo_track()
4720 cfo->phy_cfo_trk_cnt++; in rtw89_phy_cfo_track()
4724 cfo->phy_cfo_status = RTW89_PHY_DCFO_STATE_NORMAL; in rtw89_phy_cfo_track()
4725 cfo->phy_cfo_trk_cnt = 0; in rtw89_phy_cfo_track()
4730 stats->tx_throughput, cfo->phy_cfo_status, in rtw89_phy_cfo_track()
4731 cfo->cfo_trig_by_timer_en, cfo->phy_cfo_trk_cnt, in rtw89_phy_cfo_track()
4732 ewma_thermal_read(&rtwdev->phystat.avg_thermal[0])); in rtw89_phy_cfo_track()
4733 if (cfo->cfo_trig_by_timer_en) in rtw89_phy_cfo_track()
4741 struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; in rtw89_phy_cfo_parse()
4742 u8 macid = phy_ppdu->mac_id; in rtw89_phy_cfo_parse()
4749 cfo->cfo_tail[macid] += cfo_val; in rtw89_phy_cfo_parse()
4750 cfo->cfo_cnt[macid]++; in rtw89_phy_cfo_parse()
4751 cfo->packet_count++; in rtw89_phy_cfo_parse()
4756 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_assoc()
4758 rtwvif_link->chanctx_idx); in rtw89_phy_ul_tb_assoc()
4759 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_assoc()
4761 if (!chip->ul_tb_waveform_ctrl) in rtw89_phy_ul_tb_assoc()
4764 rtwvif_link->def_tri_idx = in rtw89_phy_ul_tb_assoc()
4767 if (chip->chip_id == RTL8852B && rtwdev->hal.cv > CHIP_CBV) in rtw89_phy_ul_tb_assoc()
4768 rtwvif_link->dyn_tb_bedge_en = false; in rtw89_phy_ul_tb_assoc()
4769 else if (chan->band_type >= RTW89_BAND_5G && in rtw89_phy_ul_tb_assoc()
4770 chan->band_width >= RTW89_CHANNEL_WIDTH_40) in rtw89_phy_ul_tb_assoc()
4771 rtwvif_link->dyn_tb_bedge_en = true; in rtw89_phy_ul_tb_assoc()
4773 rtwvif_link->dyn_tb_bedge_en = false; in rtw89_phy_ul_tb_assoc()
4777 ul_tb_info->def_if_bandedge, rtwvif_link->def_tri_idx); in rtw89_phy_ul_tb_assoc()
4780 rtwvif_link->dyn_tb_bedge_en, ul_tb_info->dyn_tb_tri_en); in rtw89_phy_ul_tb_assoc()
4811 if (!rtwdev->chip->ul_tb_pwr_diff) in rtw89_phy_ofdma_power_diff()
4814 if (rtwvif_link->pwr_diff_en == rtwvif_link->pre_pwr_diff_en) { in rtw89_phy_ofdma_power_diff()
4815 rtwvif_link->pwr_diff_en = false; in rtw89_phy_ofdma_power_diff()
4819 rtwvif_link->pre_pwr_diff_en = rtwvif_link->pwr_diff_en; in rtw89_phy_ofdma_power_diff()
4820 param = &table[rtwvif_link->pwr_diff_en]; in rtw89_phy_ofdma_power_diff()
4823 param->q_00); in rtw89_phy_ofdma_power_diff()
4825 param->q_11); in rtw89_phy_ofdma_power_diff()
4827 B_CUSTOMIZE_Q_MATRIX_EN, param->q_matrix_en); in rtw89_phy_ofdma_power_diff()
4829 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_1T, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4831 param->ultb_1t_norm_160); in rtw89_phy_ofdma_power_diff()
4833 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PWR_UL_TB_2T, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4835 param->ultb_2t_norm_160); in rtw89_phy_ofdma_power_diff()
4837 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PATH_COM1, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4839 param->com1_norm_1sts); in rtw89_phy_ofdma_power_diff()
4841 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_PATH_COM2, rtwvif_link->mac_idx); in rtw89_phy_ofdma_power_diff()
4843 param->com2_resp_1sts_path); in rtw89_phy_ofdma_power_diff()
4851 struct rtw89_traffic_stats *stats = &rtwdev->stats; in rtw89_phy_ul_tb_ctrl_check()
4854 if (rtwvif_link->wifi_role != RTW89_WIFI_ROLE_STATION) in rtw89_phy_ul_tb_ctrl_check()
4857 if (!vif->cfg.assoc) in rtw89_phy_ul_tb_ctrl_check()
4860 if (rtwdev->chip->ul_tb_waveform_ctrl) { in rtw89_phy_ul_tb_ctrl_check()
4861 if (stats->rx_tf_periodic > UL_TB_TF_CNT_L2H_TH) in rtw89_phy_ul_tb_ctrl_check()
4862 ul_tb_data->high_tf_client = true; in rtw89_phy_ul_tb_ctrl_check()
4863 else if (stats->rx_tf_periodic < UL_TB_TF_CNT_H2L_TH) in rtw89_phy_ul_tb_ctrl_check()
4864 ul_tb_data->low_tf_client = true; in rtw89_phy_ul_tb_ctrl_check()
4866 ul_tb_data->valid = true; in rtw89_phy_ul_tb_ctrl_check()
4867 ul_tb_data->def_tri_idx = rtwvif_link->def_tri_idx; in rtw89_phy_ul_tb_ctrl_check()
4868 ul_tb_data->dyn_tb_bedge_en = rtwvif_link->dyn_tb_bedge_en; in rtw89_phy_ul_tb_ctrl_check()
4877 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_waveform_ctrl()
4879 if (!rtwdev->chip->ul_tb_waveform_ctrl) in rtw89_phy_ul_tb_waveform_ctrl()
4882 if (ul_tb_data->dyn_tb_bedge_en) { in rtw89_phy_ul_tb_waveform_ctrl()
4883 if (ul_tb_data->high_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4887 } else if (ul_tb_data->low_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4889 ul_tb_info->def_if_bandedge); in rtw89_phy_ul_tb_waveform_ctrl()
4892 ul_tb_info->def_if_bandedge); in rtw89_phy_ul_tb_waveform_ctrl()
4896 if (ul_tb_info->dyn_tb_tri_en) { in rtw89_phy_ul_tb_waveform_ctrl()
4897 if (ul_tb_data->high_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4902 } else if (ul_tb_data->low_tf_client) { in rtw89_phy_ul_tb_waveform_ctrl()
4905 ul_tb_data->def_tri_idx); in rtw89_phy_ul_tb_waveform_ctrl()
4908 ul_tb_data->def_tri_idx); in rtw89_phy_ul_tb_waveform_ctrl()
4915 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_ctrl_track()
4921 if (!chip->ul_tb_waveform_ctrl && !chip->ul_tb_pwr_diff) in rtw89_phy_ul_tb_ctrl_track()
4924 if (rtwdev->total_sta_assoc != 1) in rtw89_phy_ul_tb_ctrl_track()
4939 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_ul_tb_info_init()
4940 struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; in rtw89_phy_ul_tb_info_init()
4942 if (!chip->ul_tb_waveform_ctrl) in rtw89_phy_ul_tb_info_init()
4945 ul_tb_info->dyn_tb_tri_en = true; in rtw89_phy_ul_tb_info_init()
4946 ul_tb_info->def_if_bandedge = in rtw89_phy_ul_tb_info_init()
4953 ewma_rssi_init(&antdiv_sts->cck_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
4954 ewma_rssi_init(&antdiv_sts->ofdm_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
4955 ewma_rssi_init(&antdiv_sts->non_legacy_rssi_avg); in rtw89_phy_antdiv_sts_instance_reset()
4956 antdiv_sts->pkt_cnt_cck = 0; in rtw89_phy_antdiv_sts_instance_reset()
4957 antdiv_sts->pkt_cnt_ofdm = 0; in rtw89_phy_antdiv_sts_instance_reset()
4958 antdiv_sts->pkt_cnt_non_legacy = 0; in rtw89_phy_antdiv_sts_instance_reset()
4959 antdiv_sts->evm = 0; in rtw89_phy_antdiv_sts_instance_reset()
4966 if (rtw89_get_data_rate_mode(rtwdev, phy_ppdu->rate) == DATA_RATE_MODE_NON_HT) { in rtw89_phy_antdiv_sts_instance_add()
4967 if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6) { in rtw89_phy_antdiv_sts_instance_add()
4968 ewma_rssi_add(&stats->cck_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
4969 stats->pkt_cnt_cck++; in rtw89_phy_antdiv_sts_instance_add()
4971 ewma_rssi_add(&stats->ofdm_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
4972 stats->pkt_cnt_ofdm++; in rtw89_phy_antdiv_sts_instance_add()
4973 stats->evm += phy_ppdu->ofdm.evm_min; in rtw89_phy_antdiv_sts_instance_add()
4976 ewma_rssi_add(&stats->non_legacy_rssi_avg, phy_ppdu->rssi_avg); in rtw89_phy_antdiv_sts_instance_add()
4977 stats->pkt_cnt_non_legacy++; in rtw89_phy_antdiv_sts_instance_add()
4978 stats->evm += phy_ppdu->ofdm.evm_min; in rtw89_phy_antdiv_sts_instance_add()
4984 if (stats->pkt_cnt_non_legacy >= stats->pkt_cnt_cck && in rtw89_phy_antdiv_sts_instance_get_rssi()
4985 stats->pkt_cnt_non_legacy >= stats->pkt_cnt_ofdm) in rtw89_phy_antdiv_sts_instance_get_rssi()
4986 return ewma_rssi_read(&stats->non_legacy_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
4987 else if (stats->pkt_cnt_ofdm >= stats->pkt_cnt_cck && in rtw89_phy_antdiv_sts_instance_get_rssi()
4988 stats->pkt_cnt_ofdm >= stats->pkt_cnt_non_legacy) in rtw89_phy_antdiv_sts_instance_get_rssi()
4989 return ewma_rssi_read(&stats->ofdm_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
4991 return ewma_rssi_read(&stats->cck_rssi_avg); in rtw89_phy_antdiv_sts_instance_get_rssi()
4996 return phy_div(stats->evm, stats->pkt_cnt_non_legacy + stats->pkt_cnt_ofdm); in rtw89_phy_antdiv_sts_instance_get_evm()
5002 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_parse()
5003 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_parse()
5005 if (!hal->ant_diversity || hal->ant_diversity_fixed) in rtw89_phy_antdiv_parse()
5008 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->target_stats); in rtw89_phy_antdiv_parse()
5010 if (!antdiv->get_stats) in rtw89_phy_antdiv_parse()
5013 if (hal->antenna_rx == RF_A) in rtw89_phy_antdiv_parse()
5014 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->main_stats); in rtw89_phy_antdiv_parse()
5015 else if (hal->antenna_rx == RF_B) in rtw89_phy_antdiv_parse()
5016 rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->aux_stats); in rtw89_phy_antdiv_parse()
5049 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_sts_reset()
5051 rtw89_phy_antdiv_sts_instance_reset(&antdiv->target_stats); in rtw89_phy_antdiv_sts_reset()
5052 rtw89_phy_antdiv_sts_instance_reset(&antdiv->main_stats); in rtw89_phy_antdiv_sts_reset()
5053 rtw89_phy_antdiv_sts_instance_reset(&antdiv->aux_stats); in rtw89_phy_antdiv_sts_reset()
5058 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_init()
5059 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_init()
5061 if (!hal->ant_diversity) in rtw89_phy_antdiv_init()
5064 antdiv->get_stats = false; in rtw89_phy_antdiv_init()
5065 antdiv->rssi_pre = 0; in rtw89_phy_antdiv_init()
5072 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_thermal_protect()
5073 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_thermal_protect()
5074 u8 th_max = phystat->last_thermal_max; in rtw89_phy_thermal_protect()
5075 u8 lv = hal->thermal_prot_lv; in rtw89_phy_thermal_protect()
5077 if (!hal->thermal_prot_th || in rtw89_phy_thermal_protect()
5078 (hal->disabled_dm_bitmap & BIT(RTW89_DM_THERMAL_PROTECT))) in rtw89_phy_thermal_protect()
5081 if (th_max > hal->thermal_prot_th && lv < RTW89_THERMAL_PROT_LV_MAX) in rtw89_phy_thermal_protect()
5083 else if (th_max < hal->thermal_prot_th - 2 && lv > 0) in rtw89_phy_thermal_protect()
5084 lv--; in rtw89_phy_thermal_protect()
5088 hal->thermal_prot_lv = lv; in rtw89_phy_thermal_protect()
5092 rtw89_fw_h2c_tx_duty(rtwdev, hal->thermal_prot_lv); in rtw89_phy_thermal_protect()
5097 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_thermal_update()
5101 for (i = 0; i < rtwdev->chip->rf_path_num; i++) { in rtw89_phy_stat_thermal_update()
5104 ewma_thermal_add(&phystat->avg_thermal[i], th); in rtw89_phy_stat_thermal_update()
5108 ewma_thermal_read(&phystat->avg_thermal[i])); in rtw89_phy_stat_thermal_update()
5113 phystat->last_thermal_max = th_max; in rtw89_phy_stat_thermal_update()
5126 struct rtw89_phy_ch_info *ch_info = rssi_data->ch_info; in __rtw89_phy_stat_rssi_update_iter()
5129 rssi_curr = ewma_rssi_read(&rtwsta_link->avg_rssi); in __rtw89_phy_stat_rssi_update_iter()
5131 if (rssi_curr < ch_info->rssi_min) { in __rtw89_phy_stat_rssi_update_iter()
5132 ch_info->rssi_min = rssi_curr; in __rtw89_phy_stat_rssi_update_iter()
5133 ch_info->rssi_min_macid = rtwsta_link->mac_id; in __rtw89_phy_stat_rssi_update_iter()
5136 if (rtwsta_link->prev_rssi == 0) { in __rtw89_phy_stat_rssi_update_iter()
5137 rtwsta_link->prev_rssi = rssi_curr; in __rtw89_phy_stat_rssi_update_iter()
5138 } else if (abs((int)rtwsta_link->prev_rssi - (int)rssi_curr) > in __rtw89_phy_stat_rssi_update_iter()
5140 rtwsta_link->prev_rssi = rssi_curr; in __rtw89_phy_stat_rssi_update_iter()
5141 rssi_data->rssi_changed = true; in __rtw89_phy_stat_rssi_update_iter()
5163 rssi_data.ch_info = &rtwdev->ch_info; in rtw89_phy_stat_rssi_update()
5164 rssi_data.ch_info->rssi_min = U8_MAX; in rtw89_phy_stat_rssi_update()
5165 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_stat_rssi_update()
5174 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_init()
5177 for (i = 0; i < rtwdev->chip->rf_path_num; i++) in rtw89_phy_stat_init()
5178 ewma_thermal_init(&phystat->avg_thermal[i]); in rtw89_phy_stat_init()
5182 memset(&phystat->cur_pkt_stat, 0, sizeof(phystat->cur_pkt_stat)); in rtw89_phy_stat_init()
5183 memset(&phystat->last_pkt_stat, 0, sizeof(phystat->last_pkt_stat)); in rtw89_phy_stat_init()
5185 ewma_rssi_init(&phystat->bcn_rssi); in rtw89_phy_stat_init()
5187 rtwdev->hal.thermal_prot_lv = 0; in rtw89_phy_stat_init()
5192 struct rtw89_phy_stat *phystat = &rtwdev->phystat; in rtw89_phy_stat_track()
5198 phystat->last_pkt_stat = phystat->cur_pkt_stat; in rtw89_phy_stat_track()
5199 memset(&phystat->cur_pkt_stat, 0, sizeof(phystat->cur_pkt_stat)); in rtw89_phy_stat_track()
5204 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_us_to_idx()
5206 return time_us >> (ilog2(CCX_US_BASE_RATIO) + env->ccx_unit_idx); in rtw89_phy_ccx_us_to_idx()
5211 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_idx_to_us()
5213 return idx << (ilog2(CCX_US_BASE_RATIO) + env->ccx_unit_idx); in rtw89_phy_ccx_idx_to_us()
5218 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ccx_top_setting_init()
5219 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_top_setting_init()
5220 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ccx_top_setting_init()
5222 env->ccx_manual_ctrl = false; in rtw89_phy_ccx_top_setting_init()
5223 env->ccx_ongoing = false; in rtw89_phy_ccx_top_setting_init()
5224 env->ccx_rac_lv = RTW89_RAC_RELEASE; in rtw89_phy_ccx_top_setting_init()
5225 env->ccx_period = 0; in rtw89_phy_ccx_top_setting_init()
5226 env->ccx_unit_idx = RTW89_CCX_32_US; in rtw89_phy_ccx_top_setting_init()
5228 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->en_mask, 1); in rtw89_phy_ccx_top_setting_init()
5229 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->trig_opt_mask, 1); in rtw89_phy_ccx_top_setting_init()
5230 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1); in rtw89_phy_ccx_top_setting_init()
5231 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->edcca_opt_mask, in rtw89_phy_ccx_top_setting_init()
5238 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_get_report()
5242 numer = report * score + (env->ccx_period >> 1); in rtw89_phy_ccx_get_report()
5243 if (env->ccx_period) in rtw89_phy_ccx_get_report()
5244 ret = numer / env->ccx_period; in rtw89_phy_ccx_get_report()
5246 return ret >= score ? score - 1 : ret; in rtw89_phy_ccx_get_report()
5280 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_racing_release()
5283 "lv:(%d)->(0)\n", env->ccx_rac_lv); in rtw89_phy_ccx_racing_release()
5285 env->ccx_ongoing = false; in rtw89_phy_ccx_racing_release()
5286 env->ccx_rac_lv = RTW89_RAC_RELEASE; in rtw89_phy_ccx_racing_release()
5287 env->ifs_clm_app = RTW89_IFS_CLM_BACKGROUND; in rtw89_phy_ccx_racing_release()
5293 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_th_update_check()
5294 bool is_update = env->ifs_clm_app != para->ifs_clm_app; in rtw89_phy_ifs_clm_th_update_check()
5296 u16 *ifs_th_l = env->ifs_clm_th_l; in rtw89_phy_ifs_clm_th_update_check()
5297 u16 *ifs_th_h = env->ifs_clm_th_h; in rtw89_phy_ifs_clm_th_update_check()
5304 switch (para->ifs_clm_app) { in rtw89_phy_ifs_clm_th_update_check()
5315 ifs_th0_us = para->ifs_clm_manual_th0; in rtw89_phy_ifs_clm_th_update_check()
5316 ifs_th_times = para->ifs_clm_manual_th_times; in rtw89_phy_ifs_clm_th_update_check()
5323 * low[i] = high[i-1] + 1 in rtw89_phy_ifs_clm_th_update_check()
5324 * high[i] = high[i-1] * ifs_th_times in rtw89_phy_ifs_clm_th_update_check()
5331 ifs_th_l[i] = ifs_th_h[i - 1] + 1; in rtw89_phy_ifs_clm_th_update_check()
5332 ifs_th_h_us[i] = ifs_th_h_us[i - 1] * ifs_th_times; in rtw89_phy_ifs_clm_th_update_check()
5339 "No need to update IFS_TH\n"); in rtw89_phy_ifs_clm_th_update_check()
5346 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_set_th_reg()
5347 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_set_th_reg()
5348 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_set_th_reg()
5351 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5352 env->ifs_clm_th_l[0]); in rtw89_phy_ifs_clm_set_th_reg()
5353 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5354 env->ifs_clm_th_l[1]); in rtw89_phy_ifs_clm_set_th_reg()
5355 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5356 env->ifs_clm_th_l[2]); in rtw89_phy_ifs_clm_set_th_reg()
5357 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_th_l_mask, in rtw89_phy_ifs_clm_set_th_reg()
5358 env->ifs_clm_th_l[3]); in rtw89_phy_ifs_clm_set_th_reg()
5360 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5361 env->ifs_clm_th_h[0]); in rtw89_phy_ifs_clm_set_th_reg()
5362 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5363 env->ifs_clm_th_h[1]); in rtw89_phy_ifs_clm_set_th_reg()
5364 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5365 env->ifs_clm_th_h[2]); in rtw89_phy_ifs_clm_set_th_reg()
5366 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_th_h_mask, in rtw89_phy_ifs_clm_set_th_reg()
5367 env->ifs_clm_th_h[3]); in rtw89_phy_ifs_clm_set_th_reg()
5372 i + 1, env->ifs_clm_th_l[i], env->ifs_clm_th_h[i]); in rtw89_phy_ifs_clm_set_th_reg()
5377 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_setting_init()
5378 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_setting_init()
5379 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_setting_init()
5382 env->ifs_clm_app = RTW89_IFS_CLM_BACKGROUND; in rtw89_phy_ifs_clm_setting_init()
5383 env->ifs_clm_mntr_time = 0; in rtw89_phy_ifs_clm_setting_init()
5389 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_collect_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
5390 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t1_addr, ccx->ifs_t1_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
5391 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t2_addr, ccx->ifs_t2_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
5392 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t3_addr, ccx->ifs_t3_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
5393 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_t4_addr, ccx->ifs_t4_en_mask, true); in rtw89_phy_ifs_clm_setting_init()
5399 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_racing_ctrl()
5405 return -EINVAL; in rtw89_phy_ccx_racing_ctrl()
5409 "ccx_ongoing=%d, level:(%d)->(%d)\n", env->ccx_ongoing, in rtw89_phy_ccx_racing_ctrl()
5410 env->ccx_rac_lv, level); in rtw89_phy_ccx_racing_ctrl()
5412 if (env->ccx_ongoing) { in rtw89_phy_ccx_racing_ctrl()
5413 if (level <= env->ccx_rac_lv) in rtw89_phy_ccx_racing_ctrl()
5414 ret = -EINVAL; in rtw89_phy_ccx_racing_ctrl()
5416 env->ccx_ongoing = false; in rtw89_phy_ccx_racing_ctrl()
5420 env->ccx_rac_lv = level; in rtw89_phy_ccx_racing_ctrl()
5430 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ccx_trigger()
5431 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ccx_trigger()
5432 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ccx_trigger()
5434 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_clm_cnt_clear_mask, 0); in rtw89_phy_ccx_trigger()
5435 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 0); in rtw89_phy_ccx_trigger()
5436 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, ccx->ifs_clm_cnt_clear_mask, 1); in rtw89_phy_ccx_trigger()
5437 rtw89_phy_set_phy_regs(rtwdev, ccx->setting_addr, ccx->measurement_trig_mask, 1); in rtw89_phy_ccx_trigger()
5439 env->ccx_ongoing = true; in rtw89_phy_ccx_trigger()
5444 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_get_utility()
5448 env->ifs_clm_tx_ratio = in rtw89_phy_ifs_clm_get_utility()
5449 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_tx, PERCENT); in rtw89_phy_ifs_clm_get_utility()
5450 env->ifs_clm_edcca_excl_cca_ratio = in rtw89_phy_ifs_clm_get_utility()
5451 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_edcca_excl_cca, in rtw89_phy_ifs_clm_get_utility()
5453 env->ifs_clm_cck_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5454 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_cckfa, PERCENT); in rtw89_phy_ifs_clm_get_utility()
5455 env->ifs_clm_ofdm_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5456 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_ofdmfa, PERCENT); in rtw89_phy_ifs_clm_get_utility()
5457 env->ifs_clm_cck_cca_excl_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5458 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_cckcca_excl_fa, in rtw89_phy_ifs_clm_get_utility()
5460 env->ifs_clm_ofdm_cca_excl_fa_ratio = in rtw89_phy_ifs_clm_get_utility()
5461 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_ofdmcca_excl_fa, in rtw89_phy_ifs_clm_get_utility()
5463 env->ifs_clm_cck_fa_permil = in rtw89_phy_ifs_clm_get_utility()
5464 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_cckfa, PERMIL); in rtw89_phy_ifs_clm_get_utility()
5465 env->ifs_clm_ofdm_fa_permil = in rtw89_phy_ifs_clm_get_utility()
5466 rtw89_phy_ccx_get_report(rtwdev, env->ifs_clm_ofdmfa, PERMIL); in rtw89_phy_ifs_clm_get_utility()
5469 if (env->ifs_clm_his[i] > ENV_MNTR_IFSCLM_HIS_MAX) { in rtw89_phy_ifs_clm_get_utility()
5470 env->ifs_clm_ifs_avg[i] = ENV_MNTR_FAIL_DWORD; in rtw89_phy_ifs_clm_get_utility()
5472 env->ifs_clm_ifs_avg[i] = in rtw89_phy_ifs_clm_get_utility()
5474 env->ifs_clm_avg[i]); in rtw89_phy_ifs_clm_get_utility()
5477 res = rtw89_phy_ccx_idx_to_us(rtwdev, env->ifs_clm_cca[i]); in rtw89_phy_ifs_clm_get_utility()
5478 res += env->ifs_clm_his[i] >> 1; in rtw89_phy_ifs_clm_get_utility()
5479 if (env->ifs_clm_his[i]) in rtw89_phy_ifs_clm_get_utility()
5480 res /= env->ifs_clm_his[i]; in rtw89_phy_ifs_clm_get_utility()
5483 env->ifs_clm_cca_avg[i] = res; in rtw89_phy_ifs_clm_get_utility()
5487 "IFS-CLM ratio {Tx, EDCCA_exclu_cca} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5488 env->ifs_clm_tx_ratio, env->ifs_clm_edcca_excl_cca_ratio); in rtw89_phy_ifs_clm_get_utility()
5490 "IFS-CLM FA ratio {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5491 env->ifs_clm_cck_fa_ratio, env->ifs_clm_ofdm_fa_ratio); in rtw89_phy_ifs_clm_get_utility()
5493 "IFS-CLM FA permil {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5494 env->ifs_clm_cck_fa_permil, env->ifs_clm_ofdm_fa_permil); in rtw89_phy_ifs_clm_get_utility()
5496 "IFS-CLM CCA_exclu_FA ratio {CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_utility()
5497 env->ifs_clm_cck_cca_excl_fa_ratio, in rtw89_phy_ifs_clm_get_utility()
5498 env->ifs_clm_ofdm_cca_excl_fa_ratio); in rtw89_phy_ifs_clm_get_utility()
5503 i + 1, env->ifs_clm_his[i], env->ifs_clm_ifs_avg[i], in rtw89_phy_ifs_clm_get_utility()
5504 env->ifs_clm_cca_avg[i]); in rtw89_phy_ifs_clm_get_utility()
5509 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_get_result()
5510 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_get_result()
5511 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_get_result()
5514 if (rtw89_phy_read32_mask(rtwdev, ccx->ifs_total_addr, in rtw89_phy_ifs_clm_get_result()
5515 ccx->ifs_cnt_done_mask) == 0) { in rtw89_phy_ifs_clm_get_result()
5521 env->ifs_clm_tx = in rtw89_phy_ifs_clm_get_result()
5522 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_tx_cnt_addr, in rtw89_phy_ifs_clm_get_result()
5523 ccx->ifs_clm_tx_cnt_msk); in rtw89_phy_ifs_clm_get_result()
5524 env->ifs_clm_edcca_excl_cca = in rtw89_phy_ifs_clm_get_result()
5525 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_tx_cnt_addr, in rtw89_phy_ifs_clm_get_result()
5526 ccx->ifs_clm_edcca_excl_cca_fa_mask); in rtw89_phy_ifs_clm_get_result()
5527 env->ifs_clm_cckcca_excl_fa = in rtw89_phy_ifs_clm_get_result()
5528 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_cca_addr, in rtw89_phy_ifs_clm_get_result()
5529 ccx->ifs_clm_cckcca_excl_fa_mask); in rtw89_phy_ifs_clm_get_result()
5530 env->ifs_clm_ofdmcca_excl_fa = in rtw89_phy_ifs_clm_get_result()
5531 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_cca_addr, in rtw89_phy_ifs_clm_get_result()
5532 ccx->ifs_clm_ofdmcca_excl_fa_mask); in rtw89_phy_ifs_clm_get_result()
5533 env->ifs_clm_cckfa = in rtw89_phy_ifs_clm_get_result()
5534 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_fa_addr, in rtw89_phy_ifs_clm_get_result()
5535 ccx->ifs_clm_cck_fa_mask); in rtw89_phy_ifs_clm_get_result()
5536 env->ifs_clm_ofdmfa = in rtw89_phy_ifs_clm_get_result()
5537 rtw89_phy_read32_mask(rtwdev, ccx->ifs_clm_fa_addr, in rtw89_phy_ifs_clm_get_result()
5538 ccx->ifs_clm_ofdm_fa_mask); in rtw89_phy_ifs_clm_get_result()
5540 env->ifs_clm_his[0] = in rtw89_phy_ifs_clm_get_result()
5541 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5542 ccx->ifs_t1_his_mask); in rtw89_phy_ifs_clm_get_result()
5543 env->ifs_clm_his[1] = in rtw89_phy_ifs_clm_get_result()
5544 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5545 ccx->ifs_t2_his_mask); in rtw89_phy_ifs_clm_get_result()
5546 env->ifs_clm_his[2] = in rtw89_phy_ifs_clm_get_result()
5547 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5548 ccx->ifs_t3_his_mask); in rtw89_phy_ifs_clm_get_result()
5549 env->ifs_clm_his[3] = in rtw89_phy_ifs_clm_get_result()
5550 rtw89_phy_read32_mask(rtwdev, ccx->ifs_his_addr, in rtw89_phy_ifs_clm_get_result()
5551 ccx->ifs_t4_his_mask); in rtw89_phy_ifs_clm_get_result()
5553 env->ifs_clm_avg[0] = in rtw89_phy_ifs_clm_get_result()
5554 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_l_addr, in rtw89_phy_ifs_clm_get_result()
5555 ccx->ifs_t1_avg_mask); in rtw89_phy_ifs_clm_get_result()
5556 env->ifs_clm_avg[1] = in rtw89_phy_ifs_clm_get_result()
5557 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_l_addr, in rtw89_phy_ifs_clm_get_result()
5558 ccx->ifs_t2_avg_mask); in rtw89_phy_ifs_clm_get_result()
5559 env->ifs_clm_avg[2] = in rtw89_phy_ifs_clm_get_result()
5560 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_h_addr, in rtw89_phy_ifs_clm_get_result()
5561 ccx->ifs_t3_avg_mask); in rtw89_phy_ifs_clm_get_result()
5562 env->ifs_clm_avg[3] = in rtw89_phy_ifs_clm_get_result()
5563 rtw89_phy_read32_mask(rtwdev, ccx->ifs_avg_h_addr, in rtw89_phy_ifs_clm_get_result()
5564 ccx->ifs_t4_avg_mask); in rtw89_phy_ifs_clm_get_result()
5566 env->ifs_clm_cca[0] = in rtw89_phy_ifs_clm_get_result()
5567 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_l_addr, in rtw89_phy_ifs_clm_get_result()
5568 ccx->ifs_t1_cca_mask); in rtw89_phy_ifs_clm_get_result()
5569 env->ifs_clm_cca[1] = in rtw89_phy_ifs_clm_get_result()
5570 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_l_addr, in rtw89_phy_ifs_clm_get_result()
5571 ccx->ifs_t2_cca_mask); in rtw89_phy_ifs_clm_get_result()
5572 env->ifs_clm_cca[2] = in rtw89_phy_ifs_clm_get_result()
5573 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_h_addr, in rtw89_phy_ifs_clm_get_result()
5574 ccx->ifs_t3_cca_mask); in rtw89_phy_ifs_clm_get_result()
5575 env->ifs_clm_cca[3] = in rtw89_phy_ifs_clm_get_result()
5576 rtw89_phy_read32_mask(rtwdev, ccx->ifs_cca_h_addr, in rtw89_phy_ifs_clm_get_result()
5577 ccx->ifs_t4_cca_mask); in rtw89_phy_ifs_clm_get_result()
5579 env->ifs_clm_total_ifs = in rtw89_phy_ifs_clm_get_result()
5580 rtw89_phy_read32_mask(rtwdev, ccx->ifs_total_addr, in rtw89_phy_ifs_clm_get_result()
5581 ccx->ifs_total_mask); in rtw89_phy_ifs_clm_get_result()
5583 rtw89_debug(rtwdev, RTW89_DBG_PHY_TRACK, "IFS-CLM total_ifs = %d\n", in rtw89_phy_ifs_clm_get_result()
5584 env->ifs_clm_total_ifs); in rtw89_phy_ifs_clm_get_result()
5587 env->ifs_clm_tx, env->ifs_clm_edcca_excl_cca); in rtw89_phy_ifs_clm_get_result()
5589 "IFS-CLM FA{CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_result()
5590 env->ifs_clm_cckfa, env->ifs_clm_ofdmfa); in rtw89_phy_ifs_clm_get_result()
5592 "IFS-CLM CCA_exclu_FA{CCK, OFDM} = {%d, %d}\n", in rtw89_phy_ifs_clm_get_result()
5593 env->ifs_clm_cckcca_excl_fa, env->ifs_clm_ofdmcca_excl_fa); in rtw89_phy_ifs_clm_get_result()
5598 "T%d:[%d, %d, %d]\n", i + 1, env->ifs_clm_his[i], in rtw89_phy_ifs_clm_get_result()
5599 env->ifs_clm_avg[i], env->ifs_clm_cca[i]); in rtw89_phy_ifs_clm_get_result()
5609 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_phy_ifs_clm_set()
5610 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_ifs_clm_set()
5611 const struct rtw89_ccx_regs *ccx = phy->ccx; in rtw89_phy_ifs_clm_set()
5615 if (para->mntr_time == 0) { in rtw89_phy_ifs_clm_set()
5618 return -EINVAL; in rtw89_phy_ifs_clm_set()
5621 if (rtw89_phy_ccx_racing_ctrl(rtwdev, para->rac_lv)) in rtw89_phy_ifs_clm_set()
5622 return -EINVAL; in rtw89_phy_ifs_clm_set()
5624 if (para->mntr_time != env->ifs_clm_mntr_time) { in rtw89_phy_ifs_clm_set()
5625 rtw89_phy_ccx_ms_to_period_unit(rtwdev, para->mntr_time, in rtw89_phy_ifs_clm_set()
5627 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, in rtw89_phy_ifs_clm_set()
5628 ccx->ifs_clm_period_mask, period); in rtw89_phy_ifs_clm_set()
5629 rtw89_phy_set_phy_regs(rtwdev, ccx->ifs_cnt_addr, in rtw89_phy_ifs_clm_set()
5630 ccx->ifs_clm_cnt_unit_mask, in rtw89_phy_ifs_clm_set()
5634 "Update IFS-CLM time ((%d)) -> ((%d))\n", in rtw89_phy_ifs_clm_set()
5635 env->ifs_clm_mntr_time, para->mntr_time); in rtw89_phy_ifs_clm_set()
5637 env->ifs_clm_mntr_time = para->mntr_time; in rtw89_phy_ifs_clm_set()
5638 env->ccx_period = (u16)period; in rtw89_phy_ifs_clm_set()
5639 env->ccx_unit_idx = (u8)unit_idx; in rtw89_phy_ifs_clm_set()
5643 env->ifs_clm_app = para->ifs_clm_app; in rtw89_phy_ifs_clm_set()
5652 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_env_monitor_track()
5656 env->ccx_watchdog_result = RTW89_PHY_ENV_MON_CCX_FAIL; in rtw89_phy_env_monitor_track()
5657 if (env->ccx_manual_ctrl) { in rtw89_phy_env_monitor_track()
5665 env->ccx_watchdog_result |= RTW89_PHY_ENV_MON_IFS_CLM; in rtw89_phy_env_monitor_track()
5679 env->ccx_watchdog_result, chk_result); in rtw89_phy_env_monitor_track()
5688 *ie_page -= 1; in rtw89_physts_ie_page_valid()
5718 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_physts_set_ie_bitmap()
5724 if (chip->chip_id == RTL8852A) in rtw89_physts_set_ie_bitmap()
5750 const struct rtw89_phy_gen_def *phy = rtwdev->chip->phy_def; in rtw89_physts_enable_fail_report()
5751 const struct rtw89_physts_regs *physts = phy->physts; in rtw89_physts_enable_fail_report()
5754 rtw89_phy_write32_idx_clr(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5755 physts->dis_trigger_fail_mask, phy_idx); in rtw89_physts_enable_fail_report()
5756 rtw89_phy_write32_idx_clr(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5757 physts->dis_trigger_brk_mask, phy_idx); in rtw89_physts_enable_fail_report()
5759 rtw89_phy_write32_idx_set(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5760 physts->dis_trigger_fail_mask, phy_idx); in rtw89_physts_enable_fail_report()
5761 rtw89_phy_write32_idx_set(rtwdev, physts->setting_addr, in rtw89_physts_enable_fail_report()
5762 physts->dis_trigger_brk_mask, phy_idx); in rtw89_physts_enable_fail_report()
5798 if (rtwdev->dbcc_en) in rtw89_physts_parsing_init()
5804 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_dig_read_gain_table()
5805 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_read_gain_table()
5815 gain_arr = dig->lna_gain_g; in rtw89_phy_dig_read_gain_table()
5817 cfg = chip->dig_table->cfg_lna_g; in rtw89_phy_dig_read_gain_table()
5821 gain_arr = dig->tia_gain_g; in rtw89_phy_dig_read_gain_table()
5823 cfg = chip->dig_table->cfg_tia_g; in rtw89_phy_dig_read_gain_table()
5827 gain_arr = dig->lna_gain_a; in rtw89_phy_dig_read_gain_table()
5829 cfg = chip->dig_table->cfg_lna_a; in rtw89_phy_dig_read_gain_table()
5833 gain_arr = dig->tia_gain_a; in rtw89_phy_dig_read_gain_table()
5835 cfg = chip->dig_table->cfg_tia_a; in rtw89_phy_dig_read_gain_table()
5842 for (i = 0; i < cfg->size; i++) { in rtw89_phy_dig_read_gain_table()
5843 tmp = rtw89_phy_read32_mask(rtwdev, cfg->table[i].addr, in rtw89_phy_dig_read_gain_table()
5844 cfg->table[i].mask); in rtw89_phy_dig_read_gain_table()
5856 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_update_gain_para()
5860 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_update_gain_para()
5865 dig->ib_pkpwr = sign_extend32(tmp >> DIG_GAIN_SHIFT, U8_MAX_BIT); in rtw89_phy_dig_update_gain_para()
5866 dig->ib_pbk = rtw89_phy_read32_mask(rtwdev, R_PATH0_IB_PBK, in rtw89_phy_dig_update_gain_para()
5869 dig->ib_pkpwr, dig->ib_pbk); in rtw89_phy_dig_update_gain_para()
5883 struct rtw89_phy_ch_info *ch_info = &rtwdev->ch_info; in rtw89_phy_dig_update_rssi_info()
5884 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_update_rssi_info()
5885 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig_update_rssi_info()
5888 dig->igi_rssi = ch_info->rssi_min >> 1; in rtw89_phy_dig_update_rssi_info()
5890 rtw89_debug(rtwdev, RTW89_DBG_DIG, "RSSI update : NO Link\n"); in rtw89_phy_dig_update_rssi_info()
5891 dig->igi_rssi = rssi_nolink; in rtw89_phy_dig_update_rssi_info()
5897 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_update_para()
5899 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig_update_para()
5902 switch (chan->band_type) { in rtw89_phy_dig_update_para()
5904 dig->lna_gain = dig->lna_gain_g; in rtw89_phy_dig_update_para()
5905 dig->tia_gain = dig->tia_gain_g; in rtw89_phy_dig_update_para()
5907 dig->force_gaincode_idx_en = false; in rtw89_phy_dig_update_para()
5908 dig->dyn_pd_th_en = true; in rtw89_phy_dig_update_para()
5912 dig->lna_gain = dig->lna_gain_a; in rtw89_phy_dig_update_para()
5913 dig->tia_gain = dig->tia_gain_a; in rtw89_phy_dig_update_para()
5915 dig->force_gaincode_idx_en = true; in rtw89_phy_dig_update_para()
5916 dig->dyn_pd_th_en = true; in rtw89_phy_dig_update_para()
5919 memcpy(dig->fa_th, fa_th_src, sizeof(dig->fa_th)); in rtw89_phy_dig_update_para()
5920 memcpy(dig->igi_rssi_th, igi_rssi_th, sizeof(dig->igi_rssi_th)); in rtw89_phy_dig_update_para()
5929 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_para_reset()
5931 dig->cur_gaincode.lna_idx = LNA_IDX_MAX; in rtw89_phy_dig_para_reset()
5932 dig->cur_gaincode.tia_idx = TIA_IDX_MAX; in rtw89_phy_dig_para_reset()
5933 dig->cur_gaincode.rxb_idx = RXB_IDX_MAX; in rtw89_phy_dig_para_reset()
5934 dig->force_gaincode.lna_idx = LNA_IDX_MAX; in rtw89_phy_dig_para_reset()
5935 dig->force_gaincode.tia_idx = TIA_IDX_MAX; in rtw89_phy_dig_para_reset()
5936 dig->force_gaincode.rxb_idx = RXB_IDX_MAX; in rtw89_phy_dig_para_reset()
5938 dig->dyn_igi_max = igi_max_performance_mode; in rtw89_phy_dig_para_reset()
5939 dig->dyn_igi_min = dynamic_igi_min; in rtw89_phy_dig_para_reset()
5940 dig->dyn_pd_th_max = dynamic_pd_threshold_max; in rtw89_phy_dig_para_reset()
5941 dig->pd_low_th_ofst = pd_low_th_offset; in rtw89_phy_dig_para_reset()
5942 dig->is_linked_pre = false; in rtw89_phy_dig_para_reset()
5953 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_lna_idx_by_rssi()
5956 if (rssi < dig->igi_rssi_th[0]) in rtw89_phy_dig_lna_idx_by_rssi()
5958 else if (rssi < dig->igi_rssi_th[1]) in rtw89_phy_dig_lna_idx_by_rssi()
5960 else if (rssi < dig->igi_rssi_th[2]) in rtw89_phy_dig_lna_idx_by_rssi()
5962 else if (rssi < dig->igi_rssi_th[3]) in rtw89_phy_dig_lna_idx_by_rssi()
5964 else if (rssi < dig->igi_rssi_th[4]) in rtw89_phy_dig_lna_idx_by_rssi()
5974 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_tia_idx_by_rssi()
5977 if (rssi < dig->igi_rssi_th[0]) in rtw89_phy_dig_tia_idx_by_rssi()
5990 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_rxb_idx_by_rssi()
5991 s8 lna_gain = dig->lna_gain[set->lna_idx]; in rtw89_phy_dig_rxb_idx_by_rssi()
5992 s8 tia_gain = dig->tia_gain[set->tia_idx]; in rtw89_phy_dig_rxb_idx_by_rssi()
5997 rxb_idx_tmp += dig->ib_pkpwr - dig->ib_pbk - wb_rssi; in rtw89_phy_dig_rxb_idx_by_rssi()
6009 set->lna_idx = rtw89_phy_dig_lna_idx_by_rssi(rtwdev, rssi); in rtw89_phy_dig_gaincode_by_rssi()
6010 set->tia_idx = rtw89_phy_dig_tia_idx_by_rssi(rtwdev, rssi); in rtw89_phy_dig_gaincode_by_rssi()
6011 set->rxb_idx = rtw89_phy_dig_rxb_idx_by_rssi(rtwdev, rssi, set); in rtw89_phy_dig_gaincode_by_rssi()
6015 rssi, set->lna_idx, set->tia_idx, set->rxb_idx); in rtw89_phy_dig_gaincode_by_rssi()
6022 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_igi_offset_by_env()
6023 struct rtw89_env_monitor_info *env = &rtwdev->env_monitor; in rtw89_phy_dig_igi_offset_by_env()
6025 u8 igi_offset = dig->fa_rssi_ofst; in rtw89_phy_dig_igi_offset_by_env()
6028 fa_ratio = env->ifs_clm_cck_fa_permil + env->ifs_clm_ofdm_fa_permil; in rtw89_phy_dig_igi_offset_by_env()
6030 if (fa_ratio < dig->fa_th[0]) in rtw89_phy_dig_igi_offset_by_env()
6032 else if (fa_ratio < dig->fa_th[1]) in rtw89_phy_dig_igi_offset_by_env()
6034 else if (fa_ratio < dig->fa_th[2]) in rtw89_phy_dig_igi_offset_by_env()
6036 else if (fa_ratio < dig->fa_th[3]) in rtw89_phy_dig_igi_offset_by_env()
6047 dig->fa_rssi_ofst = igi_offset; in rtw89_phy_dig_igi_offset_by_env()
6050 "fa_th: [+6 (%d) +4 (%d) +2 (%d) 0 (%d) -2 ]\n", in rtw89_phy_dig_igi_offset_by_env()
6051 dig->fa_th[3], dig->fa_th[2], dig->fa_th[1], dig->fa_th[0]); in rtw89_phy_dig_igi_offset_by_env()
6055 env->ifs_clm_cck_fa_permil, env->ifs_clm_ofdm_fa_permil, in rtw89_phy_dig_igi_offset_by_env()
6056 env->ifs_clm_cck_fa_permil + env->ifs_clm_ofdm_fa_permil, in rtw89_phy_dig_igi_offset_by_env()
6062 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_lna_idx()
6064 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_lna_init.addr, in rtw89_phy_dig_set_lna_idx()
6065 dig_regs->p0_lna_init.mask, lna_idx); in rtw89_phy_dig_set_lna_idx()
6066 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_lna_init.addr, in rtw89_phy_dig_set_lna_idx()
6067 dig_regs->p1_lna_init.mask, lna_idx); in rtw89_phy_dig_set_lna_idx()
6072 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_tia_idx()
6074 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_tia_init.addr, in rtw89_phy_dig_set_tia_idx()
6075 dig_regs->p0_tia_init.mask, tia_idx); in rtw89_phy_dig_set_tia_idx()
6076 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_tia_init.addr, in rtw89_phy_dig_set_tia_idx()
6077 dig_regs->p1_tia_init.mask, tia_idx); in rtw89_phy_dig_set_tia_idx()
6082 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_set_rxb_idx()
6084 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_rxb_init.addr, in rtw89_phy_dig_set_rxb_idx()
6085 dig_regs->p0_rxb_init.mask, rxb_idx); in rtw89_phy_dig_set_rxb_idx()
6086 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_rxb_init.addr, in rtw89_phy_dig_set_rxb_idx()
6087 dig_regs->p1_rxb_init.mask, rxb_idx); in rtw89_phy_dig_set_rxb_idx()
6093 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_set_igi_cr()
6107 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_sdagc_follow_pagc_config()
6109 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_p20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
6110 dig_regs->p0_p20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
6111 rtw89_phy_write32_mask(rtwdev, dig_regs->p0_s20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
6112 dig_regs->p0_s20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
6113 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_p20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
6114 dig_regs->p1_p20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
6115 rtw89_phy_write32_mask(rtwdev, dig_regs->p1_s20_pagcugc_en.addr, in rtw89_phy_dig_sdagc_follow_pagc_config()
6116 dig_regs->p1_s20_pagcugc_en.mask, enable); in rtw89_phy_dig_sdagc_follow_pagc_config()
6123 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_config_igi()
6125 if (!rtwdev->hal.support_igi) in rtw89_phy_dig_config_igi()
6128 if (dig->force_gaincode_idx_en) { in rtw89_phy_dig_config_igi()
6129 rtw89_phy_dig_set_igi_cr(rtwdev, dig->force_gaincode); in rtw89_phy_dig_config_igi()
6133 rtw89_phy_dig_gaincode_by_rssi(rtwdev, dig->igi_fa_rssi, in rtw89_phy_dig_config_igi()
6134 &dig->cur_gaincode); in rtw89_phy_dig_config_igi()
6135 rtw89_phy_dig_set_igi_cr(rtwdev, dig->cur_gaincode); in rtw89_phy_dig_config_igi()
6143 const struct rtw89_dig_regs *dig_regs = rtwdev->chip->dig_regs; in rtw89_phy_dig_dyn_pd_th()
6144 enum rtw89_bandwidth cbw = chan->band_width; in rtw89_phy_dig_dyn_pd_th()
6145 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_dyn_pd_th()
6146 u8 final_rssi = 0, under_region = dig->pd_low_th_ofst; in rtw89_phy_dig_dyn_pd_th()
6151 if (rtwdev->chip->chip_gen == RTW89_CHIP_AX) in rtw89_phy_dig_dyn_pd_th()
6171 dig->dyn_pd_th_max = dig->igi_rssi; in rtw89_phy_dig_dyn_pd_th()
6173 final_rssi = min_t(u8, rssi, dig->igi_rssi); in rtw89_phy_dig_dyn_pd_th()
6178 pd_val = (ofdm_cca_th - under_region - PD_TH_MIN_RSSI) >> 1; in rtw89_phy_dig_dyn_pd_th()
6187 rtw89_phy_write32_mask(rtwdev, dig_regs->seg0_pd_reg, in rtw89_phy_dig_dyn_pd_th()
6188 dig_regs->pd_lower_bound_mask, pd_val); in rtw89_phy_dig_dyn_pd_th()
6189 rtw89_phy_write32_mask(rtwdev, dig_regs->seg0_pd_reg, in rtw89_phy_dig_dyn_pd_th()
6190 dig_regs->pd_spatial_reuse_en, enable); in rtw89_phy_dig_dyn_pd_th()
6192 if (!rtwdev->hal.support_cckpd) in rtw89_phy_dig_dyn_pd_th()
6195 cck_cca_th = max_t(s8, final_rssi - under_region, CCKPD_TH_MIN_RSSI); in rtw89_phy_dig_dyn_pd_th()
6196 pd_val = (u32)(cck_cca_th - IGI_RSSI_MAX); in rtw89_phy_dig_dyn_pd_th()
6202 rtw89_phy_write32_mask(rtwdev, dig_regs->bmode_pd_reg, in rtw89_phy_dig_dyn_pd_th()
6203 dig_regs->bmode_cca_rssi_limit_en, enable); in rtw89_phy_dig_dyn_pd_th()
6204 rtw89_phy_write32_mask(rtwdev, dig_regs->bmode_pd_lower_bound_reg, in rtw89_phy_dig_dyn_pd_th()
6205 dig_regs->bmode_rssi_nocca_low_th_mask, pd_val); in rtw89_phy_dig_dyn_pd_th()
6210 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig_reset()
6212 dig->bypass_dig = false; in rtw89_phy_dig_reset()
6214 rtw89_phy_dig_set_igi_cr(rtwdev, dig->force_gaincode); in rtw89_phy_dig_reset()
6224 struct rtw89_dig_info *dig = &rtwdev->dig; in rtw89_phy_dig()
6225 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_dig()
6228 if (unlikely(dig->bypass_dig)) { in rtw89_phy_dig()
6229 dig->bypass_dig = false; in rtw89_phy_dig()
6235 if (!dig->is_linked_pre && is_linked) { in rtw89_phy_dig()
6238 dig->igi_fa_rssi = dig->igi_rssi; in rtw89_phy_dig()
6239 } else if (dig->is_linked_pre && !is_linked) { in rtw89_phy_dig()
6242 dig->igi_fa_rssi = dig->igi_rssi; in rtw89_phy_dig()
6244 dig->is_linked_pre = is_linked; in rtw89_phy_dig()
6248 igi_min = max_t(int, dig->igi_rssi - IGI_RSSI_MIN, 0); in rtw89_phy_dig()
6249 dig->dyn_igi_max = min(igi_min + IGI_OFFSET_MAX, igi_max_performance_mode); in rtw89_phy_dig()
6250 dig->dyn_igi_min = max(igi_min, ABS_IGI_MIN); in rtw89_phy_dig()
6252 if (dig->dyn_igi_max >= dig->dyn_igi_min) { in rtw89_phy_dig()
6253 dig->igi_fa_rssi += dig->fa_rssi_ofst; in rtw89_phy_dig()
6254 dig->igi_fa_rssi = clamp(dig->igi_fa_rssi, dig->dyn_igi_min, in rtw89_phy_dig()
6255 dig->dyn_igi_max); in rtw89_phy_dig()
6257 dig->igi_fa_rssi = dig->dyn_igi_max; in rtw89_phy_dig()
6262 dig->igi_rssi, dig->dyn_igi_max, dig->dyn_igi_min, in rtw89_phy_dig()
6263 dig->igi_fa_rssi); in rtw89_phy_dig()
6267 rtw89_phy_dig_dyn_pd_th(rtwdev, dig->igi_fa_rssi, dig->dyn_pd_th_en); in rtw89_phy_dig()
6269 if (dig->dyn_pd_th_en && dig->igi_fa_rssi > dig->dyn_pd_th_max) in rtw89_phy_dig()
6278 struct rtw89_hal *hal = &rtwdev->hal; in __rtw89_phy_tx_path_div_sta_iter()
6282 rssi_a = ewma_rssi_read(&rtwsta_link->rssi[RF_PATH_A]); in __rtw89_phy_tx_path_div_sta_iter()
6283 rssi_b = ewma_rssi_read(&rtwsta_link->rssi[RF_PATH_B]); in __rtw89_phy_tx_path_div_sta_iter()
6292 if (hal->antenna_tx == candidate) in __rtw89_phy_tx_path_div_sta_iter()
6295 hal->antenna_tx = candidate; in __rtw89_phy_tx_path_div_sta_iter()
6298 if (hal->antenna_tx == RF_A) { in __rtw89_phy_tx_path_div_sta_iter()
6301 } else if (hal->antenna_tx == RF_B) { in __rtw89_phy_tx_path_div_sta_iter()
6310 struct rtw89_dev *rtwdev = rtwsta->rtwdev; in rtw89_phy_tx_path_div_sta_iter()
6311 struct rtw89_vif *rtwvif = rtwsta->rtwvif; in rtw89_phy_tx_path_div_sta_iter()
6321 if (sta->tdls) in rtw89_phy_tx_path_div_sta_iter()
6328 rtwvif_link = rtwsta_link->rtwvif_link; in rtw89_phy_tx_path_div_sta_iter()
6329 if (rtwvif_link->wifi_role != RTW89_WIFI_ROLE_STATION) in rtw89_phy_tx_path_div_sta_iter()
6340 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_tx_path_div_track()
6343 if (!hal->tx_path_diversity) in rtw89_phy_tx_path_div_track()
6346 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_phy_tx_path_div_track()
6356 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_set_ant()
6359 if (!hal->ant_diversity || hal->antenna_tx == 0) in rtw89_phy_antdiv_set_ant()
6362 if (hal->antenna_tx == RF_B) { in rtw89_phy_antdiv_set_ant()
6382 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_swap_hal_antenna()
6384 hal->antenna_rx = hal->antenna_rx == RF_A ? RF_B : RF_A; in rtw89_phy_swap_hal_antenna()
6385 hal->antenna_tx = hal->antenna_rx; in rtw89_phy_swap_hal_antenna()
6390 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_decision_state()
6391 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_decision_state()
6397 antdiv->get_stats = false; in rtw89_phy_antdiv_decision_state()
6398 antdiv->training_count = 0; in rtw89_phy_antdiv_decision_state()
6400 main_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->main_stats); in rtw89_phy_antdiv_decision_state()
6401 main_evm = rtw89_phy_antdiv_sts_instance_get_evm(&antdiv->main_stats); in rtw89_phy_antdiv_decision_state()
6402 aux_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->aux_stats); in rtw89_phy_antdiv_decision_state()
6403 aux_evm = rtw89_phy_antdiv_sts_instance_get_evm(&antdiv->aux_stats); in rtw89_phy_antdiv_decision_state()
6422 hal->antenna_tx = candidate; in rtw89_phy_antdiv_decision_state()
6423 hal->antenna_rx = candidate; in rtw89_phy_antdiv_decision_state()
6428 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_training_state()
6431 if (antdiv->training_count % 2 == 0) { in rtw89_phy_antdiv_training_state()
6432 if (antdiv->training_count == 0) in rtw89_phy_antdiv_training_state()
6435 antdiv->get_stats = true; in rtw89_phy_antdiv_training_state()
6438 antdiv->get_stats = false; in rtw89_phy_antdiv_training_state()
6445 antdiv->training_count++; in rtw89_phy_antdiv_training_state()
6446 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->antdiv_work, in rtw89_phy_antdiv_training_state()
6454 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_work()
6456 mutex_lock(&rtwdev->mutex); in rtw89_phy_antdiv_work()
6458 if (antdiv->training_count <= ANTDIV_TRAINNING_CNT) { in rtw89_phy_antdiv_work()
6465 mutex_unlock(&rtwdev->mutex); in rtw89_phy_antdiv_work()
6470 struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; in rtw89_phy_antdiv_track()
6471 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_antdiv_track()
6474 if (!hal->ant_diversity || hal->ant_diversity_fixed) in rtw89_phy_antdiv_track()
6477 rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->target_stats); in rtw89_phy_antdiv_track()
6478 rssi_pre = antdiv->rssi_pre; in rtw89_phy_antdiv_track()
6479 antdiv->rssi_pre = rssi; in rtw89_phy_antdiv_track()
6480 rtw89_phy_antdiv_sts_instance_reset(&antdiv->target_stats); in rtw89_phy_antdiv_track()
6482 if (abs((int)rssi - (int)rssi_pre) < ANTDIV_RSSI_DIFF_TH) in rtw89_phy_antdiv_track()
6485 antdiv->training_count = 0; in rtw89_phy_antdiv_track()
6486 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->antdiv_work, 0); in rtw89_phy_antdiv_track()
6497 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_edcca_init()
6498 struct rtw89_edcca_bak *edcca_bak = &rtwdev->hal.edcca_bak; in rtw89_phy_edcca_init()
6502 if (rtwdev->chip->chip_id == RTL8922A && rtwdev->hal.cv == CHIP_CAV) { in rtw89_phy_edcca_init()
6514 rtw89_phy_write32_mask(rtwdev, edcca_regs->tx_collision_t2r_st, in rtw89_phy_edcca_init()
6515 edcca_regs->tx_collision_t2r_st_mask, 0x29); in rtw89_phy_edcca_init()
6554 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_set_bss_color()
6555 const struct rtw89_reg_def *bss_clr_vld = &chip->bss_clr_vld; in rtw89_phy_set_bss_color()
6556 enum rtw89_phy_idx phy_idx = rtwvif_link->phy_idx; in rtw89_phy_set_bss_color()
6563 if (!bss_conf->he_support || !vif->cfg.assoc) { in rtw89_phy_set_bss_color()
6568 bss_color = bss_conf->he_bss_color.color; in rtw89_phy_set_bss_color()
6572 rtw89_phy_write32_idx(rtwdev, bss_clr_vld->addr, bss_clr_vld->mask, 0x1, in rtw89_phy_set_bss_color()
6574 rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_TGT, in rtw89_phy_set_bss_color()
6576 rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_STAID, in rtw89_phy_set_bss_color()
6577 vif->cfg.aid, phy_idx); in rtw89_phy_set_bss_color()
6582 return desc->ch != 0; in rfk_chan_validate_desc()
6591 if (desc->ch != chan->channel) in rfk_chan_is_equivalent()
6594 if (desc->has_band && desc->band != chan->band_type) in rfk_chan_is_equivalent()
6597 if (desc->has_bw && desc->bw != chan->band_width) in rfk_chan_is_equivalent()
6612 if (rfk_chan_is_equivalent(&iter_data->desc, chan)) in rfk_chan_iter_search()
6613 iter_data->found++; in rfk_chan_iter_search()
6622 int sel = -1; in rtw89_rfk_chan_lookup()
6634 if (!iter_data.found && sel == -1) in rtw89_rfk_chan_lookup()
6638 if (sel == -1) { in rtw89_rfk_chan_lookup()
6640 "no idle rfk entry; force replace the first\n"); in rtw89_rfk_chan_lookup()
6651 rtw89_write_rf(rtwdev, def->path, def->addr, def->mask, def->data); in _rfk_write_rf()
6657 rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data); in _rfk_write32_mask()
6663 rtw89_phy_write32_set(rtwdev, def->addr, def->mask); in _rfk_write32_set()
6669 rtw89_phy_write32_clr(rtwdev, def->addr, def->mask); in _rfk_write32_clr()
6675 udelay(def->data); in _rfk_delay()
6692 const struct rtw89_reg5_def *p = tbl->defs; in rtw89_rfk_parser()
6693 const struct rtw89_reg5_def *end = tbl->defs + tbl->size; in rtw89_rfk_parser()
6696 _rfk_handler[p->flag](rtwdev, p); in rtw89_rfk_parser()
6777 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_phy_tssi_ctrl_set_bandedge_cfg()
6791 data = chip->tssi_dbw_table->data[bandedge_cfg]; in rtw89_phy_tssi_ctrl_set_bandedge_cfg()
6843 for (idx = last; idx >= first; idx--) in rtw89_encode_chan_idx()
6854 (central_ch - rtw89_ch_base_table[idx]) >> 1); in rtw89_encode_chan_idx()
6880 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_config_edcca()
6881 struct rtw89_edcca_bak *edcca_bak = &rtwdev->hal.edcca_bak; in rtw89_phy_config_edcca()
6884 edcca_bak->a = in rtw89_phy_config_edcca()
6885 rtw89_phy_read32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6886 edcca_regs->edcca_mask); in rtw89_phy_config_edcca()
6887 edcca_bak->p = in rtw89_phy_config_edcca()
6888 rtw89_phy_read32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6889 edcca_regs->edcca_p_mask); in rtw89_phy_config_edcca()
6890 edcca_bak->ppdu = in rtw89_phy_config_edcca()
6891 rtw89_phy_read32_mask(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_config_edcca()
6892 edcca_regs->ppdu_mask); in rtw89_phy_config_edcca()
6894 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6895 edcca_regs->edcca_mask, EDCCA_MAX); in rtw89_phy_config_edcca()
6896 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6897 edcca_regs->edcca_p_mask, EDCCA_MAX); in rtw89_phy_config_edcca()
6898 rtw89_phy_write32_mask(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_config_edcca()
6899 edcca_regs->ppdu_mask, EDCCA_MAX); in rtw89_phy_config_edcca()
6901 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6902 edcca_regs->edcca_mask, in rtw89_phy_config_edcca()
6903 edcca_bak->a); in rtw89_phy_config_edcca()
6904 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_config_edcca()
6905 edcca_regs->edcca_p_mask, in rtw89_phy_config_edcca()
6906 edcca_bak->p); in rtw89_phy_config_edcca()
6907 rtw89_phy_write32_mask(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_config_edcca()
6908 edcca_regs->ppdu_mask, in rtw89_phy_config_edcca()
6909 edcca_bak->ppdu); in rtw89_phy_config_edcca()
6915 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_edcca_log()
6925 if (rtwdev->chip->chip_id == RTL8922A) in rtw89_phy_edcca_log()
6926 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel_be, in rtw89_phy_edcca_log()
6927 edcca_regs->rpt_sel_be_mask, 0); in rtw89_phy_edcca_log()
6929 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6930 edcca_regs->rpt_sel_mask, 0); in rtw89_phy_edcca_log()
6931 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_b); in rtw89_phy_edcca_log()
6942 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6943 edcca_regs->rpt_sel_mask, 4); in rtw89_phy_edcca_log()
6944 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_b); in rtw89_phy_edcca_log()
6948 per20_bitmap = rtw89_phy_read32_mask(rtwdev, edcca_regs->rpt_a, in rtw89_phy_edcca_log()
6951 if (rtwdev->chip->chip_id == RTL8922A) { in rtw89_phy_edcca_log()
6952 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel_be, in rtw89_phy_edcca_log()
6953 edcca_regs->rpt_sel_be_mask, 4); in rtw89_phy_edcca_log()
6954 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_b); in rtw89_phy_edcca_log()
6960 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel_be, in rtw89_phy_edcca_log()
6961 edcca_regs->rpt_sel_be_mask, 5); in rtw89_phy_edcca_log()
6962 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_b); in rtw89_phy_edcca_log()
6968 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6969 edcca_regs->rpt_sel_mask, 0); in rtw89_phy_edcca_log()
6970 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_a); in rtw89_phy_edcca_log()
6974 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6975 edcca_regs->rpt_sel_mask, 1); in rtw89_phy_edcca_log()
6976 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_a); in rtw89_phy_edcca_log()
6980 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6981 edcca_regs->rpt_sel_mask, 2); in rtw89_phy_edcca_log()
6982 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_a); in rtw89_phy_edcca_log()
6986 rtw89_phy_write32_mask(rtwdev, edcca_regs->rpt_sel, in rtw89_phy_edcca_log()
6987 edcca_regs->rpt_sel_mask, 3); in rtw89_phy_edcca_log()
6988 tmp = rtw89_phy_read32(rtwdev, edcca_regs->rpt_a); in rtw89_phy_edcca_log()
7012 struct rtw89_phy_ch_info *ch_info = &rtwdev->ch_info; in rtw89_phy_edcca_get_thre_by_rssi()
7013 bool is_linked = rtwdev->total_sta_assoc > 0; in rtw89_phy_edcca_get_thre_by_rssi()
7014 u8 rssi_min = ch_info->rssi_min >> 1; in rtw89_phy_edcca_get_thre_by_rssi()
7020 edcca_thre = rssi_min - RSSI_UNIT_CONVER + EDCCA_UNIT_CONVER - in rtw89_phy_edcca_get_thre_by_rssi()
7030 const struct rtw89_edcca_regs *edcca_regs = rtwdev->chip->edcca_regs; in rtw89_phy_edcca_thre_calc()
7031 struct rtw89_edcca_bak *edcca_bak = &rtwdev->hal.edcca_bak; in rtw89_phy_edcca_thre_calc()
7035 if (th == edcca_bak->th_old) in rtw89_phy_edcca_thre_calc()
7038 edcca_bak->th_old = th; in rtw89_phy_edcca_thre_calc()
7043 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_edcca_thre_calc()
7044 edcca_regs->edcca_mask, th); in rtw89_phy_edcca_thre_calc()
7045 rtw89_phy_write32_mask(rtwdev, edcca_regs->edcca_level, in rtw89_phy_edcca_thre_calc()
7046 edcca_regs->edcca_p_mask, th); in rtw89_phy_edcca_thre_calc()
7047 rtw89_phy_write32_mask(rtwdev, edcca_regs->ppdu_level, in rtw89_phy_edcca_thre_calc()
7048 edcca_regs->ppdu_mask, th); in rtw89_phy_edcca_thre_calc()
7053 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_phy_edcca_track()
7055 if (hal->disabled_dm_bitmap & BIT(RTW89_DM_DYNAMIC_EDCCA)) in rtw89_phy_edcca_track()
7067 rtwdev->dbcc_en, rtwdev->mlo_dbcc_mode, phy_idx); in rtw89_phy_get_kpath()
7069 switch (rtwdev->mlo_dbcc_mode) { in rtw89_phy_get_kpath()
7101 rtwdev->dbcc_en, rtwdev->mlo_dbcc_mode, phy_idx); in rtw89_phy_get_syn_sel()
7103 switch (rtwdev->mlo_dbcc_mode) { in rtw89_phy_get_syn_sel()