Lines Matching +full:rcv +full:- +full:sel
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
41 u32 val, enum rtw89_mac_mem_sel sel) in rtw89_mac_mem_write() argument
43 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_mem_write()
44 u32 addr = mac->mem_base_addrs[sel] + offset; in rtw89_mac_mem_write()
46 rtw89_write32(rtwdev, mac->filter_model_addr, addr); in rtw89_mac_mem_write()
47 rtw89_write32(rtwdev, mac->indir_access_addr, val); in rtw89_mac_mem_write()
51 enum rtw89_mac_mem_sel sel) in rtw89_mac_mem_read() argument
53 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_mem_read()
54 u32 addr = mac->mem_base_addrs[sel] + offset; in rtw89_mac_mem_read()
56 rtw89_write32(rtwdev, mac->filter_model_addr, addr); in rtw89_mac_mem_read()
57 return rtw89_read32(rtwdev, mac->indir_access_addr); in rtw89_mac_mem_read()
61 enum rtw89_mac_hwmod_sel sel) in rtw89_mac_check_mac_en_ax() argument
65 if (sel == RTW89_DMAC_SEL) { in rtw89_mac_check_mac_en_ax()
68 } else if (sel == RTW89_CMAC_SEL && mac_idx == 0) { in rtw89_mac_check_mac_en_ax()
71 } else if (sel == RTW89_CMAC_SEL && mac_idx == 1) { in rtw89_mac_check_mac_en_ax()
75 return -EINVAL; in rtw89_mac_check_mac_en_ax()
79 return -EFAULT; in rtw89_mac_check_mac_en_ax()
122 switch (ctrl->type) { in rtw89_mac_dle_dfi_cfg()
126 ctrl_data = FIELD_PREP(B_AX_WDE_DFI_TRGSEL_MASK, ctrl->target) | in rtw89_mac_dle_dfi_cfg()
127 FIELD_PREP(B_AX_WDE_DFI_ADDR_MASK, ctrl->addr) | in rtw89_mac_dle_dfi_cfg()
133 ctrl_data = FIELD_PREP(B_AX_PLE_DFI_TRGSEL_MASK, ctrl->target) | in rtw89_mac_dle_dfi_cfg()
134 FIELD_PREP(B_AX_PLE_DFI_ADDR_MASK, ctrl->addr) | in rtw89_mac_dle_dfi_cfg()
138 rtw89_warn(rtwdev, "[ERR] dfi ctrl type %d\n", ctrl->type); in rtw89_mac_dle_dfi_cfg()
139 return -EINVAL; in rtw89_mac_dle_dfi_cfg()
152 ctrl->out_data = rtw89_read32(rtwdev, data_reg); in rtw89_mac_dle_dfi_cfg()
162 ctrl.type = quota->dle_type; in rtw89_mac_dle_dfi_quota_cfg()
164 ctrl.addr = quota->qtaid; in rtw89_mac_dle_dfi_quota_cfg()
171 quota->rsv_pgnum = FIELD_GET(B_AX_DLE_RSV_PGNUM, ctrl.out_data); in rtw89_mac_dle_dfi_quota_cfg()
172 quota->use_pgnum = FIELD_GET(B_AX_DLE_USE_PGNUM, ctrl.out_data); in rtw89_mac_dle_dfi_quota_cfg()
182 ctrl.type = qempty->dle_type; in rtw89_mac_dle_dfi_qempty_cfg()
184 ctrl.addr = qempty->grpsel; in rtw89_mac_dle_dfi_qempty_cfg()
191 qempty->qempty = FIELD_GET(B_AX_DLE_QEMPTY_GRP, ctrl.out_data); in rtw89_mac_dle_dfi_qempty_cfg()
305 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_dump_l0_to_l1()
314 mac->dump_qta_lost(rtwdev); in rtw89_mac_dump_l0_to_l1()
323 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_dump_dmac_err_status()
343 if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_dmac_err_status()
360 if (chip->chip_id == RTL8852C) in rtw89_mac_dump_dmac_err_status()
369 if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_dmac_err_status()
398 rtw89_info(rtwdev, "sel=%x,R_AX_SEC_DEBUG2=0x%08x\n", in rtw89_mac_dump_dmac_err_status()
401 } else if (chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
452 if (chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
477 if (chip->chip_id == RTL8852C || chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
515 if (chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
529 if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_dmac_err_status()
555 if (chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
585 if (chip->chip_id == RTL8852C || chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
610 if (chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
619 if (chip->chip_id == RTL8922A) { in rtw89_mac_dump_dmac_err_status()
624 } else if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_dmac_err_status()
659 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_dump_cmac_err_status_ax()
699 if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_cmac_err_status_ax()
711 if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_cmac_err_status_ax()
730 if (chip->chip_id == RTL8852C) { in rtw89_mac_dump_cmac_err_status_ax()
757 rtw89_info(rtwdev, "--->\nerr=0x%x\n", err); in rtw89_mac_dump_err_status_ax()
771 rtwdev->hci.ops->dump_err_status(rtwdev); in rtw89_mac_dump_err_status_ax()
776 rtw89_info(rtwdev, "<---\n"); in rtw89_mac_dump_err_status_ax()
781 struct rtw89_ser *ser = &rtwdev->ser; in rtw89_mac_suppress_log()
785 if (rtwdev->chip->chip_id == RTL8852C) { in rtw89_mac_suppress_log()
797 set_bit(RTW89_SER_SUPPRESS_LOG, ser->flags); in rtw89_mac_suppress_log()
801 if (test_bit(RTW89_SER_SUPPRESS_LOG, ser->flags)) in rtw89_mac_suppress_log()
804 if (test_and_clear_bit(RTW89_SER_SUPPRESS_LOG, ser->flags)) in rtw89_mac_suppress_log()
814 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_get_err_status()
840 mac->dump_err_status(rtwdev, err); in rtw89_mac_get_err_status()
848 struct rtw89_ser *ser = &rtwdev->ser; in rtw89_mac_set_err_status()
853 rtw89_err(rtwdev, "Bad set-err-status value 0x%08x\n", err); in rtw89_mac_set_err_status()
854 return -EINVAL; in rtw89_mac_set_err_status()
861 return -EFAULT; in rtw89_mac_set_err_status()
866 if (ser->prehandle_l1 && in rtw89_mac_set_err_status()
878 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_reset_param()
880 u8 qta_mode = rtwdev->mac.dle_info.qta_mode; in hfc_reset_param()
882 switch (rtwdev->hci.type) { in hfc_reset_param()
884 param_ini = rtwdev->chip->hfc_param_ini[qta_mode]; in hfc_reset_param()
885 param->en = 0; in hfc_reset_param()
888 return -EINVAL; in hfc_reset_param()
892 param->pub_cfg = *param_ini.pub_cfg; in hfc_reset_param()
895 param->prec_cfg = *param_ini.prec_cfg; in hfc_reset_param()
898 param->ch_cfg = param_ini.ch_cfg; in hfc_reset_param()
900 memset(¶m->ch_info, 0, sizeof(param->ch_info)); in hfc_reset_param()
901 memset(¶m->pub_info, 0, sizeof(param->pub_info)); in hfc_reset_param()
902 param->mode = param_ini.mode; in hfc_reset_param()
909 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_ch_cfg_chk()
910 const struct rtw89_hfc_ch_cfg *ch_cfg = param->ch_cfg; in hfc_ch_cfg_chk()
911 const struct rtw89_hfc_pub_cfg *pub_cfg = ¶m->pub_cfg; in hfc_ch_cfg_chk()
912 const struct rtw89_hfc_prec_cfg *prec_cfg = ¶m->prec_cfg; in hfc_ch_cfg_chk()
915 return -EINVAL; in hfc_ch_cfg_chk()
917 if ((ch_cfg[ch].min && ch_cfg[ch].min < prec_cfg->ch011_prec) || in hfc_ch_cfg_chk()
918 ch_cfg[ch].max > pub_cfg->pub_max) in hfc_ch_cfg_chk()
919 return -EINVAL; in hfc_ch_cfg_chk()
921 return -EINVAL; in hfc_ch_cfg_chk()
928 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_pub_info_chk()
929 const struct rtw89_hfc_pub_cfg *cfg = ¶m->pub_cfg; in hfc_pub_info_chk()
930 struct rtw89_hfc_pub_info *info = ¶m->pub_info; in hfc_pub_info_chk()
932 if (info->g0_used + info->g1_used + info->pub_aval != cfg->pub_max) { in hfc_pub_info_chk()
933 if (rtwdev->chip->chip_id == RTL8852A) in hfc_pub_info_chk()
936 return -EFAULT; in hfc_pub_info_chk()
944 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_pub_cfg_chk()
945 const struct rtw89_hfc_pub_cfg *pub_cfg = ¶m->pub_cfg; in hfc_pub_cfg_chk()
947 if (pub_cfg->grp0 + pub_cfg->grp1 != pub_cfg->pub_max) in hfc_pub_cfg_chk()
948 return -EFAULT; in hfc_pub_cfg_chk()
955 const struct rtw89_chip_info *chip = rtwdev->chip; in hfc_ch_ctrl()
956 const struct rtw89_page_regs *regs = chip->page_regs; in hfc_ch_ctrl()
957 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_ch_ctrl()
958 const struct rtw89_hfc_ch_cfg *cfg = param->ch_cfg; in hfc_ch_ctrl()
971 return -EINVAL; in hfc_ch_ctrl()
976 rtw89_write32(rtwdev, regs->ach_page_ctrl + ch * 4, val); in hfc_ch_ctrl()
983 const struct rtw89_chip_info *chip = rtwdev->chip; in hfc_upd_ch_info()
984 const struct rtw89_page_regs *regs = chip->page_regs; in hfc_upd_ch_info()
985 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_upd_ch_info()
986 struct rtw89_hfc_ch_info *info = param->ch_info; in hfc_upd_ch_info()
987 const struct rtw89_hfc_ch_cfg *cfg = param->ch_cfg; in hfc_upd_ch_info()
996 return -EINVAL; in hfc_upd_ch_info()
998 val = rtw89_read32(rtwdev, regs->ach_page_info + ch * 4); in hfc_upd_ch_info()
1003 info[ch].used = cfg[ch].min - info[ch].aval; in hfc_upd_ch_info()
1010 const struct rtw89_chip_info *chip = rtwdev->chip; in hfc_pub_ctrl()
1011 const struct rtw89_page_regs *regs = chip->page_regs; in hfc_pub_ctrl()
1012 const struct rtw89_hfc_pub_cfg *cfg = &rtwdev->mac.hfc_param.pub_cfg; in hfc_pub_ctrl()
1024 val = u32_encode_bits(cfg->grp0, B_AX_PUBPG_G0_MASK) | in hfc_pub_ctrl()
1025 u32_encode_bits(cfg->grp1, B_AX_PUBPG_G1_MASK); in hfc_pub_ctrl()
1026 rtw89_write32(rtwdev, regs->pub_page_ctrl1, val); in hfc_pub_ctrl()
1028 val = u32_encode_bits(cfg->wp_thrd, B_AX_WP_THRD_MASK); in hfc_pub_ctrl()
1029 rtw89_write32(rtwdev, regs->wp_page_ctrl2, val); in hfc_pub_ctrl()
1036 const struct rtw89_chip_info *chip = rtwdev->chip; in hfc_get_mix_info_ax()
1037 const struct rtw89_page_regs *regs = chip->page_regs; in hfc_get_mix_info_ax()
1038 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_get_mix_info_ax()
1039 struct rtw89_hfc_pub_cfg *pub_cfg = ¶m->pub_cfg; in hfc_get_mix_info_ax()
1040 struct rtw89_hfc_prec_cfg *prec_cfg = ¶m->prec_cfg; in hfc_get_mix_info_ax()
1041 struct rtw89_hfc_pub_info *info = ¶m->pub_info; in hfc_get_mix_info_ax()
1044 val = rtw89_read32(rtwdev, regs->pub_page_info1); in hfc_get_mix_info_ax()
1045 info->g0_used = u32_get_bits(val, B_AX_G0_USE_PG_MASK); in hfc_get_mix_info_ax()
1046 info->g1_used = u32_get_bits(val, B_AX_G1_USE_PG_MASK); in hfc_get_mix_info_ax()
1047 val = rtw89_read32(rtwdev, regs->pub_page_info3); in hfc_get_mix_info_ax()
1048 info->g0_aval = u32_get_bits(val, B_AX_G0_AVAL_PG_MASK); in hfc_get_mix_info_ax()
1049 info->g1_aval = u32_get_bits(val, B_AX_G1_AVAL_PG_MASK); in hfc_get_mix_info_ax()
1050 info->pub_aval = in hfc_get_mix_info_ax()
1051 u32_get_bits(rtw89_read32(rtwdev, regs->pub_page_info2), in hfc_get_mix_info_ax()
1053 info->wp_aval = in hfc_get_mix_info_ax()
1054 u32_get_bits(rtw89_read32(rtwdev, regs->wp_page_info1), in hfc_get_mix_info_ax()
1057 val = rtw89_read32(rtwdev, regs->hci_fc_ctrl); in hfc_get_mix_info_ax()
1058 param->en = val & B_AX_HCI_FC_EN ? 1 : 0; in hfc_get_mix_info_ax()
1059 param->h2c_en = val & B_AX_HCI_FC_CH12_EN ? 1 : 0; in hfc_get_mix_info_ax()
1060 param->mode = u32_get_bits(val, B_AX_HCI_FC_MODE_MASK); in hfc_get_mix_info_ax()
1061 prec_cfg->ch011_full_cond = in hfc_get_mix_info_ax()
1063 prec_cfg->h2c_full_cond = in hfc_get_mix_info_ax()
1065 prec_cfg->wp_ch07_full_cond = in hfc_get_mix_info_ax()
1067 prec_cfg->wp_ch811_full_cond = in hfc_get_mix_info_ax()
1070 val = rtw89_read32(rtwdev, regs->ch_page_ctrl); in hfc_get_mix_info_ax()
1071 prec_cfg->ch011_prec = u32_get_bits(val, B_AX_PREC_PAGE_CH011_MASK); in hfc_get_mix_info_ax()
1072 prec_cfg->h2c_prec = u32_get_bits(val, B_AX_PREC_PAGE_CH12_MASK); in hfc_get_mix_info_ax()
1074 val = rtw89_read32(rtwdev, regs->pub_page_ctrl2); in hfc_get_mix_info_ax()
1075 pub_cfg->pub_max = u32_get_bits(val, B_AX_PUBPG_ALL_MASK); in hfc_get_mix_info_ax()
1077 val = rtw89_read32(rtwdev, regs->wp_page_ctrl1); in hfc_get_mix_info_ax()
1078 prec_cfg->wp_ch07_prec = u32_get_bits(val, B_AX_PREC_PAGE_WP_CH07_MASK); in hfc_get_mix_info_ax()
1079 prec_cfg->wp_ch811_prec = u32_get_bits(val, B_AX_PREC_PAGE_WP_CH811_MASK); in hfc_get_mix_info_ax()
1081 val = rtw89_read32(rtwdev, regs->wp_page_ctrl2); in hfc_get_mix_info_ax()
1082 pub_cfg->wp_thrd = u32_get_bits(val, B_AX_WP_THRD_MASK); in hfc_get_mix_info_ax()
1084 val = rtw89_read32(rtwdev, regs->pub_page_ctrl1); in hfc_get_mix_info_ax()
1085 pub_cfg->grp0 = u32_get_bits(val, B_AX_PUBPG_G0_MASK); in hfc_get_mix_info_ax()
1086 pub_cfg->grp1 = u32_get_bits(val, B_AX_PUBPG_G1_MASK); in hfc_get_mix_info_ax()
1091 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in hfc_upd_mix_info()
1092 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_upd_mix_info()
1099 mac->hfc_get_mix_info(rtwdev); in hfc_upd_mix_info()
1102 if (param->en && ret) in hfc_upd_mix_info()
1110 const struct rtw89_chip_info *chip = rtwdev->chip; in hfc_h2c_cfg_ax()
1111 const struct rtw89_page_regs *regs = chip->page_regs; in hfc_h2c_cfg_ax()
1112 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_h2c_cfg_ax()
1113 const struct rtw89_hfc_prec_cfg *prec_cfg = ¶m->prec_cfg; in hfc_h2c_cfg_ax()
1116 val = u32_encode_bits(prec_cfg->h2c_prec, B_AX_PREC_PAGE_CH12_MASK); in hfc_h2c_cfg_ax()
1117 rtw89_write32(rtwdev, regs->ch_page_ctrl, val); in hfc_h2c_cfg_ax()
1119 rtw89_write32_mask(rtwdev, regs->hci_fc_ctrl, in hfc_h2c_cfg_ax()
1121 prec_cfg->h2c_full_cond); in hfc_h2c_cfg_ax()
1126 const struct rtw89_chip_info *chip = rtwdev->chip; in hfc_mix_cfg_ax()
1127 const struct rtw89_page_regs *regs = chip->page_regs; in hfc_mix_cfg_ax()
1128 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_mix_cfg_ax()
1129 const struct rtw89_hfc_pub_cfg *pub_cfg = ¶m->pub_cfg; in hfc_mix_cfg_ax()
1130 const struct rtw89_hfc_prec_cfg *prec_cfg = ¶m->prec_cfg; in hfc_mix_cfg_ax()
1133 val = u32_encode_bits(prec_cfg->ch011_prec, B_AX_PREC_PAGE_CH011_MASK) | in hfc_mix_cfg_ax()
1134 u32_encode_bits(prec_cfg->h2c_prec, B_AX_PREC_PAGE_CH12_MASK); in hfc_mix_cfg_ax()
1135 rtw89_write32(rtwdev, regs->ch_page_ctrl, val); in hfc_mix_cfg_ax()
1137 val = u32_encode_bits(pub_cfg->pub_max, B_AX_PUBPG_ALL_MASK); in hfc_mix_cfg_ax()
1138 rtw89_write32(rtwdev, regs->pub_page_ctrl2, val); in hfc_mix_cfg_ax()
1140 val = u32_encode_bits(prec_cfg->wp_ch07_prec, in hfc_mix_cfg_ax()
1142 u32_encode_bits(prec_cfg->wp_ch811_prec, in hfc_mix_cfg_ax()
1144 rtw89_write32(rtwdev, regs->wp_page_ctrl1, val); in hfc_mix_cfg_ax()
1146 val = u32_replace_bits(rtw89_read32(rtwdev, regs->hci_fc_ctrl), in hfc_mix_cfg_ax()
1147 param->mode, B_AX_HCI_FC_MODE_MASK); in hfc_mix_cfg_ax()
1148 val = u32_replace_bits(val, prec_cfg->ch011_full_cond, in hfc_mix_cfg_ax()
1150 val = u32_replace_bits(val, prec_cfg->h2c_full_cond, in hfc_mix_cfg_ax()
1152 val = u32_replace_bits(val, prec_cfg->wp_ch07_full_cond, in hfc_mix_cfg_ax()
1154 val = u32_replace_bits(val, prec_cfg->wp_ch811_full_cond, in hfc_mix_cfg_ax()
1156 rtw89_write32(rtwdev, regs->hci_fc_ctrl, val); in hfc_mix_cfg_ax()
1161 const struct rtw89_chip_info *chip = rtwdev->chip; in hfc_func_en_ax()
1162 const struct rtw89_page_regs *regs = chip->page_regs; in hfc_func_en_ax()
1163 struct rtw89_hfc_param *param = &rtwdev->mac.hfc_param; in hfc_func_en_ax()
1166 val = rtw89_read32(rtwdev, regs->hci_fc_ctrl); in hfc_func_en_ax()
1167 param->en = en; in hfc_func_en_ax()
1168 param->h2c_en = h2c_en; in hfc_func_en_ax()
1172 rtw89_write32(rtwdev, regs->hci_fc_ctrl, val); in hfc_func_en_ax()
1177 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_hfc_init()
1178 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_hfc_init()
1179 u32 dma_ch_mask = chip->dma_ch_mask; in rtw89_mac_hfc_init()
1192 mac->hfc_func_en(rtwdev, false, false); in rtw89_mac_hfc_init()
1195 mac->hfc_h2c_cfg(rtwdev); in rtw89_mac_hfc_init()
1196 mac->hfc_func_en(rtwdev, en, h2c_en); in rtw89_mac_hfc_init()
1212 mac->hfc_mix_cfg(rtwdev); in rtw89_mac_hfc_init()
1214 mac->hfc_func_en(rtwdev, en, h2c_en); in rtw89_mac_hfc_init()
1235 u32 addr = cfg->base == PWR_INTF_MSK_SDIO ? in pwr_cmd_poll()
1236 cfg->addr | SDIO_LOCAL_BASE_ADDR : cfg->addr; in pwr_cmd_poll()
1238 ret = read_poll_timeout(rtw89_read8, val, !((val ^ cfg->val) & cfg->msk), in pwr_cmd_poll()
1245 rtw89_warn(rtwdev, "[ERR] addr: %X, %X\n", addr, cfg->addr); in pwr_cmd_poll()
1246 rtw89_warn(rtwdev, "[ERR] val: %X, %X\n", val, cfg->val); in pwr_cmd_poll()
1248 return -EBUSY; in pwr_cmd_poll()
1258 for (cur_cfg = cfg; cur_cfg->cmd != PWR_CMD_END; cur_cfg++) { in rtw89_mac_sub_pwr_seq()
1259 if (!(cur_cfg->intf_msk & intf_msk) || in rtw89_mac_sub_pwr_seq()
1260 !(cur_cfg->cv_msk & cv_msk)) in rtw89_mac_sub_pwr_seq()
1263 switch (cur_cfg->cmd) { in rtw89_mac_sub_pwr_seq()
1265 addr = cur_cfg->addr; in rtw89_mac_sub_pwr_seq()
1267 if (cur_cfg->base == PWR_BASE_SDIO) in rtw89_mac_sub_pwr_seq()
1271 val &= ~(cur_cfg->msk); in rtw89_mac_sub_pwr_seq()
1272 val |= (cur_cfg->val & cur_cfg->msk); in rtw89_mac_sub_pwr_seq()
1278 return -EBUSY; in rtw89_mac_sub_pwr_seq()
1281 if (cur_cfg->val == PWR_DELAY_US) in rtw89_mac_sub_pwr_seq()
1282 udelay(cur_cfg->addr); in rtw89_mac_sub_pwr_seq()
1284 fsleep(cur_cfg->addr * 1000); in rtw89_mac_sub_pwr_seq()
1287 return -EINVAL; in rtw89_mac_sub_pwr_seq()
1300 ret = rtw89_mac_sub_pwr_seq(rtwdev, BIT(rtwdev->hal.cv), in rtw89_mac_pwr_seq()
1303 return -EBUSY; in rtw89_mac_pwr_seq()
1314 switch (rtwdev->ps_mode) { in rtw89_mac_get_req_pwr_state()
1337 spin_lock_bh(&rtwdev->rpwm_lock); in rtw89_mac_send_rpwm()
1346 rtwdev->mac.rpwm_seq_num = (rtwdev->mac.rpwm_seq_num + 1) & in rtw89_mac_send_rpwm()
1349 rtwdev->mac.rpwm_seq_num); in rtw89_mac_send_rpwm()
1354 rtw89_write16(rtwdev, rtwdev->hci.rpwm_addr, request); in rtw89_mac_send_rpwm()
1356 spin_unlock_bh(&rtwdev->rpwm_lock); in rtw89_mac_send_rpwm()
1380 return -EPERM; in rtw89_mac_check_cpwm_state()
1385 rpwm_req_num = rtwdev->mac.rpwm_seq_num; in rtw89_mac_check_cpwm_state()
1386 cpwm_rsp_seq = rtw89_read16_mask(rtwdev, rtwdev->hci.cpwm_addr, in rtw89_mac_check_cpwm_state()
1390 return -EPERM; in rtw89_mac_check_cpwm_state()
1392 rtwdev->mac.cpwm_seq_num = (rtwdev->mac.cpwm_seq_num + 1) & in rtw89_mac_check_cpwm_state()
1395 cpwm_seq = rtw89_read16_mask(rtwdev, rtwdev->hci.cpwm_addr, PS_CPWM_SEQ_NUM); in rtw89_mac_check_cpwm_state()
1396 if (cpwm_seq != rtwdev->mac.cpwm_seq_num) in rtw89_mac_check_cpwm_state()
1397 return -EPERM; in rtw89_mac_check_cpwm_state()
1399 cpwm_status = rtw89_read16_mask(rtwdev, rtwdev->hci.cpwm_addr, PS_CPWM_STATE); in rtw89_mac_check_cpwm_state()
1401 return -EPERM; in rtw89_mac_check_cpwm_state()
1426 if (i == RPWM_TRY_CNT - 1) in rtw89_mac_power_mode_change()
1447 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_power_switch()
1448 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_power_switch()
1455 cfg_seq = chip->pwr_on_seq; in rtw89_mac_power_switch()
1456 cfg_func = chip->ops->pwr_on_func; in rtw89_mac_power_switch()
1458 cfg_seq = chip->pwr_off_seq; in rtw89_mac_power_switch()
1459 cfg_func = chip->ops->pwr_off_func; in rtw89_mac_power_switch()
1462 if (test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags)) in rtw89_mac_power_switch()
1468 return -EBUSY; in rtw89_mac_power_switch()
1476 if (!test_bit(RTW89_FLAG_PROBE_DONE, rtwdev->flags)) in rtw89_mac_power_switch()
1477 mac->efuse_read_fw_secure(rtwdev); in rtw89_mac_power_switch()
1479 set_bit(RTW89_FLAG_POWERON, rtwdev->flags); in rtw89_mac_power_switch()
1480 set_bit(RTW89_FLAG_DMAC_FUNC, rtwdev->flags); in rtw89_mac_power_switch()
1481 set_bit(RTW89_FLAG_CMAC0_FUNC, rtwdev->flags); in rtw89_mac_power_switch()
1484 clear_bit(RTW89_FLAG_POWERON, rtwdev->flags); in rtw89_mac_power_switch()
1485 clear_bit(RTW89_FLAG_DMAC_FUNC, rtwdev->flags); in rtw89_mac_power_switch()
1486 clear_bit(RTW89_FLAG_CMAC0_FUNC, rtwdev->flags); in rtw89_mac_power_switch()
1487 clear_bit(RTW89_FLAG_CMAC1_FUNC, rtwdev->flags); in rtw89_mac_power_switch()
1488 clear_bit(RTW89_FLAG_FW_RDY, rtwdev->flags); in rtw89_mac_power_switch()
1551 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in dmac_func_en_ax()
1585 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in chip_func_en_ax()
1704 struct rtw89_mac_info *mac = &rtwdev->mac; in get_dle_mem_cfg()
1707 cfg = &rtwdev->chip->dle_mem[mode]; in get_dle_mem_cfg()
1711 if (cfg->mode != mode) { in get_dle_mem_cfg()
1716 mac->dle_info.rsvd_qt = cfg->rsvd_qt; in get_dle_mem_cfg()
1717 mac->dle_info.ple_pg_size = cfg->ple_size->pge_size; in get_dle_mem_cfg()
1718 mac->dle_info.ple_free_pg = cfg->ple_size->lnk_pge_num; in get_dle_mem_cfg()
1719 mac->dle_info.qta_mode = mode; in get_dle_mem_cfg()
1720 mac->dle_info.c0_rx_qta = cfg->ple_min_qt->cma0_dma; in get_dle_mem_cfg()
1721 mac->dle_info.c1_rx_qta = cfg->ple_min_qt->cma1_dma; in get_dle_mem_cfg()
1730 struct rtw89_dle_info *dle_info = &rtwdev->mac.dle_info; in rtw89_mac_get_dle_rsvd_qt_cfg()
1731 const struct rtw89_rsvd_quota *rsvd_qt = dle_info->rsvd_qt; in rtw89_mac_get_dle_rsvd_qt_cfg()
1735 cfg->pktid = dle_info->ple_free_pg; in rtw89_mac_get_dle_rsvd_qt_cfg()
1736 cfg->pg_num = rsvd_qt->mpdu_info_tbl; in rtw89_mac_get_dle_rsvd_qt_cfg()
1739 cfg->pktid = dle_info->ple_free_pg + rsvd_qt->mpdu_info_tbl; in rtw89_mac_get_dle_rsvd_qt_cfg()
1740 cfg->pg_num = rsvd_qt->b0_csi; in rtw89_mac_get_dle_rsvd_qt_cfg()
1743 cfg->pktid = dle_info->ple_free_pg + in rtw89_mac_get_dle_rsvd_qt_cfg()
1744 rsvd_qt->mpdu_info_tbl + rsvd_qt->b0_csi; in rtw89_mac_get_dle_rsvd_qt_cfg()
1745 cfg->pg_num = rsvd_qt->b1_csi; in rtw89_mac_get_dle_rsvd_qt_cfg()
1748 cfg->pktid = dle_info->ple_free_pg + in rtw89_mac_get_dle_rsvd_qt_cfg()
1749 rsvd_qt->mpdu_info_tbl + rsvd_qt->b0_csi + rsvd_qt->b1_csi; in rtw89_mac_get_dle_rsvd_qt_cfg()
1750 cfg->pg_num = rsvd_qt->b0_lmr; in rtw89_mac_get_dle_rsvd_qt_cfg()
1753 cfg->pktid = dle_info->ple_free_pg + in rtw89_mac_get_dle_rsvd_qt_cfg()
1754 rsvd_qt->mpdu_info_tbl + rsvd_qt->b0_csi + rsvd_qt->b1_csi + in rtw89_mac_get_dle_rsvd_qt_cfg()
1755 rsvd_qt->b0_lmr; in rtw89_mac_get_dle_rsvd_qt_cfg()
1756 cfg->pg_num = rsvd_qt->b1_lmr; in rtw89_mac_get_dle_rsvd_qt_cfg()
1759 cfg->pktid = dle_info->ple_free_pg + in rtw89_mac_get_dle_rsvd_qt_cfg()
1760 rsvd_qt->mpdu_info_tbl + rsvd_qt->b0_csi + rsvd_qt->b1_csi + in rtw89_mac_get_dle_rsvd_qt_cfg()
1761 rsvd_qt->b0_lmr + rsvd_qt->b1_lmr; in rtw89_mac_get_dle_rsvd_qt_cfg()
1762 cfg->pg_num = rsvd_qt->b0_ftm; in rtw89_mac_get_dle_rsvd_qt_cfg()
1765 cfg->pktid = dle_info->ple_free_pg + in rtw89_mac_get_dle_rsvd_qt_cfg()
1766 rsvd_qt->mpdu_info_tbl + rsvd_qt->b0_csi + rsvd_qt->b1_csi + in rtw89_mac_get_dle_rsvd_qt_cfg()
1767 rsvd_qt->b0_lmr + rsvd_qt->b1_lmr + rsvd_qt->b0_ftm; in rtw89_mac_get_dle_rsvd_qt_cfg()
1768 cfg->pg_num = rsvd_qt->b1_ftm; in rtw89_mac_get_dle_rsvd_qt_cfg()
1771 return -EINVAL; in rtw89_mac_get_dle_rsvd_qt_cfg()
1774 cfg->size = (u32)cfg->pg_num * dle_info->ple_pg_size; in rtw89_mac_get_dle_rsvd_qt_cfg()
1785 grpnum = rtwdev->chip->wde_qempty_acq_grpnum; in mac_is_txq_empty_ax()
1804 qempty.grpsel = rtwdev->chip->wde_qempty_mgq_grpsel; in mac_is_txq_empty_ax()
1814 if (rtwdev->dbcc_en) { in mac_is_txq_empty_ax()
1835 const struct rtw89_dle_size *wde = cfg->wde_size; in dle_used_size()
1836 const struct rtw89_dle_size *ple = cfg->ple_size; in dle_used_size()
1839 used = wde->pge_size * (wde->lnk_pge_num + wde->unlnk_pge_num) + in dle_used_size()
1840 ple->pge_size * (ple->lnk_pge_num + ple->unlnk_pge_num); in dle_used_size()
1842 if (cfg->rsvd0_size && cfg->rsvd1_size) { in dle_used_size()
1843 used += cfg->rsvd0_size->size; in dle_used_size()
1844 used += cfg->rsvd1_size->size; in dle_used_size()
1853 u32 size = rtwdev->chip->fifo_size; in dle_expected_used_size()
1856 size -= rtwdev->chip->dle_scc_rsvd_size; in dle_expected_used_size()
1876 if (rtwdev->chip->chip_id == RTL8851B) in dle_clk_en_ax()
1891 size_cfg = cfg->wde_size; in dle_mix_cfg_ax()
1893 switch (size_cfg->pge_size) { in dle_mix_cfg_ax()
1905 return -EINVAL; in dle_mix_cfg_ax()
1909 val = u32_replace_bits(val, size_cfg->lnk_pge_num, in dle_mix_cfg_ax()
1914 bound = (size_cfg->lnk_pge_num + size_cfg->unlnk_pge_num) in dle_mix_cfg_ax()
1915 * size_cfg->pge_size / DLE_BOUND_UNIT; in dle_mix_cfg_ax()
1916 size_cfg = cfg->ple_size; in dle_mix_cfg_ax()
1918 switch (size_cfg->pge_size) { in dle_mix_cfg_ax()
1922 return -EINVAL; in dle_mix_cfg_ax()
1934 val = u32_replace_bits(val, size_cfg->lnk_pge_num, in dle_mix_cfg_ax()
1968 SET_QUOTA_VAL(min_cfg->_x, max_cfg->_x, _module, _idx)
1976 ext_wde_min_qt_wcpu : min_cfg->wcpu; in wde_quota_cfg_ax()
1980 SET_QUOTA_VAL(min_qt_wcpu, max_cfg->wcpu, WDE, 1); in wde_quota_cfg_ax()
2002 if (rtwdev->chip->chip_id == RTL8852C) in ple_quota_cfg_ax()
2012 if (rtwdev->chip->chip_id == RTL8852C) in rtw89_mac_resize_ple_rx_quota()
2015 if (rtwdev->mac.qta_mode != RTW89_QTA_SCC) { in rtw89_mac_resize_ple_rx_quota()
2017 return -EINVAL; in rtw89_mac_resize_ple_rx_quota()
2026 return -EINVAL; in rtw89_mac_resize_ple_rx_quota()
2029 min_cfg = cfg->ple_min_qt; in rtw89_mac_resize_ple_rx_quota()
2030 max_cfg = cfg->ple_max_qt; in rtw89_mac_resize_ple_rx_quota()
2040 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_hw_mgnt_sec()
2043 if (rtwdev->chip->chip_gen != RTW89_CHIP_AX) in rtw89_mac_hw_mgnt_sec()
2047 if (chip->chip_id == RTL8852C) in rtw89_mac_hw_mgnt_sec()
2060 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in dle_quota_cfg()
2062 mac->wde_quota_cfg(rtwdev, cfg->wde_min_qt, cfg->wde_max_qt, ext_wde_min_qt_wcpu); in dle_quota_cfg()
2063 mac->ple_quota_cfg(rtwdev, cfg->ple_min_qt, cfg->ple_max_qt); in dle_quota_cfg()
2069 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_dle_init()
2081 ret = -EINVAL; in rtw89_mac_dle_init()
2090 ret = -EINVAL; in rtw89_mac_dle_init()
2093 ext_wde_min_qt_wcpu = ext_cfg->wde_min_qt->wcpu; in rtw89_mac_dle_init()
2098 ret = -EINVAL; in rtw89_mac_dle_init()
2102 mac->dle_func_en(rtwdev, false); in rtw89_mac_dle_init()
2103 mac->dle_clk_en(rtwdev, true); in rtw89_mac_dle_init()
2105 ret = mac->dle_mix_cfg(rtwdev, cfg); in rtw89_mac_dle_init()
2112 mac->dle_func_en(rtwdev, true); in rtw89_mac_dle_init()
2114 ret = mac->chk_dle_rdy(rtwdev, true); in rtw89_mac_dle_init()
2120 ret = mac->chk_dle_rdy(rtwdev, false); in rtw89_mac_dle_init()
2128 mac->dle_func_en(rtwdev, false); in rtw89_mac_dle_init()
2160 return rtwdev->hci.type == RTW89_HCI_TYPE_PCIE; in is_qta_poh()
2166 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_preload_init()
2168 if (chip->chip_id == RTL8852A || rtw89_is_rtl885xb(rtwdev) || in rtw89_mac_preload_init()
2203 const struct rtw89_chip_info *chip = rtwdev->chip; in _patch_ss2f_path()
2205 if (chip->chip_id == RTL8852A || rtw89_is_rtl885xb(rtwdev)) in _patch_ss2f_path()
2260 const struct rtw89_chip_info *chip = rtwdev->chip; in sec_eng_init_ax()
2274 if (chip->chip_id == RTL8852C) in sec_eng_init_ax()
2276 if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B || in sec_eng_init_ax()
2277 chip->chip_id == RTL8851B) in sec_eng_init_ax()
2288 if (chip->chip_id == RTL8852C) in sec_eng_init_ax()
2299 ret = rtw89_mac_dle_init(rtwdev, rtwdev->mac.qta_mode, RTW89_QTA_INVALID); in dmac_init_ax()
2305 ret = rtw89_mac_preload_init(rtwdev, RTW89_MAC_0, rtwdev->mac.qta_mode); in dmac_init_ax()
2376 if (rtwdev->chip->chip_id == RTL8852C) in scheduler_init_ax()
2392 if (rtwdev->chip->chip_id == RTL8852C) { in scheduler_init_ax()
2426 return -EINVAL; in rtw89_mac_typ_fltr_opt_ax()
2441 return -EINVAL; in rtw89_mac_typ_fltr_opt_ax()
2463 mac_ftlr = rtwdev->hal.rx_fltr; in rx_fltr_init_ax()
2487 switch (rtwdev->chip->chip_id) { in _patch_dis_resp_chk()
2593 const struct rtw89_chip_info *chip = rtwdev->chip; in trxptcl_init_ax()
2594 const struct rtw89_rrsr_cfgs *rrsr = chip->rrsr_cfgs; in trxptcl_init_ax()
2607 switch (rtwdev->chip->chip_id) { in trxptcl_init_ax()
2627 reg = rtw89_mac_reg_by_idx(rtwdev, rrsr->ref_rate.addr, mac_idx); in trxptcl_init_ax()
2628 rtw89_write32_mask(rtwdev, reg, rrsr->ref_rate.mask, rrsr->ref_rate.data); in trxptcl_init_ax()
2629 reg = rtw89_mac_reg_by_idx(rtwdev, rrsr->rsc.addr, mac_idx); in trxptcl_init_ax()
2630 rtw89_write32_mask(rtwdev, reg, rrsr->rsc.mask, rrsr->rsc.data); in trxptcl_init_ax()
2657 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rmac_init_ax()
2687 rx_qta = rtwdev->mac.dle_info.c0_rx_qta; in rmac_init_ax()
2689 rx_qta = rtwdev->mac.dle_info.c1_rx_qta; in rmac_init_ax()
2691 rx_max_len = rx_qta * rtwdev->mac.dle_info.ple_pg_size; in rmac_init_ax()
2696 if (chip_id == RTL8852A && rtwdev->hal.cv == CHIP_CBV) { in rmac_init_ax()
2712 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in cmac_com_init_ax()
2745 return (cfg->ple_min_qt->cma1_dma && cfg->ple_max_qt->cma1_dma); in rtw89_mac_is_qta_dbcc()
2750 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in ptcl_init_ax()
2758 if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) { in ptcl_init_ax()
2903 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_read_phycap()
2904 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_read_phycap()
2910 if (chip->chip_gen == RTW89_CHIP_AX) in rtw89_mac_read_phycap()
2923 return -EINVAL; in rtw89_mac_read_phycap()
2926 mac->cnv_efuse_state(rtwdev, false); in rtw89_mac_read_phycap()
2936 if (c2h_info->id != c2h_type) in rtw89_mac_read_phycap()
2937 ret = -EINVAL; in rtw89_mac_read_phycap()
2940 mac->cnv_efuse_state(rtwdev, true); in rtw89_mac_read_phycap()
2947 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_setup_phycap_part0()
2949 struct rtw89_efuse *efuse = &rtwdev->efuse; in rtw89_mac_setup_phycap_part0()
2951 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_mac_setup_phycap_part0()
2964 tx_nss = u32_get_bits(phycap->w1, RTW89_C2HREG_PHYCAP_W1_TX_NSS); in rtw89_mac_setup_phycap_part0()
2965 rx_nss = u32_get_bits(phycap->w0, RTW89_C2HREG_PHYCAP_W0_RX_NSS); in rtw89_mac_setup_phycap_part0()
2966 tx_ant = u32_get_bits(phycap->w3, RTW89_C2HREG_PHYCAP_W3_ANT_TX_NUM); in rtw89_mac_setup_phycap_part0()
2967 rx_ant = u32_get_bits(phycap->w3, RTW89_C2HREG_PHYCAP_W3_ANT_RX_NUM); in rtw89_mac_setup_phycap_part0()
2969 hal->tx_nss = tx_nss ? min_t(u8, tx_nss, chip->tx_nss) : chip->tx_nss; in rtw89_mac_setup_phycap_part0()
2970 hal->rx_nss = rx_nss ? min_t(u8, rx_nss, chip->rx_nss) : chip->rx_nss; in rtw89_mac_setup_phycap_part0()
2973 hal->antenna_tx = RF_B; in rtw89_mac_setup_phycap_part0()
2975 hal->antenna_rx = RF_B; in rtw89_mac_setup_phycap_part0()
2978 hal->antenna_tx = RF_B; in rtw89_mac_setup_phycap_part0()
2979 hal->tx_path_diversity = true; in rtw89_mac_setup_phycap_part0()
2982 if (chip->rf_path_num == 1) { in rtw89_mac_setup_phycap_part0()
2983 hal->antenna_tx = RF_A; in rtw89_mac_setup_phycap_part0()
2984 hal->antenna_rx = RF_A; in rtw89_mac_setup_phycap_part0()
2985 if ((efuse->rfe_type % 3) == 2) in rtw89_mac_setup_phycap_part0()
2986 hal->ant_diversity = true; in rtw89_mac_setup_phycap_part0()
2991 hal->tx_nss, tx_nss, chip->tx_nss, in rtw89_mac_setup_phycap_part0()
2992 hal->rx_nss, rx_nss, chip->rx_nss); in rtw89_mac_setup_phycap_part0()
2995 tx_ant, hal->antenna_tx, rx_ant, hal->antenna_rx); in rtw89_mac_setup_phycap_part0()
2996 rtw89_debug(rtwdev, RTW89_DBG_FW, "TX path diversity=%d\n", hal->tx_path_diversity); in rtw89_mac_setup_phycap_part0()
2997 rtw89_debug(rtwdev, RTW89_DBG_FW, "Antenna diversity=%d\n", hal->ant_diversity); in rtw89_mac_setup_phycap_part0()
3004 const struct rtw89_chip_variant *variant = rtwdev->variant; in rtw89_mac_setup_phycap_part1()
3007 struct rtw89_hal *hal = &rtwdev->hal; in rtw89_mac_setup_phycap_part1()
3017 qam_raw = u32_get_bits(phycap->w2, RTW89_C2HREG_PHYCAP_P1_W2_QAM); in rtw89_mac_setup_phycap_part1()
3030 if ((variant && variant->no_mcs_12_13) || in rtw89_mac_setup_phycap_part1()
3032 hal->no_mcs_12_13 = true; in rtw89_mac_setup_phycap_part1()
3035 qam_raw, qam, hal->no_mcs_12_13); in rtw89_mac_setup_phycap_part1()
3042 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_setup_phycap()
3049 if (chip->chip_gen == RTW89_CHIP_AX || in rtw89_mac_setup_phycap()
3050 RTW89_CHK_FW_FEATURE(NO_PHYCAP_P1, &rtwdev->fw)) in rtw89_mac_setup_phycap()
3065 h2c_info.content_len = sizeof(*sch_tx_en) - RTW89_H2CREG_HDR_LEN; in rtw89_hw_sch_tx_en_h2c()
3067 u32p_replace_bits(&sch_tx_en->w0, tx_en_u16, RTW89_H2CREG_SCH_TX_EN_W0_EN); in rtw89_hw_sch_tx_en_h2c()
3068 u32p_replace_bits(&sch_tx_en->w1, mask_u16, RTW89_H2CREG_SCH_TX_EN_W1_MASK); in rtw89_hw_sch_tx_en_h2c()
3069 u32p_replace_bits(&sch_tx_en->w1, band, RTW89_H2CREG_SCH_TX_EN_W1_BAND); in rtw89_hw_sch_tx_en_h2c()
3076 return -EINVAL; in rtw89_hw_sch_tx_en_h2c()
3092 if (test_bit(RTW89_FLAG_FW_RDY, rtwdev->flags)) in rtw89_set_hw_sch_tx_en()
3122 u32 *tx_en, enum rtw89_sch_tx_sel sel) in rtw89_mac_stop_sch_tx() argument
3129 switch (sel) { in rtw89_mac_stop_sch_tx()
3163 u32 *tx_en, enum rtw89_sch_tx_sel sel) in rtw89_mac_stop_sch_tx_v1() argument
3170 switch (sel) { in rtw89_mac_stop_sch_tx_v1()
3247 return -ENOENT; in dle_buf_req_ax()
3258 cmd_type = ctrl_para->cmd_type; in set_cpuio_ax()
3262 val = u32_replace_bits(val, ctrl_para->start_pktid, in set_cpuio_ax()
3264 val = u32_replace_bits(val, ctrl_para->end_pktid, in set_cpuio_ax()
3270 val = u32_replace_bits(val, ctrl_para->src_pid, in set_cpuio_ax()
3272 val = u32_replace_bits(val, ctrl_para->src_qid, in set_cpuio_ax()
3274 val = u32_replace_bits(val, ctrl_para->dst_pid, in set_cpuio_ax()
3276 val = u32_replace_bits(val, ctrl_para->dst_qid, in set_cpuio_ax()
3284 val = u32_replace_bits(val, ctrl_para->macid, in set_cpuio_ax()
3286 val = u32_replace_bits(val, ctrl_para->pkt_num, in set_cpuio_ax()
3300 ctrl_para->pktid = FIELD_GET(B_AX_WD_CPUQ_OP_PKTID_MASK, val); in set_cpuio_ax()
3308 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_dle_quota_change()
3314 return -EINVAL; in rtw89_mac_dle_quota_change()
3319 return -EINVAL; in rtw89_mac_dle_quota_change()
3324 return mac->dle_quota_change(rtwdev, band1_en); in rtw89_mac_dle_quota_change()
3329 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in dle_quota_change_ax()
3334 ret = mac->dle_buf_req(rtwdev, 0x20, true, &pkt_id); in dle_quota_change_ax()
3346 ret = mac->set_cpuio(rtwdev, &ctrl_para, true); in dle_quota_change_ax()
3349 return -EFAULT; in dle_quota_change_ax()
3352 ret = mac->dle_buf_req(rtwdev, 0x20, false, &pkt_id); in dle_quota_change_ax()
3364 ret = mac->set_cpuio(rtwdev, &ctrl_para, false); in dle_quota_change_ax()
3367 return -EFAULT; in dle_quota_change_ax()
3422 ret = rtw89_mac_dle_quota_change(rtwdev, rtwdev->mac.qta_mode, true); in band1_enable_ax()
3459 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_wdrls_imr_enable()
3462 rtw89_write32_set(rtwdev, R_AX_WDRLS_ERR_IMR, imr->wdrls_imr_set); in rtw89_wdrls_imr_enable()
3467 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_wsec_imr_enable()
3469 rtw89_write32_set(rtwdev, imr->wsec_imr_reg, imr->wsec_imr_set); in rtw89_wsec_imr_enable()
3474 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_mpdu_trx_imr_enable()
3475 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_mpdu_trx_imr_enable()
3490 imr->mpdu_tx_imr_set); in rtw89_mpdu_trx_imr_enable()
3497 imr->mpdu_rx_imr_set); in rtw89_mpdu_trx_imr_enable()
3502 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_sta_sch_imr_enable()
3509 imr->sta_sch_imr_set); in rtw89_sta_sch_imr_enable()
3514 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_txpktctl_imr_enable()
3516 rtw89_write32_clr(rtwdev, imr->txpktctl_imr_b0_reg, in rtw89_txpktctl_imr_enable()
3517 imr->txpktctl_imr_b0_clr); in rtw89_txpktctl_imr_enable()
3518 rtw89_write32_set(rtwdev, imr->txpktctl_imr_b0_reg, in rtw89_txpktctl_imr_enable()
3519 imr->txpktctl_imr_b0_set); in rtw89_txpktctl_imr_enable()
3520 rtw89_write32_clr(rtwdev, imr->txpktctl_imr_b1_reg, in rtw89_txpktctl_imr_enable()
3521 imr->txpktctl_imr_b1_clr); in rtw89_txpktctl_imr_enable()
3522 rtw89_write32_set(rtwdev, imr->txpktctl_imr_b1_reg, in rtw89_txpktctl_imr_enable()
3523 imr->txpktctl_imr_b1_set); in rtw89_txpktctl_imr_enable()
3528 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_wde_imr_enable()
3530 rtw89_write32_clr(rtwdev, R_AX_WDE_ERR_IMR, imr->wde_imr_clr); in rtw89_wde_imr_enable()
3531 rtw89_write32_set(rtwdev, R_AX_WDE_ERR_IMR, imr->wde_imr_set); in rtw89_wde_imr_enable()
3536 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_ple_imr_enable()
3538 rtw89_write32_clr(rtwdev, R_AX_PLE_ERR_IMR, imr->ple_imr_clr); in rtw89_ple_imr_enable()
3539 rtw89_write32_set(rtwdev, R_AX_PLE_ERR_IMR, imr->ple_imr_set); in rtw89_ple_imr_enable()
3550 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_dispatcher_imr_enable()
3553 imr->host_disp_imr_clr); in rtw89_dispatcher_imr_enable()
3555 imr->host_disp_imr_set); in rtw89_dispatcher_imr_enable()
3557 imr->cpu_disp_imr_clr); in rtw89_dispatcher_imr_enable()
3559 imr->cpu_disp_imr_set); in rtw89_dispatcher_imr_enable()
3561 imr->other_disp_imr_clr); in rtw89_dispatcher_imr_enable()
3563 imr->other_disp_imr_set); in rtw89_dispatcher_imr_enable()
3574 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_bbrpt_imr_enable()
3576 rtw89_write32_set(rtwdev, imr->bbrpt_com_err_imr_reg, in rtw89_bbrpt_imr_enable()
3578 rtw89_write32_clr(rtwdev, imr->bbrpt_chinfo_err_imr_reg, in rtw89_bbrpt_imr_enable()
3580 rtw89_write32_set(rtwdev, imr->bbrpt_chinfo_err_imr_reg, in rtw89_bbrpt_imr_enable()
3581 imr->bbrpt_err_imr_set); in rtw89_bbrpt_imr_enable()
3582 rtw89_write32_set(rtwdev, imr->bbrpt_dfs_err_imr_reg, in rtw89_bbrpt_imr_enable()
3599 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_ptcl_imr_enable()
3603 rtw89_write32_clr(rtwdev, reg, imr->ptcl_imr_clr); in rtw89_ptcl_imr_enable()
3604 rtw89_write32_set(rtwdev, reg, imr->ptcl_imr_set); in rtw89_ptcl_imr_enable()
3609 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_cdma_imr_enable()
3610 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_cdma_imr_enable()
3613 reg = rtw89_mac_reg_by_idx(rtwdev, imr->cdma_imr_0_reg, mac_idx); in rtw89_cdma_imr_enable()
3614 rtw89_write32_clr(rtwdev, reg, imr->cdma_imr_0_clr); in rtw89_cdma_imr_enable()
3615 rtw89_write32_set(rtwdev, reg, imr->cdma_imr_0_set); in rtw89_cdma_imr_enable()
3618 reg = rtw89_mac_reg_by_idx(rtwdev, imr->cdma_imr_1_reg, mac_idx); in rtw89_cdma_imr_enable()
3619 rtw89_write32_clr(rtwdev, reg, imr->cdma_imr_1_clr); in rtw89_cdma_imr_enable()
3620 rtw89_write32_set(rtwdev, reg, imr->cdma_imr_1_set); in rtw89_cdma_imr_enable()
3626 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_phy_intf_imr_enable()
3629 reg = rtw89_mac_reg_by_idx(rtwdev, imr->phy_intf_imr_reg, mac_idx); in rtw89_phy_intf_imr_enable()
3630 rtw89_write32_clr(rtwdev, reg, imr->phy_intf_imr_clr); in rtw89_phy_intf_imr_enable()
3631 rtw89_write32_set(rtwdev, reg, imr->phy_intf_imr_set); in rtw89_phy_intf_imr_enable()
3636 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_rmac_imr_enable()
3639 reg = rtw89_mac_reg_by_idx(rtwdev, imr->rmac_imr_reg, mac_idx); in rtw89_rmac_imr_enable()
3640 rtw89_write32_clr(rtwdev, reg, imr->rmac_imr_clr); in rtw89_rmac_imr_enable()
3641 rtw89_write32_set(rtwdev, reg, imr->rmac_imr_set); in rtw89_rmac_imr_enable()
3646 const struct rtw89_imr_info *imr = rtwdev->chip->imr_info; in rtw89_tmac_imr_enable()
3649 reg = rtw89_mac_reg_by_idx(rtwdev, imr->tmac_imr_reg, mac_idx); in rtw89_tmac_imr_enable()
3650 rtw89_write32_clr(rtwdev, reg, imr->tmac_imr_clr); in rtw89_tmac_imr_enable()
3651 rtw89_write32_set(rtwdev, reg, imr->tmac_imr_set); in rtw89_tmac_imr_enable()
3655 enum rtw89_mac_hwmod_sel sel) in enable_imr_ax() argument
3659 ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, sel); in enable_imr_ax()
3662 sel, mac_idx); in enable_imr_ax()
3666 if (sel == RTW89_DMAC_SEL) { in enable_imr_ax()
3678 } else if (sel == RTW89_CMAC_SEL) { in enable_imr_ax()
3686 return -EINVAL; in enable_imr_ax()
3698 if (!rtw89_is_rtl885xb(rtwdev) && rtwdev->mac.dle_info.c1_rx_qta) in err_imr_ctrl_ax()
3721 return -EINVAL; in dbcc_enable_ax()
3729 if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) { in set_host_rpr_ax()
3749 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in trx_init_ax()
3750 enum rtw89_qta_mode qta_mode = rtwdev->mac.qta_mode; in trx_init_ax()
3805 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_feat_init()
3808 if (chip->bacam_ver != RTW89_BACAM_V1) in rtw89_mac_feat_init()
3843 clear_bit(RTW89_FLAG_FW_RDY, rtwdev->flags); in rtw89_mac_disable_cpu_ax()
3863 return -EFAULT; in rtw89_mac_enable_cpu_ax()
3905 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_mac_hci_func_en_ax()
3919 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_mac_dmac_func_pre_en_ax()
3948 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_dmac_pre_init()
3951 mac->hci_func_en(rtwdev); in rtw89_mac_dmac_pre_init()
3952 mac->dmac_func_pre_en(rtwdev); in rtw89_mac_dmac_pre_init()
3954 ret = rtw89_mac_dle_init(rtwdev, RTW89_QTA_DLFW, rtwdev->mac.qta_mode); in rtw89_mac_dmac_pre_init()
4011 if (rtwdev->dbcc_en) in rtw89_mac_partial_init()
4019 if (rtwdev->hci.ops->mac_pre_init) { in rtw89_mac_partial_init()
4020 ret = rtwdev->hci.ops->mac_pre_init(rtwdev); in rtw89_mac_partial_init()
4034 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_init()
4035 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_init()
4036 bool include_bb = !!chip->bbmcu_nr; in rtw89_mac_init()
4047 ret = mac->sys_init(rtwdev); in rtw89_mac_init()
4051 ret = mac->trx_init(rtwdev); in rtw89_mac_init()
4059 if (rtwdev->hci.ops->mac_post_init) { in rtw89_mac_init()
4060 ret = rtwdev->hci.ops->mac_post_init(rtwdev); in rtw89_mac_init()
4077 struct rtw89_fw_secure *sec = &rtwdev->fw.sec; in rtw89_mac_dmac_tbl_init()
4080 if (rtwdev->chip->chip_gen != RTW89_CHIP_AX || sec->secure_boot) in rtw89_mac_dmac_tbl_init()
4092 struct rtw89_fw_secure *sec = &rtwdev->fw.sec; in rtw89_mac_cmac_tbl_init()
4094 if (rtwdev->chip->chip_gen != RTW89_CHIP_AX || sec->secure_boot) in rtw89_mac_cmac_tbl_init()
4116 * be power-off, so ignore this operation. in rtw89_mac_set_macid_pause()
4118 if (test_bit(RTW89_FLAG_CHANGING_INTERFACE, rtwdev->flags) && in rtw89_mac_set_macid_pause()
4119 !test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) in rtw89_mac_set_macid_pause()
4163 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_check_packet_ctrl()
4164 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_check_packet_ctrl()
4165 u8 mask = B_AX_PTCL_DBG_INFO_MASK_BY_PORT(rtwvif_link->port); in rtw89_mac_check_packet_ctrl()
4170 reg_info = rtw89_mac_reg_by_idx(rtwdev, p->ptcl_dbg_info, rtwvif_link->mac_idx); in rtw89_mac_check_packet_ctrl()
4171 reg_ctrl = rtw89_mac_reg_by_idx(rtwdev, p->ptcl_dbg, rtwvif_link->mac_idx); in rtw89_mac_check_packet_ctrl()
4186 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_bcn_drop()
4187 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_bcn_drop()
4189 rtw89_write32_set(rtwdev, p->bcn_drop_all, BIT(rtwvif_link->port)); in rtw89_mac_bcn_drop()
4190 rtw89_write32_port_mask(rtwdev, rtwvif_link, p->tbtt_prohib, B_AX_TBTT_SETUP_MASK, in rtw89_mac_bcn_drop()
4192 rtw89_write32_port_mask(rtwdev, rtwvif_link, p->bcn_area, B_AX_BCN_MSK_AREA_MASK, in rtw89_mac_bcn_drop()
4194 rtw89_write32_port_mask(rtwdev, rtwvif_link, p->tbtt_prohib, B_AX_TBTT_HOLD_MASK, in rtw89_mac_bcn_drop()
4196 rtw89_write32_port_mask(rtwdev, rtwvif_link, p->bcn_early, B_AX_BCNERLY_MASK, 2); in rtw89_mac_bcn_drop()
4197 rtw89_write16_port_mask(rtwdev, rtwvif_link, p->tbtt_early, in rtw89_mac_bcn_drop()
4199 rtw89_write32_port_mask(rtwdev, rtwvif_link, p->bcn_space, in rtw89_mac_bcn_drop()
4201 rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, B_AX_BCNTX_EN); in rtw89_mac_bcn_drop()
4204 if (rtwvif_link->port == RTW89_PORT_0) in rtw89_mac_bcn_drop()
4207 rtw89_write32_clr(rtwdev, p->bcn_drop_all, BIT(rtwvif_link->port)); in rtw89_mac_bcn_drop()
4208 rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, B_AX_TBTT_PROHIB_EN); in rtw89_mac_bcn_drop()
4224 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_func_sw()
4225 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_func_sw()
4226 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_port_cfg_func_sw()
4232 if (!rtw89_read32_port_mask(rtwdev, rtwvif_link, p->port_cfg, B_AX_PORT_FUNC_EN)) in rtw89_mac_port_cfg_func_sw()
4235 if (chip->chip_id == RTL8852A && rtwvif_link->port != RTW89_PORT_0) { in rtw89_mac_port_cfg_func_sw()
4237 backup_val = rtw89_read32_port(rtwdev, rtwvif_link, p->tbtt_prohib); in rtw89_mac_port_cfg_func_sw()
4240 if (rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE) in rtw89_mac_port_cfg_func_sw()
4243 if (chip->chip_id == RTL8852A) { in rtw89_mac_port_cfg_func_sw()
4244 rtw89_write32_port_clr(rtwdev, rtwvif_link, p->tbtt_prohib, in rtw89_mac_port_cfg_func_sw()
4246 rtw89_write32_port_mask(rtwdev, rtwvif_link, p->tbtt_prohib, in rtw89_mac_port_cfg_func_sw()
4248 rtw89_write16_port_clr(rtwdev, rtwvif_link, p->tbtt_early, in rtw89_mac_port_cfg_func_sw()
4250 rtw89_write16_port_clr(rtwdev, rtwvif_link, p->bcn_early, in rtw89_mac_port_cfg_func_sw()
4257 beacon_int = bss_conf->beacon_int; in rtw89_mac_port_cfg_func_sw()
4262 rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, B_AX_PORT_FUNC_EN | in rtw89_mac_port_cfg_func_sw()
4264 rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, B_AX_TSFTR_RST); in rtw89_mac_port_cfg_func_sw()
4265 rtw89_write32_port(rtwdev, rtwvif_link, p->bcn_cnt_tmr, 0); in rtw89_mac_port_cfg_func_sw()
4268 rtw89_write32_port(rtwdev, rtwvif_link, p->tbtt_prohib, backup_val); in rtw89_mac_port_cfg_func_sw()
4274 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_tx_rpt()
4275 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_tx_rpt()
4278 rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, in rtw89_mac_port_cfg_tx_rpt()
4281 rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, in rtw89_mac_port_cfg_tx_rpt()
4288 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_rx_rpt()
4289 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_rx_rpt()
4292 rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, in rtw89_mac_port_cfg_rx_rpt()
4295 rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, in rtw89_mac_port_cfg_rx_rpt()
4302 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_net_type()
4303 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_net_type()
4305 rtw89_write32_port_mask(rtwdev, rtwvif_link, p->port_cfg, B_AX_NET_TYPE_MASK, in rtw89_mac_port_cfg_net_type()
4306 rtwvif_link->net_type); in rtw89_mac_port_cfg_net_type()
4312 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_bcn_prct()
4313 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_bcn_prct()
4314 bool en = rtwvif_link->net_type != RTW89_NET_TYPE_NO_LINK; in rtw89_mac_port_cfg_bcn_prct()
4318 rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, bits); in rtw89_mac_port_cfg_bcn_prct()
4320 rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, bits); in rtw89_mac_port_cfg_bcn_prct()
4326 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_rx_sw()
4327 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_rx_sw()
4328 bool en = rtwvif_link->net_type == RTW89_NET_TYPE_INFRA || in rtw89_mac_port_cfg_rx_sw()
4329 rtwvif_link->net_type == RTW89_NET_TYPE_AD_HOC; in rtw89_mac_port_cfg_rx_sw()
4333 rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, bit); in rtw89_mac_port_cfg_rx_sw()
4335 rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, bit); in rtw89_mac_port_cfg_rx_sw()
4341 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_rx_sync()
4342 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_rx_sync()
4345 rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, B_AX_TSF_UDT_EN); in rtw89_mac_port_cfg_rx_sync()
4347 rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, B_AX_TSF_UDT_EN); in rtw89_mac_port_cfg_rx_sync()
4353 bool en = rtwvif_link->net_type == RTW89_NET_TYPE_INFRA || in rtw89_mac_port_cfg_rx_sync_by_nettype()
4354 rtwvif_link->net_type == RTW89_NET_TYPE_AD_HOC; in rtw89_mac_port_cfg_rx_sync_by_nettype()
4362 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_tx_sw()
4363 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_tx_sw()
4366 rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, B_AX_BCNTX_EN); in rtw89_mac_port_cfg_tx_sw()
4368 rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, B_AX_BCNTX_EN); in rtw89_mac_port_cfg_tx_sw()
4374 bool en = rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE || in rtw89_mac_port_cfg_tx_sw_by_nettype()
4375 rtwvif_link->net_type == RTW89_NET_TYPE_AD_HOC; in rtw89_mac_port_cfg_tx_sw_by_nettype()
4388 if (rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE) in rtw89_mac_enable_beacon_for_ap_vifs()
4395 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_bcn_intv()
4396 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_bcn_intv()
4403 if (bss_conf->beacon_int) in rtw89_mac_port_cfg_bcn_intv()
4404 bcn_int = bss_conf->beacon_int; in rtw89_mac_port_cfg_bcn_intv()
4410 rtw89_write32_port_mask(rtwdev, rtwvif_link, p->bcn_space, B_AX_BCN_SPACE_MASK, in rtw89_mac_port_cfg_bcn_intv()
4417 u8 win = rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE ? 16 : 0; in rtw89_mac_port_cfg_hiq_win()
4418 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_hiq_win()
4419 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_hiq_win()
4420 u8 port = rtwvif_link->port; in rtw89_mac_port_cfg_hiq_win()
4423 reg = rtw89_mac_reg_by_idx(rtwdev, p->hiq_win[port], rtwvif_link->mac_idx); in rtw89_mac_port_cfg_hiq_win()
4430 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_hiq_dtim()
4431 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_hiq_dtim()
4439 dtim_period = bss_conf->dtim_period; in rtw89_mac_port_cfg_hiq_dtim()
4443 addr = rtw89_mac_reg_by_idx(rtwdev, p->md_tsft, rtwvif_link->mac_idx); in rtw89_mac_port_cfg_hiq_dtim()
4446 rtw89_write16_port_mask(rtwdev, rtwvif_link, p->dtim_ctrl, B_AX_DTIM_NUM_MASK, in rtw89_mac_port_cfg_hiq_dtim()
4453 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_bcn_setup_time()
4454 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_bcn_setup_time()
4456 rtw89_write32_port_mask(rtwdev, rtwvif_link, p->tbtt_prohib, in rtw89_mac_port_cfg_bcn_setup_time()
4463 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_bcn_hold_time()
4464 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_bcn_hold_time()
4466 rtw89_write32_port_mask(rtwdev, rtwvif_link, p->tbtt_prohib, in rtw89_mac_port_cfg_bcn_hold_time()
4473 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_bcn_mask_area()
4474 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_bcn_mask_area()
4476 rtw89_write32_port_mask(rtwdev, rtwvif_link, p->bcn_area, in rtw89_mac_port_cfg_bcn_mask_area()
4483 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_tbtt_early()
4484 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_tbtt_early()
4486 rtw89_write16_port_mask(rtwdev, rtwvif_link, p->tbtt_early, in rtw89_mac_port_cfg_tbtt_early()
4493 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_bss_color()
4494 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_bss_color()
4501 u8 port = rtwvif_link->port; in rtw89_mac_port_cfg_bss_color()
4509 bss_color = bss_conf->he_bss_color.color; in rtw89_mac_port_cfg_bss_color()
4513 reg_base = port >= 4 ? p->bss_color + 4 : p->bss_color; in rtw89_mac_port_cfg_bss_color()
4514 reg = rtw89_mac_reg_by_idx(rtwdev, reg_base, rtwvif_link->mac_idx); in rtw89_mac_port_cfg_bss_color()
4521 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_mbssid()
4522 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_mbssid()
4523 u8 port = rtwvif_link->port; in rtw89_mac_port_cfg_mbssid()
4526 if (rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE) in rtw89_mac_port_cfg_mbssid()
4530 reg = rtw89_mac_reg_by_idx(rtwdev, p->mbssid, rtwvif_link->mac_idx); in rtw89_mac_port_cfg_mbssid()
4538 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_hiq_drop()
4539 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_hiq_drop()
4540 u8 port = rtwvif_link->port; in rtw89_mac_port_cfg_hiq_drop()
4544 reg = rtw89_mac_reg_by_idx(rtwdev, p->mbssid_drop, rtwvif_link->mac_idx); in rtw89_mac_port_cfg_hiq_drop()
4555 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_func_en()
4556 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_func_en()
4559 rtw89_write32_port_set(rtwdev, rtwvif_link, p->port_cfg, in rtw89_mac_port_cfg_func_en()
4562 rtw89_write32_port_clr(rtwdev, rtwvif_link, p->port_cfg, in rtw89_mac_port_cfg_func_en()
4569 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_bcn_early()
4570 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_bcn_early()
4572 rtw89_write32_port_mask(rtwdev, rtwvif_link, p->bcn_early, B_AX_BCNERLY_MASK, in rtw89_mac_port_cfg_bcn_early()
4579 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_cfg_tbtt_shift()
4580 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_cfg_tbtt_shift()
4583 if (rtwdev->chip->chip_id != RTL8852C) in rtw89_mac_port_cfg_tbtt_shift()
4586 if (rtwvif_link->wifi_role != RTW89_WIFI_ROLE_P2P_CLIENT && in rtw89_mac_port_cfg_tbtt_shift()
4587 rtwvif_link->wifi_role != RTW89_WIFI_ROLE_STATION) in rtw89_mac_port_cfg_tbtt_shift()
4593 rtw89_write16_port_mask(rtwdev, rtwvif_link, p->tbtt_shift, in rtw89_mac_port_cfg_tbtt_shift()
4602 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_tsf_sync()
4603 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_tsf_sync()
4607 reg = rtw89_mac_reg_by_idx(rtwdev, p->tsf_sync + rtwvif_link->port * 4, in rtw89_mac_port_tsf_sync()
4608 rtwvif_link->mac_idx); in rtw89_mac_port_tsf_sync()
4610 rtw89_write32_mask(rtwdev, reg, B_AX_SYNC_PORT_SRC, rtwvif_src->port); in rtw89_mac_port_tsf_sync()
4620 if (rtwvif_link->net_type != RTW89_NET_TYPE_AP_MODE || rtwvif_link == rtwvif_src) in rtw89_mac_port_tsf_sync_rand()
4624 offset = offset - offset / 4 + get_random_u32() % (offset / 2); in rtw89_mac_port_tsf_sync_rand()
4641 if (!src || tmp->net_type == RTW89_NET_TYPE_INFRA) in rtw89_mac_port_tsf_resync_all()
4643 if (tmp->net_type == RTW89_NET_TYPE_AP_MODE) in rtw89_mac_port_tsf_resync_all()
4667 rtw89_mac_dmac_tbl_init(rtwdev, rtwvif_link->mac_id); in rtw89_mac_vif_init()
4668 rtw89_mac_cmac_tbl_init(rtwdev, rtwvif_link->mac_id); in rtw89_mac_vif_init()
4670 ret = rtw89_mac_set_macid_pause(rtwdev, rtwvif_link->mac_id, false); in rtw89_mac_vif_init()
4720 u8 port = rtwvif_link->port; in rtw89_mac_port_update()
4723 return -EINVAL; in rtw89_mac_port_update()
4755 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_port_get_tsf()
4756 const struct rtw89_port_reg *p = mac->port_base; in rtw89_mac_port_get_tsf()
4760 ret = rtw89_mac_check_mac_en(rtwdev, rtwvif_link->mac_idx, RTW89_CMAC_SEL); in rtw89_mac_port_get_tsf()
4764 tsf_low = rtw89_read32_port(rtwdev, rtwvif_link, p->tsftr_l); in rtw89_mac_port_get_tsf()
4765 tsf_high = rtw89_read32_port(rtwdev, rtwvif_link, p->tsftr_h); in rtw89_mac_port_get_tsf()
4780 ies = rcu_dereference(bss->ies); in rtw89_mac_check_he_obss_narrow_bw_ru_iter()
4781 elem = cfg80211_find_elem(WLAN_EID_EXT_CAPABILITY, ies->data, in rtw89_mac_check_he_obss_narrow_bw_ru_iter()
4782 ies->len); in rtw89_mac_check_he_obss_narrow_bw_ru_iter()
4784 if (!elem || elem->datalen < 10 || in rtw89_mac_check_he_obss_narrow_bw_ru_iter()
4785 !(elem->data[10] & WLAN_EXT_CAPA10_OBSS_NARROW_BW_RU_TOLERANCE_SUPPORT)) in rtw89_mac_check_he_obss_narrow_bw_ru_iter()
4794 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_set_he_obss_narrow_bw_ru()
4795 struct ieee80211_hw *hw = rtwdev->hw; in rtw89_mac_set_he_obss_narrow_bw_ru()
4804 if (!bss_conf->he_support || vif->type != NL80211_IFTYPE_STATION) { in rtw89_mac_set_he_obss_narrow_bw_ru()
4809 oper = bss_conf->chanreq.oper; in rtw89_mac_set_he_obss_narrow_bw_ru()
4810 if (!(oper.chan->flags & IEEE80211_CHAN_RADAR)) { in rtw89_mac_set_he_obss_narrow_bw_ru()
4817 cfg80211_bss_iter(hw->wiphy, &oper, in rtw89_mac_set_he_obss_narrow_bw_ru()
4821 reg = rtw89_mac_reg_by_idx(rtwdev, mac->narrow_bw_ru_dis.addr, in rtw89_mac_set_he_obss_narrow_bw_ru()
4822 rtwvif_link->mac_idx); in rtw89_mac_set_he_obss_narrow_bw_ru()
4824 rtw89_write32_clr(rtwdev, reg, mac->narrow_bw_ru_dis.mask); in rtw89_mac_set_he_obss_narrow_bw_ru()
4826 rtw89_write32_set(rtwdev, reg, mac->narrow_bw_ru_dis.mask); in rtw89_mac_set_he_obss_narrow_bw_ru()
4851 const struct rtw89_chan *op = &rtwdev->scan_info.op_chan; in rtw89_is_op_chan()
4853 return band == op->band_type && channel == op->primary_channel; in rtw89_is_op_chan()
4861 (const struct rtw89_c2h_scanofld *)skb->data; in rtw89_mac_c2h_scanofld_rsp()
4862 struct rtw89_vif_link *rtwvif_link = rtwdev->scan_info.scanning_vif; in rtw89_mac_c2h_scanofld_rsp()
4865 u32 last_chan = rtwdev->scan_info.last_chan_idx, report_tsf; in rtw89_mac_c2h_scanofld_rsp()
4876 rtwvif = rtwvif_link->rtwvif; in rtw89_mac_c2h_scanofld_rsp()
4878 if (RTW89_CHK_FW_FEATURE(CH_INFO_BE_V0, &rtwdev->fw)) in rtw89_mac_c2h_scanofld_rsp()
4881 tx_fail = le32_get_bits(c2h->w5, RTW89_C2H_SCANOFLD_W5_TX_FAIL); in rtw89_mac_c2h_scanofld_rsp()
4882 status = le32_get_bits(c2h->w2, RTW89_C2H_SCANOFLD_W2_STATUS); in rtw89_mac_c2h_scanofld_rsp()
4883 chan = le32_get_bits(c2h->w2, RTW89_C2H_SCANOFLD_W2_PRI_CH); in rtw89_mac_c2h_scanofld_rsp()
4884 reason = le32_get_bits(c2h->w2, RTW89_C2H_SCANOFLD_W2_RSN); in rtw89_mac_c2h_scanofld_rsp()
4885 band = le32_get_bits(c2h->w5, RTW89_C2H_SCANOFLD_W5_BAND); in rtw89_mac_c2h_scanofld_rsp()
4886 actual_period = le32_get_bits(c2h->w2, RTW89_C2H_SCANOFLD_W2_PERIOD); in rtw89_mac_c2h_scanofld_rsp()
4887 mac_idx = le32_get_bits(c2h->w5, RTW89_C2H_SCANOFLD_W5_MAC_IDX); in rtw89_mac_c2h_scanofld_rsp()
4890 if (!(rtwdev->chip->support_bands & BIT(NL80211_BAND_6GHZ))) in rtw89_mac_c2h_scanofld_rsp()
4893 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) { in rtw89_mac_c2h_scanofld_rsp()
4894 sw_def = le32_get_bits(c2h->w6, RTW89_C2H_SCANOFLD_W6_SW_DEF); in rtw89_mac_c2h_scanofld_rsp()
4895 fw_def = le32_get_bits(c2h->w6, RTW89_C2H_SCANOFLD_W6_FW_DEF); in rtw89_mac_c2h_scanofld_rsp()
4896 report_tsf = le32_get_bits(c2h->w7, RTW89_C2H_SCANOFLD_W7_REPORT_TSF); in rtw89_mac_c2h_scanofld_rsp()
4899 le32_get_bits(c2h->w6, RTW89_C2H_SCANOFLD_W6_EXPECT_PERIOD); in rtw89_mac_c2h_scanofld_rsp()
4901 actual_period = le32_get_bits(c2h->w8, RTW89_C2H_SCANOFLD_W8_PERIOD_V1); in rtw89_mac_c2h_scanofld_rsp()
4903 le32_get_bits(c2h->w8, RTW89_C2H_SCANOFLD_W8_EXPECT_PERIOD_V1); in rtw89_mac_c2h_scanofld_rsp()
4920 ieee80211_stop_queues(rtwdev->hw); in rtw89_mac_c2h_scanofld_rsp()
4924 if (rtwdev->scan_info.abort) in rtw89_mac_c2h_scanofld_rsp()
4927 if (rtwvif_link && rtwvif->scan_req && in rtw89_mac_c2h_scanofld_rsp()
4928 last_chan < rtwvif->scan_req->n_channels) { in rtw89_mac_c2h_scanofld_rsp()
4941 rtw89_assign_entity_chan(rtwdev, rtwvif_link->chanctx_idx, in rtw89_mac_c2h_scanofld_rsp()
4942 &rtwdev->scan_info.op_chan); in rtw89_mac_c2h_scanofld_rsp()
4944 ieee80211_wake_queues(rtwdev->hw); in rtw89_mac_c2h_scanofld_rsp()
4948 rtw89_assign_entity_chan(rtwdev, rtwvif_link->chanctx_idx, in rtw89_mac_c2h_scanofld_rsp()
4962 struct rtw89_vif *rtwvif = rtwvif_link->rtwvif; in rtw89_mac_bcn_fltr_rpt()
4965 (const struct rtw89_c2h_mac_bcnfltr_rpt *)skb->data; in rtw89_mac_bcn_fltr_rpt()
4969 type = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_TYPE); in rtw89_mac_bcn_fltr_rpt()
4970 sig = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_MA) - MAX_RSSI; in rtw89_mac_bcn_fltr_rpt()
4971 event = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_EVENT); in rtw89_mac_bcn_fltr_rpt()
4972 mac_id = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_MACID); in rtw89_mac_bcn_fltr_rpt()
4974 if (mac_id != rtwvif_link->mac_id) in rtw89_mac_bcn_fltr_rpt()
4983 if (!rtwdev->scanning && !rtwvif->offchan) in rtw89_mac_bcn_fltr_rpt()
5026 RTW89_GET_MAC_C2H_REV_ACK_CAT(c2h->data), in rtw89_mac_c2h_rec_ack()
5027 RTW89_GET_MAC_C2H_REV_ACK_CLASS(c2h->data), in rtw89_mac_c2h_rec_ack()
5028 RTW89_GET_MAC_C2H_REV_ACK_FUNC(c2h->data), in rtw89_mac_c2h_rec_ack()
5029 RTW89_GET_MAC_C2H_REV_ACK_H2C_SEQ(c2h->data)); in rtw89_mac_c2h_rec_ack()
5036 struct rtw89_wait_info *fw_ofld_wait = &rtwdev->mac.fw_ofld_wait; in rtw89_mac_c2h_done_ack()
5037 struct rtw89_wait_info *ps_wait = &rtwdev->mac.ps_wait; in rtw89_mac_c2h_done_ack()
5039 (const struct rtw89_c2h_done_ack *)skb_c2h->data; in rtw89_mac_c2h_done_ack()
5040 u8 h2c_cat = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_CAT); in rtw89_mac_c2h_done_ack()
5041 u8 h2c_class = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_CLASS); in rtw89_mac_c2h_done_ack()
5042 u8 h2c_func = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_FUNC); in rtw89_mac_c2h_done_ack()
5043 u8 h2c_return = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_H2C_RETURN); in rtw89_mac_c2h_done_ack()
5044 u8 h2c_seq = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_H2C_SEQ); in rtw89_mac_c2h_done_ack()
5094 rtw89_fw_log_dump(rtwdev, c2h->data, len); in rtw89_mac_c2h_log()
5106 struct rtw89_wait_info *wait = &rtwdev->mac.fw_ofld_wait; in rtw89_mac_c2h_pkt_ofld_rsp()
5108 (const struct rtw89_c2h_pkt_ofld_rsp *)skb_c2h->data; in rtw89_mac_c2h_pkt_ofld_rsp()
5109 u16 pkt_len = le32_get_bits(c2h->w2, RTW89_C2H_PKT_OFLD_RSP_W2_PTK_LEN); in rtw89_mac_c2h_pkt_ofld_rsp()
5110 u8 pkt_id = le32_get_bits(c2h->w2, RTW89_C2H_PKT_OFLD_RSP_W2_PTK_ID); in rtw89_mac_c2h_pkt_ofld_rsp()
5111 u8 pkt_op = le32_get_bits(c2h->w2, RTW89_C2H_PKT_OFLD_RSP_W2_PTK_OP); in rtw89_mac_c2h_pkt_ofld_rsp()
5128 (struct rtw89_c2h_tx_duty_rpt *)skb_c2h->data; in rtw89_mac_c2h_tx_duty_rpt()
5131 err = le32_get_bits(c2h->w2, RTW89_C2H_TX_DUTY_RPT_W2_TIMER_ERR); in rtw89_mac_c2h_tx_duty_rpt()
5146 u8 group = RTW89_GET_MAC_C2H_MCC_RCV_ACK_GROUP(c2h->data); in rtw89_mac_c2h_mcc_rcv_ack()
5147 u8 func = RTW89_GET_MAC_C2H_MCC_RCV_ACK_H2C_FUNC(c2h->data); in rtw89_mac_c2h_mcc_rcv_ack()
5162 "invalid MCC C2H RCV ACK: func %d\n", func); in rtw89_mac_c2h_mcc_rcv_ack()
5167 "MCC C2H RCV ACK: group %d, func %d\n", group, func); in rtw89_mac_c2h_mcc_rcv_ack()
5173 u8 group = RTW89_GET_MAC_C2H_MCC_REQ_ACK_GROUP(c2h->data); in rtw89_mac_c2h_mcc_req_ack()
5174 u8 func = RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_FUNC(c2h->data); in rtw89_mac_c2h_mcc_req_ack()
5175 u8 retcode = RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_RETURN(c2h->data); in rtw89_mac_c2h_mcc_req_ack()
5208 rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data); in rtw89_mac_c2h_mcc_req_ack()
5214 u8 group = RTW89_GET_MAC_C2H_MCC_TSF_RPT_GROUP(c2h->data); in rtw89_mac_c2h_mcc_tsf_rpt()
5220 rpt->macid_x = RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_X(c2h->data); in rtw89_mac_c2h_mcc_tsf_rpt()
5221 rpt->macid_y = RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_Y(c2h->data); in rtw89_mac_c2h_mcc_tsf_rpt()
5222 rpt->tsf_x_low = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_X(c2h->data); in rtw89_mac_c2h_mcc_tsf_rpt()
5223 rpt->tsf_x_high = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_X(c2h->data); in rtw89_mac_c2h_mcc_tsf_rpt()
5224 rpt->tsf_y_low = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_Y(c2h->data); in rtw89_mac_c2h_mcc_tsf_rpt()
5225 rpt->tsf_y_high = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_Y(c2h->data); in rtw89_mac_c2h_mcc_tsf_rpt()
5229 rpt->macid_x, (u64)rpt->tsf_x_high << 32 | rpt->tsf_x_low, in rtw89_mac_c2h_mcc_tsf_rpt()
5230 rpt->macid_y, (u64)rpt->tsf_y_high << 32 | rpt->tsf_y_low); in rtw89_mac_c2h_mcc_tsf_rpt()
5233 rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data); in rtw89_mac_c2h_mcc_tsf_rpt()
5239 u8 group = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_GROUP(c2h->data); in rtw89_mac_c2h_mcc_status_rpt()
5240 u8 macid = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_MACID(c2h->data); in rtw89_mac_c2h_mcc_status_rpt()
5241 u8 status = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_STATUS(c2h->data); in rtw89_mac_c2h_mcc_status_rpt()
5242 u32 tsf_low = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_LOW(c2h->data); in rtw89_mac_c2h_mcc_status_rpt()
5243 u32 tsf_high = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_HIGH(c2h->data); in rtw89_mac_c2h_mcc_status_rpt()
5303 rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data); in rtw89_mac_c2h_mcc_status_rpt()
5309 struct rtw89_wait_info *wait = &rtwdev->mcc.wait; in rtw89_mac_c2h_mrc_tsf_rpt()
5315 c2h_rpt = (const struct rtw89_c2h_mrc_tsf_rpt *)c2h->data; in rtw89_mac_c2h_mrc_tsf_rpt()
5317 rpt->num = min_t(u8, RTW89_MAC_MRC_MAX_REQ_TSF_NUM, in rtw89_mac_c2h_mrc_tsf_rpt()
5318 le32_get_bits(c2h_rpt->w2, in rtw89_mac_c2h_mrc_tsf_rpt()
5321 for (i = 0; i < rpt->num; i++) { in rtw89_mac_c2h_mrc_tsf_rpt()
5322 u32 tsf_high = le32_to_cpu(c2h_rpt->infos[i].tsf_high); in rtw89_mac_c2h_mrc_tsf_rpt()
5323 u32 tsf_low = le32_to_cpu(c2h_rpt->infos[i].tsf_low); in rtw89_mac_c2h_mrc_tsf_rpt()
5325 rpt->tsfs[i] = (u64)tsf_high << 32 | tsf_low; in rtw89_mac_c2h_mrc_tsf_rpt()
5329 i, rpt->tsfs[i]); in rtw89_mac_c2h_mrc_tsf_rpt()
5338 struct rtw89_wow_param *rtw_wow = &rtwdev->wow; in rtw89_mac_c2h_wow_aoac_rpt()
5339 struct rtw89_wow_aoac_report *aoac_rpt = &rtw_wow->aoac_rpt; in rtw89_mac_c2h_wow_aoac_rpt()
5340 struct rtw89_wait_info *wait = &rtw_wow->wait; in rtw89_mac_c2h_wow_aoac_rpt()
5342 (const struct rtw89_c2h_wow_aoac_report *)skb->data; in rtw89_mac_c2h_wow_aoac_rpt()
5345 aoac_rpt->rpt_ver = c2h->rpt_ver; in rtw89_mac_c2h_wow_aoac_rpt()
5346 aoac_rpt->sec_type = c2h->sec_type; in rtw89_mac_c2h_wow_aoac_rpt()
5347 aoac_rpt->key_idx = c2h->key_idx; in rtw89_mac_c2h_wow_aoac_rpt()
5348 aoac_rpt->pattern_idx = c2h->pattern_idx; in rtw89_mac_c2h_wow_aoac_rpt()
5349 aoac_rpt->rekey_ok = u8_get_bits(c2h->rekey_ok, in rtw89_mac_c2h_wow_aoac_rpt()
5351 memcpy(aoac_rpt->ptk_tx_iv, c2h->ptk_tx_iv, sizeof(aoac_rpt->ptk_tx_iv)); in rtw89_mac_c2h_wow_aoac_rpt()
5352 memcpy(aoac_rpt->eapol_key_replay_count, c2h->eapol_key_replay_count, in rtw89_mac_c2h_wow_aoac_rpt()
5353 sizeof(aoac_rpt->eapol_key_replay_count)); in rtw89_mac_c2h_wow_aoac_rpt()
5354 memcpy(aoac_rpt->gtk, c2h->gtk, sizeof(aoac_rpt->gtk)); in rtw89_mac_c2h_wow_aoac_rpt()
5355 memcpy(aoac_rpt->ptk_rx_iv, c2h->ptk_rx_iv, sizeof(aoac_rpt->ptk_rx_iv)); in rtw89_mac_c2h_wow_aoac_rpt()
5356 memcpy(aoac_rpt->gtk_rx_iv, c2h->gtk_rx_iv, sizeof(aoac_rpt->gtk_rx_iv)); in rtw89_mac_c2h_wow_aoac_rpt()
5357 aoac_rpt->igtk_key_id = le64_to_cpu(c2h->igtk_key_id); in rtw89_mac_c2h_wow_aoac_rpt()
5358 aoac_rpt->igtk_ipn = le64_to_cpu(c2h->igtk_ipn); in rtw89_mac_c2h_wow_aoac_rpt()
5359 memcpy(aoac_rpt->igtk, c2h->igtk, sizeof(aoac_rpt->igtk)); in rtw89_mac_c2h_wow_aoac_rpt()
5367 struct rtw89_wait_info *wait = &rtwdev->mcc.wait; in rtw89_mac_c2h_mrc_status_rpt()
5378 c2h_rpt = (const struct rtw89_c2h_mrc_status_rpt *)c2h->data; in rtw89_mac_c2h_mrc_status_rpt()
5379 sch_idx = le32_get_bits(c2h_rpt->w2, RTW89_C2H_MRC_STATUS_RPT_W2_SCH_IDX); in rtw89_mac_c2h_mrc_status_rpt()
5380 status = le32_get_bits(c2h_rpt->w2, RTW89_C2H_MRC_STATUS_RPT_W2_STATUS); in rtw89_mac_c2h_mrc_status_rpt()
5381 tsf_high = le32_to_cpu(c2h_rpt->tsf_high); in rtw89_mac_c2h_mrc_status_rpt()
5382 tsf_low = le32_to_cpu(c2h_rpt->tsf_low); in rtw89_mac_c2h_mrc_status_rpt()
5430 "MRC C2H STS RPT: tx null-0 fail\n"); in rtw89_mac_c2h_mrc_status_rpt()
5463 c2h = (const struct rtw89_c2h_pwr_int_notify *)skb->data; in rtw89_mac_c2h_pwr_int_notify()
5464 macid = le32_get_bits(c2h->w2, RTW89_C2H_PWR_INT_NOTIFY_W2_MACID); in rtw89_mac_c2h_pwr_int_notify()
5465 ps = le32_get_bits(c2h->w2, RTW89_C2H_PWR_INT_NOTIFY_W2_PWR_STATUS); in rtw89_mac_c2h_pwr_int_notify()
5473 rtwsta = rtwsta_link->rtwsta; in rtw89_mac_c2h_pwr_int_notify()
5475 set_bit(RTW89_REMOTE_STA_IN_PS, rtwsta->flags); in rtw89_mac_c2h_pwr_int_notify()
5477 clear_bit(RTW89_REMOTE_STA_IN_PS, rtwsta->flags); in rtw89_mac_c2h_pwr_int_notify()
5541 (const struct rtw89_c2h_scanofld *)skb->data; in rtw89_mac_c2h_scanofld_rsp_atomic()
5542 struct rtw89_wait_info *fw_ofld_wait = &rtwdev->mac.fw_ofld_wait; in rtw89_mac_c2h_scanofld_rsp_atomic()
5547 status = le32_get_bits(c2h->w2, RTW89_C2H_SCANOFLD_W2_STATUS); in rtw89_mac_c2h_scanofld_rsp_atomic()
5548 reason = le32_get_bits(c2h->w2, RTW89_C2H_SCANOFLD_W2_RSN); in rtw89_mac_c2h_scanofld_rsp_atomic()
5552 if (rtwdev->chip->chip_gen == RTW89_CHIP_BE) in rtw89_mac_c2h_scanofld_rsp_atomic()
5651 enum rtw89_qta_mode mode = rtwdev->mac.qta_mode; in rtw89_mac_get_txpwr_cr_ax()
5712 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in __rtw89_mac_update_rts_threshold()
5713 struct ieee80211_hw *hw = rtwdev->hw; in __rtw89_mac_update_rts_threshold()
5714 u32 rts_threshold = hw->wiphy->rts_threshold; in __rtw89_mac_update_rts_threshold()
5718 if (rts_threshold == (u32)-1) { in __rtw89_mac_update_rts_threshold()
5729 reg = rtw89_mac_reg_by_idx(rtwdev, mac->agg_len_ht, mac_idx); in __rtw89_mac_update_rts_threshold()
5737 if (rtwdev->dbcc_en) in rtw89_mac_update_rts_threshold()
5746 if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) in rtw89_mac_flush_txq()
5751 if (ret && !drop && (rtwdev->total_sta_assoc || rtwdev->scanning)) in rtw89_mac_flush_txq()
5757 enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; in rtw89_mac_coex_init()
5788 switch (coex->pta_mode) { in rtw89_mac_coex_init()
5822 return -EINVAL; in rtw89_mac_coex_init()
5825 switch (coex->direction) { in rtw89_mac_coex_init()
5842 return -EINVAL; in rtw89_mac_coex_init()
5858 switch (coex->pta_mode) { in rtw89_mac_coex_init_v1()
5870 return -EINVAL; in rtw89_mac_coex_init_v1()
5882 if (gnt_cfg->band[0].gnt_bt) in rtw89_mac_cfg_gnt()
5885 if (gnt_cfg->band[0].gnt_bt_sw_en) in rtw89_mac_cfg_gnt()
5888 if (gnt_cfg->band[0].gnt_wl) in rtw89_mac_cfg_gnt()
5891 if (gnt_cfg->band[0].gnt_wl_sw_en) in rtw89_mac_cfg_gnt()
5894 if (gnt_cfg->band[1].gnt_bt) in rtw89_mac_cfg_gnt()
5897 if (gnt_cfg->band[1].gnt_bt_sw_en) in rtw89_mac_cfg_gnt()
5900 if (gnt_cfg->band[1].gnt_wl) in rtw89_mac_cfg_gnt()
5903 if (gnt_cfg->band[1].gnt_wl_sw_en) in rtw89_mac_cfg_gnt()
5921 if (gnt_cfg->band[0].gnt_bt) in rtw89_mac_cfg_gnt_v1()
5927 if (gnt_cfg->band[0].gnt_bt_sw_en) in rtw89_mac_cfg_gnt_v1()
5931 if (gnt_cfg->band[0].gnt_wl) in rtw89_mac_cfg_gnt_v1()
5935 if (gnt_cfg->band[0].gnt_wl_sw_en) in rtw89_mac_cfg_gnt_v1()
5939 if (gnt_cfg->band[1].gnt_bt) in rtw89_mac_cfg_gnt_v1()
5945 if (gnt_cfg->band[1].gnt_bt_sw_en) in rtw89_mac_cfg_gnt_v1()
5949 if (gnt_cfg->band[1].gnt_wl) in rtw89_mac_cfg_gnt_v1()
5953 if (gnt_cfg->band[1].gnt_wl_sw_en) in rtw89_mac_cfg_gnt_v1()
5970 ret = rtw89_mac_check_mac_en(rtwdev, plt->band, RTW89_CMAC_SEL); in rtw89_mac_cfg_plt_ax()
5974 reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BT_PLT, plt->band); in rtw89_mac_cfg_plt_ax()
5975 val = (plt->tx & RTW89_MAC_AX_PLT_LTE_RX ? B_AX_TX_PLT_GNT_LTE_RX : 0) | in rtw89_mac_cfg_plt_ax()
5976 (plt->tx & RTW89_MAC_AX_PLT_GNT_BT_TX ? B_AX_TX_PLT_GNT_BT_TX : 0) | in rtw89_mac_cfg_plt_ax()
5977 (plt->tx & RTW89_MAC_AX_PLT_GNT_BT_RX ? B_AX_TX_PLT_GNT_BT_RX : 0) | in rtw89_mac_cfg_plt_ax()
5978 (plt->tx & RTW89_MAC_AX_PLT_GNT_WL ? B_AX_TX_PLT_GNT_WL : 0) | in rtw89_mac_cfg_plt_ax()
5979 (plt->rx & RTW89_MAC_AX_PLT_LTE_RX ? B_AX_RX_PLT_GNT_LTE_RX : 0) | in rtw89_mac_cfg_plt_ax()
5980 (plt->rx & RTW89_MAC_AX_PLT_GNT_BT_TX ? B_AX_RX_PLT_GNT_BT_TX : 0) | in rtw89_mac_cfg_plt_ax()
5981 (plt->rx & RTW89_MAC_AX_PLT_GNT_BT_RX ? B_AX_RX_PLT_GNT_BT_RX : 0) | in rtw89_mac_cfg_plt_ax()
5982 (plt->rx & RTW89_MAC_AX_PLT_GNT_WL ? B_AX_RX_PLT_GNT_WL : 0) | in rtw89_mac_cfg_plt_ax()
5996 if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) in rtw89_mac_cfg_sb()
6026 struct rtw89_btc *btc = &rtwdev->btc; in rtw89_mac_cfg_ctrl_path_v1()
6027 struct rtw89_btc_dm *dm = &btc->dm; in rtw89_mac_cfg_ctrl_path_v1()
6028 struct rtw89_mac_ax_gnt *g = dm->gnt.band; in rtw89_mac_cfg_ctrl_path_v1()
6041 return rtw89_mac_cfg_gnt_v1(rtwdev, &dm->gnt); in rtw89_mac_cfg_ctrl_path_v1()
6047 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_mac_get_ctrl_path()
6050 if (chip->chip_id == RTL8852C || chip->chip_id == RTL8922A) in rtw89_mac_get_ctrl_path()
6052 else if (chip->chip_id == RTL8852A || rtw89_is_rtl885xb(rtwdev)) in rtw89_mac_get_ctrl_path()
6076 if (rtwdev->chip->chip_gen != RTW89_CHIP_AX) in rtw89_mac_bfee_standby_timer()
6082 set_bit(RTW89_FLAG_BFEE_TIMER_KEEP, rtwdev->flags); in rtw89_mac_bfee_standby_timer()
6086 clear_bit(RTW89_FLAG_BFEE_TIMER_KEEP, rtwdev->flags); in rtw89_mac_bfee_standby_timer()
6094 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_bfee_ctrl()
6096 u32 mask = mac->bfee_ctrl.mask; in rtw89_mac_bfee_ctrl()
6099 reg = rtw89_mac_reg_by_idx(rtwdev, mac->bfee_ctrl.addr, mac_idx); in rtw89_mac_bfee_ctrl()
6101 set_bit(RTW89_FLAG_BFEE_EN, rtwdev->flags); in rtw89_mac_bfee_ctrl()
6104 clear_bit(RTW89_FLAG_BFEE_EN, rtwdev->flags); in rtw89_mac_bfee_ctrl()
6157 u8 mac_idx = rtwvif_link->mac_idx; in rtw89_mac_set_csi_para_reg_ax()
6158 u8 port_sel = rtwvif_link->port; in rtw89_mac_set_csi_para_reg_ax()
6172 phy_cap = link_sta->he_cap.he_cap_elem.phy_cap_info; in rtw89_mac_set_csi_para_reg_ax()
6182 if ((link_sta->vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE) || in rtw89_mac_set_csi_para_reg_ax()
6183 (link_sta->vht_cap.cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE)) { in rtw89_mac_set_csi_para_reg_ax()
6184 ldpc_en &= !!(link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC); in rtw89_mac_set_csi_para_reg_ax()
6185 stbc_en &= !!(link_sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK); in rtw89_mac_set_csi_para_reg_ax()
6187 link_sta->vht_cap.cap); in rtw89_mac_set_csi_para_reg_ax()
6222 u8 mac_idx = rtwvif_link->mac_idx; in rtw89_mac_csi_rrsc_ax()
6234 if (link_sta->he_cap.has_he) { in rtw89_mac_csi_rrsc_ax()
6239 if (link_sta->vht_cap.vht_supported) { in rtw89_mac_csi_rrsc_ax()
6244 if (link_sta->ht_cap.ht_supported) { in rtw89_mac_csi_rrsc_ax()
6279 rtw89_mac_init_bfee_ax(rtwdev, rtwvif_link->mac_idx); in rtw89_mac_bf_assoc_ax()
6289 rtw89_mac_bfee_ctrl(rtwdev, rtwvif_link->mac_idx, false); in rtw89_mac_bf_disassoc()
6300 rtwvif_link = rtwvif->links[conf->link_id]; in rtw89_mac_bf_set_gid_table()
6304 __func__, conf->link_id); in rtw89_mac_bf_set_gid_table()
6308 mac_idx = rtwvif_link->mac_idx; in rtw89_mac_bf_set_gid_table()
6312 p = (__le32 *)conf->mu_group.membership; in rtw89_mac_bf_set_gid_table()
6320 p = (__le32 *)conf->mu_group.position; in rtw89_mac_bf_set_gid_table()
6342 struct rtw89_sta_link *down_rtwsta_link = iter_data->down_rtwsta_link; in rtw89_mac_bf_monitor_calc_iter()
6347 int *count = &iter_data->count; in rtw89_mac_bf_monitor_calc_iter()
6378 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_mac_bf_monitor_calc()
6384 set_bit(RTW89_FLAG_BFEE_MON, rtwdev->flags); in rtw89_mac_bf_monitor_calc()
6386 clear_bit(RTW89_FLAG_BFEE_MON, rtwdev->flags); in rtw89_mac_bf_monitor_calc()
6391 struct rtw89_traffic_stats *stats = &rtwdev->stats; in _rtw89_mac_bf_monitor_track()
6393 bool en = stats->tx_tfc_lv <= stats->rx_tfc_lv; in _rtw89_mac_bf_monitor_track()
6394 bool old = test_bit(RTW89_FLAG_BFEE_EN, rtwdev->flags); in _rtw89_mac_bf_monitor_track()
6400 old_keep_timer = test_bit(RTW89_FLAG_BFEE_TIMER_KEEP, rtwdev->flags); in _rtw89_mac_bf_monitor_track()
6402 if (stats->tx_tfc_lv <= RTW89_TFC_LOW && stats->rx_tfc_lv <= RTW89_TFC_LOW) in _rtw89_mac_bf_monitor_track()
6408 rtw89_mac_bfee_standby_timer(rtwdev, rtwvif_link->mac_idx, in _rtw89_mac_bf_monitor_track()
6417 rtw89_mac_bfee_ctrl(rtwdev, rtwvif_link->mac_idx, en); in _rtw89_mac_bf_monitor_track()
6425 u8 mac_idx = rtwsta_link->rtwvif_link->mac_idx; in __rtw89_mac_set_tx_time()
6430 if (rtwsta_link->cctl_tx_time) { in __rtw89_mac_set_tx_time()
6431 rtwsta_link->ampdu_max_time = (max_tx_time - 512) >> 9; in __rtw89_mac_set_tx_time()
6454 rtwsta_link->cctl_tx_time = true; in rtw89_mac_set_tx_time()
6458 rtwsta_link->cctl_tx_time = false; in rtw89_mac_set_tx_time()
6467 u8 mac_idx = rtwsta_link->rtwvif_link->mac_idx; in rtw89_mac_get_tx_time()
6471 if (rtwsta_link->cctl_tx_time) { in rtw89_mac_get_tx_time()
6472 *tx_time = (rtwsta_link->ampdu_max_time + 1) << 9; in rtw89_mac_get_tx_time()
6493 rtwsta_link->data_tx_cnt_lmt = tx_retry; in rtw89_mac_set_tx_retry_limit()
6496 rtwsta_link->cctl_tx_retry_limit = true; in rtw89_mac_set_tx_retry_limit()
6500 rtwsta_link->cctl_tx_retry_limit = false; in rtw89_mac_set_tx_retry_limit()
6509 u8 mac_idx = rtwsta_link->rtwvif_link->mac_idx; in rtw89_mac_get_tx_retry_limit()
6513 if (rtwsta_link->cctl_tx_retry_limit) { in rtw89_mac_get_tx_retry_limit()
6514 *tx_retry = rtwsta_link->data_tx_cnt_lmt; in rtw89_mac_get_tx_retry_limit()
6532 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_set_hw_muedca_ctrl()
6533 u8 mac_idx = rtwvif_link->mac_idx; in rtw89_mac_set_hw_muedca_ctrl()
6534 u16 set = mac->muedca_ctrl.mask; in rtw89_mac_set_hw_muedca_ctrl()
6542 reg = rtw89_mac_reg_by_idx(rtwdev, mac->muedca_ctrl.addr, mac_idx); in rtw89_mac_set_hw_muedca_ctrl()
6614 params.mac_band = rtwvif_link->mac_idx; in rtw89_mac_pkt_drop_sta()
6615 params.macid = rtwsta_link->mac_id; in rtw89_mac_pkt_drop_sta()
6616 params.port = rtwvif_link->port; in rtw89_mac_pkt_drop_sta()
6618 params.tf_trs = rtwvif_link->trigger; in rtw89_mac_pkt_drop_sta()
6621 params.sel = sels[i]; in rtw89_mac_pkt_drop_sta()
6629 struct rtw89_vif *rtwvif = rtwsta->rtwvif; in rtw89_mac_pkt_drop_vif_iter()
6630 struct rtw89_dev *rtwdev = rtwsta->rtwdev; in rtw89_mac_pkt_drop_vif_iter()
6640 rtwvif_link = rtwsta_link->rtwvif_link; in rtw89_mac_pkt_drop_vif_iter()
6647 ieee80211_iterate_stations_atomic(rtwdev->hw, in rtw89_mac_pkt_drop_vif()
6655 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_mac_ptk_drop_by_band_and_wait()
6661 params.sel = RTW89_PKT_DROP_SEL_BAND_ONCE; in rtw89_mac_ptk_drop_by_band_and_wait()
6664 ret = read_poll_timeout(mac->is_txq_empty, empty, empty, 50, in rtw89_mac_ptk_drop_by_band_and_wait()
6666 if (ret && !RTW89_CHK_FW_FEATURE(NO_PACKET_DROP, &rtwdev->fw)) in rtw89_mac_ptk_drop_by_band_and_wait()
6680 if (RTW89_CHK_FW_FEATURE(NO_WOW_CPU_IO_RX, &rtwdev->fw)) in rtw89_mac_cpu_io_rx()
6692 ret = -EINVAL; in rtw89_mac_cpu_io_rx()
6699 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def; in rtw89_wow_config_mac_ax()
6700 const struct rtw89_chip_info *chip = rtwdev->chip; in rtw89_wow_config_mac_ax()
6712 rtw89_write32_clr(rtwdev, mac->rx_fltr, B_AX_SNIFFER_MODE); in rtw89_wow_config_mac_ax()
6719 if (RTW89_CHK_FW_FEATURE(NO_WOW_CPU_IO_RX, &rtwdev->fw)) in rtw89_wow_config_mac_ax()
6722 if (chip->chip_id == RTL8852A || rtw89_is_rtl885xb(rtwdev)) in rtw89_wow_config_mac_ax()
6766 struct rtw89_fw_secure *sec = &rtwdev->fw.sec; in rtw89_fwdl_secure_idmem_share_mode_ax()
6768 if (!sec->secure_boot) in rtw89_fwdl_secure_idmem_share_mode_ax()