Lines Matching full:s8
97 #define RTW_JGRPHY_W1_CFO_SHORT_A GENMASK(15, 8) /* s8 */
98 #define RTW_JGRPHY_W1_CFO_SHORT_B GENMASK(23, 16) /* s8 */
104 #define RTW_JGRPHY_W2_CFO_TAIL_A GENMASK(15, 8) /* s8 */
105 #define RTW_JGRPHY_W2_CFO_TAIL_B GENMASK(23, 16) /* s8 */
110 #define RTW_JGRPHY_W3_RXEVM_1 GENMASK(15, 8) /* s8 */
111 #define RTW_JGRPHY_W3_RXEVM_2 GENMASK(23, 16) /* s8 */
112 #define RTW_JGRPHY_W3_RXSNR_A GENMASK(31, 24) /* s8 */
114 #define RTW_JGRPHY_W4_RXSNR_B GENMASK(7, 0) /* s8 */
117 #define RTW_JGRPHY_W4_RXEVM_3 GENMASK(31, 24) /* s8 */
119 #define RTW_JGRPHY_W5_RXEVM_4 GENMASK(7, 0) /* s8 */
124 #define RTW_JGRPHY_W5_RXSNR_C GENMASK(15, 8) /* s8 */
125 #define RTW_JGRPHY_W5_RXSNR_D GENMASK(23, 16) /* s8 */
131 #define RTW_JGRPHY_W6_SIGEVM GENMASK(15, 8) /* s8 */
153 s8 (*cck_rx_pwr)(u8 lna_idx, u8 vga_idx));