Lines Matching +full:adc +full:- +full:1 +full:bit +full:- +full:rpt
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
34 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8812a_read_amplifier_type()
36 efuse->ext_pa_2g = (efuse->pa_type_2g & BIT(5)) && in rtw8812a_read_amplifier_type()
37 (efuse->pa_type_2g & BIT(4)); in rtw8812a_read_amplifier_type()
38 efuse->ext_lna_2g = (efuse->lna_type_2g & BIT(7)) && in rtw8812a_read_amplifier_type()
39 (efuse->lna_type_2g & BIT(3)); in rtw8812a_read_amplifier_type()
41 efuse->ext_pa_5g = (efuse->pa_type_5g & BIT(1)) && in rtw8812a_read_amplifier_type()
42 (efuse->pa_type_5g & BIT(0)); in rtw8812a_read_amplifier_type()
43 efuse->ext_lna_5g = (efuse->lna_type_5g & BIT(7)) && in rtw8812a_read_amplifier_type()
44 (efuse->lna_type_5g & BIT(3)); in rtw8812a_read_amplifier_type()
47 if (efuse->ext_pa_2g) { in rtw8812a_read_amplifier_type()
48 u8 ext_type_pa_2g_a = u8_get_bits(efuse->lna_type_2g, BIT(2)); in rtw8812a_read_amplifier_type()
49 u8 ext_type_pa_2g_b = u8_get_bits(efuse->lna_type_2g, BIT(6)); in rtw8812a_read_amplifier_type()
51 efuse->gpa_type = (ext_type_pa_2g_b << 2) | ext_type_pa_2g_a; in rtw8812a_read_amplifier_type()
54 if (efuse->ext_pa_5g) { in rtw8812a_read_amplifier_type()
55 u8 ext_type_pa_5g_a = u8_get_bits(efuse->lna_type_5g, BIT(2)); in rtw8812a_read_amplifier_type()
56 u8 ext_type_pa_5g_b = u8_get_bits(efuse->lna_type_5g, BIT(6)); in rtw8812a_read_amplifier_type()
58 efuse->apa_type = (ext_type_pa_5g_b << 2) | ext_type_pa_5g_a; in rtw8812a_read_amplifier_type()
61 if (efuse->ext_lna_2g) { in rtw8812a_read_amplifier_type()
62 u8 ext_type_lna_2g_a = u8_get_bits(efuse->lna_type_2g, in rtw8812a_read_amplifier_type()
63 BIT(1) | BIT(0)); in rtw8812a_read_amplifier_type()
64 u8 ext_type_lna_2g_b = u8_get_bits(efuse->lna_type_2g, in rtw8812a_read_amplifier_type()
65 BIT(5) | BIT(4)); in rtw8812a_read_amplifier_type()
67 efuse->glna_type = (ext_type_lna_2g_b << 2) | ext_type_lna_2g_a; in rtw8812a_read_amplifier_type()
70 if (efuse->ext_lna_5g) { in rtw8812a_read_amplifier_type()
71 u8 ext_type_lna_5g_a = u8_get_bits(efuse->lna_type_5g, in rtw8812a_read_amplifier_type()
72 BIT(1) | BIT(0)); in rtw8812a_read_amplifier_type()
73 u8 ext_type_lna_5g_b = u8_get_bits(efuse->lna_type_5g, in rtw8812a_read_amplifier_type()
74 BIT(5) | BIT(4)); in rtw8812a_read_amplifier_type()
76 efuse->alna_type = (ext_type_lna_5g_b << 2) | ext_type_lna_5g_a; in rtw8812a_read_amplifier_type()
83 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8812a_read_rfe_type()
85 if (map->rfe_option == 0xff) { in rtw8812a_read_rfe_type()
86 if (rtwdev->hci.type == RTW_HCI_TYPE_USB) in rtw8812a_read_rfe_type()
87 efuse->rfe_option = 0; in rtw8812a_read_rfe_type()
88 else if (rtwdev->hci.type == RTW_HCI_TYPE_PCIE) in rtw8812a_read_rfe_type()
89 efuse->rfe_option = 2; in rtw8812a_read_rfe_type()
91 efuse->rfe_option = 4; in rtw8812a_read_rfe_type()
92 } else if (map->rfe_option & BIT(7)) { in rtw8812a_read_rfe_type()
93 if (efuse->ext_lna_5g) { in rtw8812a_read_rfe_type()
94 if (efuse->ext_pa_5g) { in rtw8812a_read_rfe_type()
95 if (efuse->ext_lna_2g && efuse->ext_pa_2g) in rtw8812a_read_rfe_type()
96 efuse->rfe_option = 3; in rtw8812a_read_rfe_type()
98 efuse->rfe_option = 0; in rtw8812a_read_rfe_type()
100 efuse->rfe_option = 2; in rtw8812a_read_rfe_type()
103 efuse->rfe_option = 4; in rtw8812a_read_rfe_type()
106 efuse->rfe_option = map->rfe_option & 0x3f; in rtw8812a_read_rfe_type()
113 if (efuse->rfe_option == 4 && in rtw8812a_read_rfe_type()
114 (efuse->ext_pa_5g || efuse->ext_pa_2g || in rtw8812a_read_rfe_type()
115 efuse->ext_lna_5g || efuse->ext_lna_2g)) { in rtw8812a_read_rfe_type()
116 if (rtwdev->hci.type == RTW_HCI_TYPE_USB) in rtw8812a_read_rfe_type()
117 efuse->rfe_option = 0; in rtw8812a_read_rfe_type()
118 else if (rtwdev->hci.type == RTW_HCI_TYPE_PCIE) in rtw8812a_read_rfe_type()
119 efuse->rfe_option = 2; in rtw8812a_read_rfe_type()
126 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw88xxa_read_usb_type()
127 struct rtw_hal *hal = &rtwdev->hal; in rtw88xxa_read_usb_type()
132 efuse->hw_cap.bw = BIT(RTW_CHANNEL_WIDTH_20) | in rtw88xxa_read_usb_type()
133 BIT(RTW_CHANNEL_WIDTH_40) | in rtw88xxa_read_usb_type()
134 BIT(RTW_CHANNEL_WIDTH_80); in rtw88xxa_read_usb_type()
135 efuse->hw_cap.ptcl = EFUSE_HW_CAP_PTCL_VHT; in rtw88xxa_read_usb_type()
137 if (rtwdev->chip->id == RTW_CHIP_TYPE_8821A) in rtw88xxa_read_usb_type()
138 efuse->hw_cap.nss = 1; in rtw88xxa_read_usb_type()
140 efuse->hw_cap.nss = 2; in rtw88xxa_read_usb_type()
142 if (rtwdev->chip->id == RTW_CHIP_TYPE_8821A) in rtw88xxa_read_usb_type()
146 rtw_read8_physical_efuse(rtwdev, 1019 - i, &val8); in rtw88xxa_read_usb_type()
151 antenna = u8_get_bits(val8, GENMASK(3, 1)); in rtw88xxa_read_usb_type()
157 rtw_read8_physical_efuse(rtwdev, 1021 - i, &val8); in rtw88xxa_read_usb_type()
164 if (antenna == 1) { in rtw88xxa_read_usb_type()
165 rtw_info(rtwdev, "This RTL8812AU says it is 1T1R.\n"); in rtw88xxa_read_usb_type()
167 efuse->hw_cap.nss = 1; in rtw88xxa_read_usb_type()
168 hal->rf_type = RF_1T1R; in rtw88xxa_read_usb_type()
169 hal->rf_path_num = 1; in rtw88xxa_read_usb_type()
170 hal->rf_phy_num = 1; in rtw88xxa_read_usb_type()
171 hal->antenna_tx = BB_PATH_A; in rtw88xxa_read_usb_type()
172 hal->antenna_rx = BB_PATH_A; in rtw88xxa_read_usb_type()
174 /* Override rtw_chip_parameter_setup(). It detects 8812au as 1T1R. */ in rtw88xxa_read_usb_type()
175 efuse->hw_cap.nss = 2; in rtw88xxa_read_usb_type()
176 hal->rf_type = RF_2T2R; in rtw88xxa_read_usb_type()
177 hal->rf_path_num = 2; in rtw88xxa_read_usb_type()
178 hal->rf_phy_num = 2; in rtw88xxa_read_usb_type()
179 hal->antenna_tx = BB_PATH_AB; in rtw88xxa_read_usb_type()
180 hal->antenna_rx = BB_PATH_AB; in rtw88xxa_read_usb_type()
186 * EFUSE_HW_CAP_PTCL_VHT, so make it 1. in rtw88xxa_read_usb_type()
188 efuse->hw_cap.ptcl = 1; in rtw88xxa_read_usb_type()
189 efuse->hw_cap.bw &= ~BIT(RTW_CHANNEL_WIDTH_80); in rtw88xxa_read_usb_type()
196 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl, in rtw88xxa_read_usb_type()
197 efuse->hw_cap.ant_num, efuse->hw_cap.nss); in rtw88xxa_read_usb_type()
202 const struct rtw_chip_info *chip = rtwdev->chip; in rtw88xxa_read_efuse()
203 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw88xxa_read_efuse()
207 if (chip->id == RTW_CHIP_TYPE_8812A) in rtw88xxa_read_efuse()
208 rtwdev->hal.cut_version += 1; in rtw88xxa_read_efuse()
211 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1, in rtw88xxa_read_efuse()
212 log_map, chip->log_efuse_size, true); in rtw88xxa_read_efuse()
216 efuse->rf_board_option = map->rf_board_option; in rtw88xxa_read_efuse()
217 efuse->crystal_cap = map->xtal_k; in rtw88xxa_read_efuse()
218 if (efuse->crystal_cap == 0xff) in rtw88xxa_read_efuse()
219 efuse->crystal_cap = 0x20; in rtw88xxa_read_efuse()
220 efuse->pa_type_2g = map->pa_type; in rtw88xxa_read_efuse()
221 efuse->pa_type_5g = map->pa_type; in rtw88xxa_read_efuse()
222 efuse->lna_type_2g = map->lna_type_2g; in rtw88xxa_read_efuse()
223 efuse->lna_type_5g = map->lna_type_5g; in rtw88xxa_read_efuse()
224 if (chip->id == RTW_CHIP_TYPE_8812A) { in rtw88xxa_read_efuse()
228 efuse->usb_mode_switch = u8_get_bits(map->usb_mode, BIT(1)); in rtw88xxa_read_efuse()
230 efuse->channel_plan = map->channel_plan; in rtw88xxa_read_efuse()
231 efuse->country_code[0] = map->country_code[0]; in rtw88xxa_read_efuse()
232 efuse->country_code[1] = map->country_code[1]; in rtw88xxa_read_efuse()
233 efuse->bt_setting = map->rf_bt_setting; in rtw88xxa_read_efuse()
234 efuse->regd = map->rf_board_option & 0x7; in rtw88xxa_read_efuse()
235 efuse->thermal_meter[0] = map->thermal_meter; in rtw88xxa_read_efuse()
236 efuse->thermal_meter[1] = map->thermal_meter; in rtw88xxa_read_efuse()
237 efuse->thermal_meter_k = map->thermal_meter; in rtw88xxa_read_efuse()
238 efuse->tx_bb_swing_setting_2g = map->tx_bb_swing_setting_2g; in rtw88xxa_read_efuse()
239 efuse->tx_bb_swing_setting_5g = map->tx_bb_swing_setting_5g; in rtw88xxa_read_efuse()
243 if (chip->id == RTW_CHIP_TYPE_8821A) in rtw88xxa_read_efuse()
244 efuse->btcoex = rtw_read32_mask(rtwdev, REG_WL_BT_PWR_CTRL, in rtw88xxa_read_efuse()
247 efuse->btcoex = (map->rf_board_option & 0xe0) == 0x20; in rtw88xxa_read_efuse()
248 efuse->share_ant = !!(efuse->bt_setting & BIT(0)); in rtw88xxa_read_efuse()
251 efuse->ant_div_cfg = 0; in rtw88xxa_read_efuse()
253 efuse->ant_div_type = map->rf_antenna_option; in rtw88xxa_read_efuse()
254 if (efuse->ant_div_type == 0xff) in rtw88xxa_read_efuse()
255 efuse->ant_div_type = 0x3; in rtw88xxa_read_efuse()
258 efuse->txpwr_idx_table[i] = map->txpwr_idx_table[i]; in rtw88xxa_read_efuse()
262 if (chip->id == RTW_CHIP_TYPE_8821A) in rtw88xxa_read_efuse()
263 ether_addr_copy(efuse->addr, map->rtw8821au.mac_addr); in rtw88xxa_read_efuse()
265 ether_addr_copy(efuse->addr, map->rtw8812au.mac_addr); in rtw88xxa_read_efuse()
271 return -EOPNOTSUPP; in rtw88xxa_read_efuse()
280 const struct rtw_chip_info *chip = rtwdev->chip; in rtw88xxa_reset_8051()
284 rtw_write8_clr(rtwdev, REG_RSV_CTRL, BIT(1)); in rtw88xxa_reset_8051()
285 if (chip->id == RTW_CHIP_TYPE_8812A) in rtw88xxa_reset_8051()
286 rtw_write8_clr(rtwdev, REG_RSV_CTRL + 1, BIT(3)); in rtw88xxa_reset_8051()
288 rtw_write8_clr(rtwdev, REG_RSV_CTRL + 1, BIT(0)); in rtw88xxa_reset_8051()
290 val8 = rtw_read8(rtwdev, REG_SYS_FUNC_EN + 1); in rtw88xxa_reset_8051()
291 rtw_write8(rtwdev, REG_SYS_FUNC_EN + 1, val8 & ~BIT(2)); in rtw88xxa_reset_8051()
294 rtw_write8_clr(rtwdev, REG_RSV_CTRL, BIT(1)); in rtw88xxa_reset_8051()
295 if (chip->id == RTW_CHIP_TYPE_8812A) in rtw88xxa_reset_8051()
296 rtw_write8_set(rtwdev, REG_RSV_CTRL + 1, BIT(3)); in rtw88xxa_reset_8051()
298 rtw_write8_set(rtwdev, REG_RSV_CTRL + 1, BIT(0)); in rtw88xxa_reset_8051()
300 rtw_write8(rtwdev, REG_SYS_FUNC_EN + 1, val8 | BIT(2)); in rtw88xxa_reset_8051()
315 rtw_write32_set(rtwdev, REG_FPGA0_XCD_RF_PARA, BIT(6)); in rtw88xxau_hw_reset()
318 rtw_write8_clr(rtwdev, REG_SYS_FUNC_EN, BIT(0) | BIT(1)); in rtw88xxau_hw_reset()
326 /* reset MAC, reg0x5[1], auto FSM off */ in rtw88xxau_hw_reset()
327 rtw_write8_set(rtwdev, REG_APS_FSMCO + 1, APS_FSMCO_MAC_OFF >> 8); in rtw88xxau_hw_reset()
329 /* check if reg0x5[1] auto cleared */ in rtw88xxau_hw_reset()
332 1, 5000, false, in rtw88xxau_hw_reset()
333 rtwdev, REG_APS_FSMCO + 1)) in rtw88xxau_hw_reset()
334 rtw_err(rtwdev, "%s: timed out waiting for 0x5[1]\n", __func__); in rtw88xxau_hw_reset()
338 rtw_write8(rtwdev, REG_APS_FSMCO + 1, val8); in rtw88xxau_hw_reset()
340 rtw_write8_clr(rtwdev, REG_SYS_FUNC_EN + 1, BIT(4) | BIT(7)); in rtw88xxau_hw_reset()
341 rtw_write8_set(rtwdev, REG_SYS_FUNC_EN + 1, BIT(4) | BIT(7)); in rtw88xxau_hw_reset()
346 const struct rtw_chip_info *chip = rtwdev->chip; in rtw88xxau_init_power_on()
350 ret = rtw_pwr_seq_parser(rtwdev, chip->pwr_on_seq); in rtw88xxau_init_power_on()
362 if (chip->id == RTW_CHIP_TYPE_8821A) { in rtw88xxau_init_power_on()
363 if (rtw_read8(rtwdev, REG_SYS_CFG1 + 3) & BIT(0)) in rtw88xxau_init_power_on()
364 rtw_write8_set(rtwdev, REG_LDO_SWR_CTRL, BIT(6)); in rtw88xxau_init_power_on()
378 if (!rtw_read32_mask(rtwdev, REG_LLT_INIT, BIT(31) | BIT(30))) in rtw88xxa_llt_write()
384 return -EBUSY; in rtw88xxa_llt_write()
397 for (i = 0; i < boundary - 1; i++) { in rtw88xxa_llt_init()
398 status = rtw88xxa_llt_write(rtwdev, i, i + 1); in rtw88xxa_llt_init()
403 status = rtw88xxa_llt_write(rtwdev, boundary - 1, 0xFF); in rtw88xxa_llt_init()
408 status = rtw88xxa_llt_write(rtwdev, i, i + 1); in rtw88xxa_llt_init()
420 const struct rtw_chip_info *chip = rtwdev->chip; in rtw88xxau_init_queue_reserved_page()
421 struct rtw_fifo_conf *fifo = &rtwdev->fifo; in rtw88xxau_init_queue_reserved_page()
428 pg_tbl = &chip->page_table[1]; in rtw88xxau_init_queue_reserved_page()
431 if (rtwdev->hci.bulkout_num == 2) in rtw88xxau_init_queue_reserved_page()
432 pg_tbl = &chip->page_table[2]; in rtw88xxau_init_queue_reserved_page()
433 else if (rtwdev->hci.bulkout_num == 3) in rtw88xxau_init_queue_reserved_page()
434 pg_tbl = &chip->page_table[3]; in rtw88xxau_init_queue_reserved_page()
435 else if (rtwdev->hci.bulkout_num == 4) in rtw88xxau_init_queue_reserved_page()
436 pg_tbl = &chip->page_table[4]; in rtw88xxau_init_queue_reserved_page()
439 pg_tbl = &chip->page_table[0]; in rtw88xxau_init_queue_reserved_page()
445 pubq_num = fifo->acq_pg_num - pg_tbl->hq_num - pg_tbl->lq_num - in rtw88xxau_init_queue_reserved_page()
446 pg_tbl->nq_num - pg_tbl->exq_num - pg_tbl->gapq_num; in rtw88xxau_init_queue_reserved_page()
448 val32 = BIT_RQPN_NE(pg_tbl->nq_num, pg_tbl->exq_num); in rtw88xxau_init_queue_reserved_page()
451 val32 = BIT_RQPN_HLP(pg_tbl->hq_num, pg_tbl->lq_num, pubq_num); in rtw88xxau_init_queue_reserved_page()
457 struct rtw_fifo_conf *fifo = &rtwdev->fifo; in rtw88xxau_init_tx_buffer_boundary()
459 rtw_write8(rtwdev, REG_BCNQ_BDNY, fifo->rsvd_boundary); in rtw88xxau_init_tx_buffer_boundary()
460 rtw_write8(rtwdev, REG_MGQ_BDNY, fifo->rsvd_boundary); in rtw88xxau_init_tx_buffer_boundary()
461 rtw_write8(rtwdev, REG_WMAC_LBK_BF_HD, fifo->rsvd_boundary); in rtw88xxau_init_tx_buffer_boundary()
462 rtw_write8(rtwdev, REG_TRXFF_BNDY, fifo->rsvd_boundary); in rtw88xxau_init_tx_buffer_boundary()
463 rtw_write8(rtwdev, REG_DWBCN0_CTRL + 1, fifo->rsvd_boundary); in rtw88xxau_init_tx_buffer_boundary()
468 const struct rtw_chip_info *chip = rtwdev->chip; in rtw88xxau_init_queue_priority()
469 u8 bulkout_num = rtwdev->hci.bulkout_num; in rtw88xxau_init_queue_priority()
475 rqpn = &chip->rqpn_table[1]; in rtw88xxau_init_queue_priority()
479 rqpn = &chip->rqpn_table[2]; in rtw88xxau_init_queue_priority()
481 rqpn = &chip->rqpn_table[3]; in rtw88xxau_init_queue_priority()
483 rqpn = &chip->rqpn_table[4]; in rtw88xxau_init_queue_priority()
485 return -EINVAL; in rtw88xxau_init_queue_priority()
488 rqpn = &chip->rqpn_table[0]; in rtw88xxau_init_queue_priority()
491 return -EINVAL; in rtw88xxau_init_queue_priority()
494 rtwdev->fifo.rqpn = rqpn; in rtw88xxau_init_queue_priority()
497 txdma_pq_map |= BIT_TXDMA_HIQ_MAP(rqpn->dma_map_hi); in rtw88xxau_init_queue_priority()
498 txdma_pq_map |= BIT_TXDMA_MGQ_MAP(rqpn->dma_map_mg); in rtw88xxau_init_queue_priority()
499 txdma_pq_map |= BIT_TXDMA_BKQ_MAP(rqpn->dma_map_bk); in rtw88xxau_init_queue_priority()
500 txdma_pq_map |= BIT_TXDMA_BEQ_MAP(rqpn->dma_map_be); in rtw88xxau_init_queue_priority()
501 txdma_pq_map |= BIT_TXDMA_VIQ_MAP(rqpn->dma_map_vi); in rtw88xxau_init_queue_priority()
502 txdma_pq_map |= BIT_TXDMA_VOQ_MAP(rqpn->dma_map_vo); in rtw88xxau_init_queue_priority()
547 const struct rtw_chip_info *chip = rtwdev->chip; in rtw88xxau_tx_aggregation()
550 chip->usb_tx_agg_desc_num); in rtw88xxau_tx_aggregation()
552 if (chip->id == RTW_CHIP_TYPE_8821A) in rtw88xxau_tx_aggregation()
554 chip->usb_tx_agg_desc_num << 1); in rtw88xxau_tx_aggregation()
562 if (rtwdev->efuse.btcoex) in rtw88xxa_init_beacon_parameters()
590 rtw_load_table(rtwdev, rtwdev->chip->bb_tbl); in rtw88xxa_phy_bb_config()
591 rtw_load_table(rtwdev, rtwdev->chip->agc_tbl); in rtw88xxa_phy_bb_config()
593 crystal_cap = rtwdev->efuse.crystal_cap & 0x3F; in rtw88xxa_phy_bb_config()
594 if (rtwdev->chip->id == RTW_CHIP_TYPE_8812A) in rtw88xxa_phy_bb_config()
606 for (rf_path = 0; rf_path < rtwdev->hal.rf_path_num; rf_path++) in rtw88xxa_phy_rf_config()
607 rtw_load_table(rtwdev, rtwdev->chip->rf_tbl[rf_path]); in rtw88xxa_phy_rf_config()
645 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw88xxa_get_bb_swing()
649 tx_bb_swing = efuse->tx_bb_swing_setting_2g; in rtw88xxa_get_bb_swing()
651 tx_bb_swing = efuse->tx_bb_swing_setting_5g; in rtw88xxa_get_bb_swing()
665 swing = rtw88xxa_get_bb_swing(rtwdev, rtwdev->hal.current_band_type, in rtw88xxa_get_swing_index()
679 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw88xxa_pwrtrack_init()
682 dm_info->default_ofdm_index = rtw88xxa_get_swing_index(rtwdev); in rtw88xxa_pwrtrack_init()
684 if (rtwdev->chip->id == RTW_CHIP_TYPE_8821A) in rtw88xxa_pwrtrack_init()
685 dm_info->default_cck_index = 0; in rtw88xxa_pwrtrack_init()
687 dm_info->default_cck_index = 24; in rtw88xxa_pwrtrack_init()
689 for (path = RF_PATH_A; path < rtwdev->hal.rf_path_num; path++) { in rtw88xxa_pwrtrack_init()
690 ewma_thermal_init(&dm_info->avg_thermal[path]); in rtw88xxa_pwrtrack_init()
691 dm_info->delta_power_index[path] = 0; in rtw88xxa_pwrtrack_init()
692 dm_info->delta_power_index_last[path] = 0; in rtw88xxa_pwrtrack_init()
695 dm_info->pwr_trk_triggered = false; in rtw88xxa_pwrtrack_init()
696 dm_info->pwr_trk_init_trigger = true; in rtw88xxa_pwrtrack_init()
697 dm_info->thermal_meter_k = rtwdev->efuse.thermal_meter_k; in rtw88xxa_pwrtrack_init()
704 enum usb_device_speed speed = rtwusb->udev->speed; in rtw88xxa_power_off()
716 if (!rtwdev->efuse.btcoex) in rtw88xxa_power_off()
728 if (rtwdev->efuse.btcoex) in rtw88xxa_power_off()
735 rtw_write8_clr(rtwdev, REG_TX_RPT_CTRL, BIT(1)); in rtw88xxa_power_off()
745 rtw_write8_clr(rtwdev, REG_SYS_FUNC_EN + 1, BIT(2)); in rtw88xxa_power_off()
748 rtw_pwr_seq_parser(rtwdev, rtwdev->chip->pwr_off_seq); in rtw88xxa_power_off()
753 clear_bit(RTW_FLAG_POWERON, rtwdev->flags); in rtw88xxa_power_off()
769 rtw_write32_mask(rtwdev, REG_LED_CFG, BIT_DPDT_WL_SEL, 1); in rtw8821a_set_ext_band_switch()
774 rtw_write32_mask(rtwdev, REG_RFE_INV_A, BIT(29) | BIT(28), 1); in rtw8821a_set_ext_band_switch()
776 rtw_write32_mask(rtwdev, REG_RFE_INV_A, BIT(29) | BIT(28), 2); in rtw8821a_set_ext_band_switch()
781 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8821a_phy_set_rfe_reg_24g()
790 if (efuse->ext_lna_2g) { in rtw8821a_phy_set_rfe_reg_24g()
792 rtw_write32_mask(rtwdev, REG_RFE_INV_A, BIT(20), 1); in rtw8821a_phy_set_rfe_reg_24g()
793 rtw_write32_mask(rtwdev, REG_RFE_INV_A, BIT(22), 0); in rtw8821a_phy_set_rfe_reg_24g()
798 rtw_write32_mask(rtwdev, REG_RFE_INV_A, BIT(20), 0); in rtw8821a_phy_set_rfe_reg_24g()
799 rtw_write32_mask(rtwdev, REG_RFE_INV_A, BIT(22), 0); in rtw8821a_phy_set_rfe_reg_24g()
815 rtw_write32_mask(rtwdev, REG_RFE_INV_A, BIT(20), 0); in rtw8821a_phy_set_rfe_reg_5g()
816 rtw_write32_mask(rtwdev, REG_RFE_INV_A, BIT(22), 0); in rtw8821a_phy_set_rfe_reg_5g()
823 switch (rtwdev->efuse.rfe_option) { in rtw8812a_phy_set_rfe_reg_24g()
831 case 1: in rtw8812a_phy_set_rfe_reg_24g()
832 if (rtwdev->efuse.btcoex) { in rtw8812a_phy_set_rfe_reg_24g()
860 rtw_write8_clr(rtwdev, REG_RFE_INV_A + 3, BIT(0)); in rtw8812a_phy_set_rfe_reg_24g()
876 switch (rtwdev->efuse.rfe_option) { in rtw8812a_phy_set_rfe_reg_5g()
883 case 1: in rtw8812a_phy_set_rfe_reg_5g()
884 if (rtwdev->efuse.btcoex) { in rtw8812a_phy_set_rfe_reg_5g()
913 rtw_write8_set(rtwdev, REG_RFE_INV_A + 3, BIT(0)); in rtw8812a_phy_set_rfe_reg_5g()
929 const struct rtw_chip_info *chip = rtwdev->chip; in rtw88xxa_switch_band()
935 if (chip->id == RTW_CHIP_TYPE_8821A && !rtwdev->efuse.btcoex && in rtw88xxa_switch_band()
936 rtwdev->efuse.ant_div_cfg == 0) in rtw88xxa_switch_band()
942 if (chip->id == RTW_CHIP_TYPE_8821A) { in rtw88xxa_switch_band()
951 rtwdev->hal.rf_type == RF_1T1R && in rtw88xxa_switch_band()
952 !rtwdev->efuse.ext_lna_2g) in rtw88xxa_switch_band()
953 rtw_write32_mask(rtwdev, REG_PDMFTH, GENMASK(3, 1), 0x02); in rtw88xxa_switch_band()
955 rtw_write32_mask(rtwdev, REG_PDMFTH, GENMASK(3, 1), 0x04); in rtw88xxa_switch_band()
965 basic_rates = BIT(DESC_RATE1M) | BIT(DESC_RATE2M) | in rtw88xxa_switch_band()
966 BIT(DESC_RATE5_5M) | BIT(DESC_RATE11M) | in rtw88xxa_switch_band()
967 BIT(DESC_RATE6M) | BIT(DESC_RATE12M) | in rtw88xxa_switch_band()
968 BIT(DESC_RATE24M); in rtw88xxa_switch_band()
973 if (chip->id == RTW_CHIP_TYPE_8821A) in rtw88xxa_switch_band()
983 if (chip->id == RTW_CHIP_TYPE_8821A) { in rtw88xxa_switch_band()
984 rtw_write32_mask(rtwdev, REG_TXSCALE_A, 0xf00, 1); in rtw88xxa_switch_band()
988 rtw_write32_mask(rtwdev, REG_PDMFTH, GENMASK(3, 1), 0x04); in rtw88xxa_switch_band()
990 rtw_write32_mask(rtwdev, REG_CCASEL, 0x3, 1); in rtw88xxa_switch_band()
998 basic_rates = BIT(DESC_RATE6M) | BIT(DESC_RATE12M) | in rtw88xxa_switch_band()
999 BIT(DESC_RATE24M); in rtw88xxa_switch_band()
1009 const struct rtw_chip_info *chip = rtwdev->chip; in rtw88xxa_power_on()
1010 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw88xxa_power_on()
1011 struct rtw_hal *hal = &rtwdev->hal; in rtw88xxa_power_on()
1014 if (test_bit(RTW_FLAG_POWERON, rtwdev->flags)) in rtw88xxa_power_on()
1018 if (chip->id == RTW_CHIP_TYPE_8821A) in rtw88xxa_power_on()
1019 efuse->btcoex = rtw_read32_mask(rtwdev, REG_WL_BT_PWR_CTRL, in rtw88xxa_power_on()
1023 if (chip->id == RTW_CHIP_TYPE_8812A) in rtw88xxa_power_on()
1032 /* Revise for U2/U3 switch we can not update RF-A/B reset. in rtw88xxa_power_on()
1036 if (chip->id == RTW_CHIP_TYPE_8812A) { in rtw88xxa_power_on()
1043 /* If HW didn't go through a complete de-initial procedure, in rtw88xxa_power_on()
1061 ret = rtw88xxa_llt_init(rtwdev, rtwdev->fifo.rsvd_boundary); in rtw88xxa_power_on()
1075 ret = rtw_download_firmware(rtwdev, &rtwdev->fw); in rtw88xxa_power_on()
1083 rtw_load_table(rtwdev, chip->mac_tbl); in rtw88xxa_power_on()
1090 chip->rxff_size - REPORT_BUF - 1); in rtw88xxa_power_on()
1092 if (chip->id == RTW_CHIP_TYPE_8812A) in rtw88xxa_power_on()
1108 rtw_write8_set(rtwdev, REG_FWHW_TXQ_CTRL, BIT(7)); in rtw88xxa_power_on()
1123 rtw_write8(rtwdev, REG_RXDMA_STATUS + 1, 0xf5); in rtw88xxa_power_on()
1126 if (chip->id == RTW_CHIP_TYPE_8821A) in rtw88xxa_power_on()
1135 if (rtwusb->udev->speed == USB_SPEED_SUPER) in rtw88xxa_power_on()
1137 rtw_write8_clr(rtwdev, REG_USB_MOD, BIT(4) | BIT(3)); in rtw88xxa_power_on()
1146 if (chip->id == RTW_CHIP_TYPE_8821A) { in rtw88xxa_power_on()
1153 rtw_write8_clr(rtwdev, REG_FWHW_TXQ_CTRL, BIT(7)); in rtw88xxa_power_on()
1157 rtw_write8_set(rtwdev, REG_RSV_CTRL, BIT(5) | BIT(6)); in rtw88xxa_power_on()
1163 /* ARFB table 10 for 11ac 5G 1SS */ in rtw88xxa_power_on()
1167 /* ARFB table 11 for 11ac 24G 1SS */ in rtw88xxa_power_on()
1180 if (chip->id == RTW_CHIP_TYPE_8812A && hal->rf_path_num == 1) in rtw88xxa_power_on()
1185 rtw_write32(rtwdev, RTW_SEC_CMD_REG, BIT(31) | BIT(30)); in rtw88xxa_power_on()
1191 rtw_write8_clr(rtwdev, REG_GPIO_MUXCFG, BIT(5)); in rtw88xxa_power_on()
1197 /* 0x4c6[3] 1: RTS BW = Data BW in rtw88xxa_power_on()
1200 rtw_write8_clr(rtwdev, REG_QUEUE_CTRL, BIT(3)); in rtw88xxa_power_on()
1203 rtw_write8(rtwdev, REG_FWHW_TXQ_CTRL + 1, 0x0f); in rtw88xxa_power_on()
1217 rtw_write32_set(rtwdev, REG_FWHW_TXQ_CTRL, BIT(12)); in rtw88xxa_power_on()
1219 hal->cck_high_power = rtw_read32_mask(rtwdev, REG_CCK_RPT_FORMAT, in rtw88xxa_power_on()
1228 if (efuse->btcoex) { in rtw88xxa_power_on()
1233 set_bit(RTW_FLAG_POWERON, rtwdev->flags); in rtw88xxa_power_on()
1238 chip->ops->power_off(rtwdev); in rtw88xxa_power_on()
1253 const struct rtw_chip_info *chip = rtwdev->chip; in rtw88xxa_phy_read_rf()
1254 const struct rtw_hal *hal = &rtwdev->hal; in rtw88xxa_phy_read_rf()
1258 if (rf_path >= hal->rf_phy_num) { in rtw88xxa_phy_read_rf()
1266 set_cca = addr != 0x0 && chip->id == RTW_CHIP_TYPE_8812A && in rtw88xxa_phy_read_rf()
1267 hal->cut_version != RTW_CHIP_VER_CUT_C; in rtw88xxa_phy_read_rf()
1270 rtw_write32_set(rtwdev, REG_CCA2ND, BIT(3)); in rtw88xxa_phy_read_rf()
1278 if (chip->id == RTW_CHIP_TYPE_8821A || in rtw88xxa_phy_read_rf()
1279 hal->cut_version == RTW_CHIP_VER_CUT_C) in rtw88xxa_phy_read_rf()
1286 rtw_write32_clr(rtwdev, REG_CCA2ND, BIT(3)); in rtw88xxa_phy_read_rf()
1294 /* C cut Item12 ADC FIFO CLOCK */ in rtw8812a_phy_fix_spur()
1295 if (rtwdev->hal.cut_version == RTW_CHIP_VER_CUT_C) { in rtw8812a_phy_fix_spur()
1301 /* A workaround to resolve 2480Mhz spur by setting ADC clock in rtw8812a_phy_fix_spur()
1306 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 1); in rtw8812a_phy_fix_spur()
1308 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 1); in rtw8812a_phy_fix_spur()
1311 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0); in rtw8812a_phy_fix_spur()
1314 /* A workaround to resolve 2480Mhz spur by setting ADC clock in rtw8812a_phy_fix_spur()
1326 struct rtw_hal *hal = &rtwdev->hal; in rtw88xxa_switch_channel()
1350 for (path = 0; path < hal->rf_path_num; path++) { in rtw88xxa_switch_channel()
1369 if (rtwdev->chip->id == RTW_CHIP_TYPE_8812A) in rtw88xxa_switch_channel()
1392 struct rtw_hal *hal = &rtwdev->hal; in rtw88xxa_post_set_bw_mode()
1415 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0); in rtw88xxa_post_set_bw_mode()
1417 if (hal->rf_type == RF_2T2R) in rtw88xxa_post_set_bw_mode()
1425 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 0); in rtw88xxa_post_set_bw_mode()
1429 if (reg_837 & BIT(2)) { in rtw88xxa_post_set_bw_mode()
1432 if (hal->rf_type == RF_2T2R) in rtw88xxa_post_set_bw_mode()
1441 rtw_write32_set(rtwdev, REG_RXSB, BIT(4)); in rtw88xxa_post_set_bw_mode()
1443 rtw_write32_clr(rtwdev, REG_RXSB, BIT(4)); in rtw88xxa_post_set_bw_mode()
1448 rtw_write32_mask(rtwdev, REG_ADC160, BIT(30), 1); in rtw88xxa_post_set_bw_mode()
1452 if (reg_837 & BIT(2)) { in rtw88xxa_post_set_bw_mode()
1455 if (hal->rf_type == RF_2T2R) in rtw88xxa_post_set_bw_mode()
1471 for (path = RF_PATH_A; path < rtwdev->hal.rf_path_num; path++) { in rtw88xxa_set_channel_rf()
1480 rtw_write_rf(rtwdev, path, RF_CFGCH, RF18_BW_MASK, 1); in rtw88xxa_set_channel_rf()
1511 if (rtwdev->chip->id == RTW_CHIP_TYPE_8812A) in rtw88xxa_set_channel()
1522 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw88xxa_query_phy_status()
1523 struct rtw_jaguar_phy_status_rpt *rpt; in rtw88xxa_query_phy_status() local
1526 const s8 min_rx_power = -120; in rtw88xxa_query_phy_status()
1529 rpt = (struct rtw_jaguar_phy_status_rpt *)phy_status; in rtw88xxa_query_phy_status()
1531 if (pkt_stat->rate <= DESC_RATE11M) { in rtw88xxa_query_phy_status()
1532 lna_idx = le32_get_bits(rpt->w1, RTW_JGRPHY_W1_AGC_RPT_LNA_IDX); in rtw88xxa_query_phy_status()
1533 vga_idx = le32_get_bits(rpt->w1, RTW_JGRPHY_W1_AGC_RPT_VGA_IDX); in rtw88xxa_query_phy_status()
1537 pkt_stat->rx_power[RF_PATH_A] = rx_pwr_db; in rtw88xxa_query_phy_status()
1538 pkt_stat->rssi = rtw_phy_rf_power_2_rssi(pkt_stat->rx_power, 1); in rtw88xxa_query_phy_status()
1539 dm_info->rssi[RF_PATH_A] = pkt_stat->rssi; in rtw88xxa_query_phy_status()
1540 pkt_stat->bw = RTW_CHANNEL_WIDTH_20; in rtw88xxa_query_phy_status()
1541 pkt_stat->signal_power = rx_pwr_db; in rtw88xxa_query_phy_status()
1543 gain[RF_PATH_A] = le32_get_bits(rpt->w0, RTW_JGRPHY_W0_GAIN_A); in rtw88xxa_query_phy_status()
1544 gain[RF_PATH_B] = le32_get_bits(rpt->w0, RTW_JGRPHY_W0_GAIN_B); in rtw88xxa_query_phy_status()
1546 for (i = RF_PATH_A; i < rtwdev->hal.rf_path_num; i++) { in rtw88xxa_query_phy_status()
1547 pkt_stat->rx_power[i] = gain[i] - 110; in rtw88xxa_query_phy_status()
1548 rssi = rtw_phy_rf_power_2_rssi(&pkt_stat->rx_power[i], 1); in rtw88xxa_query_phy_status()
1549 dm_info->rssi[i] = rssi; in rtw88xxa_query_phy_status()
1552 pkt_stat->rssi = rtw_phy_rf_power_2_rssi(pkt_stat->rx_power, in rtw88xxa_query_phy_status()
1553 rtwdev->hal.rf_path_num); in rtw88xxa_query_phy_status()
1555 power_a = pkt_stat->rx_power[RF_PATH_A]; in rtw88xxa_query_phy_status()
1556 power_b = pkt_stat->rx_power[RF_PATH_B]; in rtw88xxa_query_phy_status()
1557 if (rtwdev->hal.rf_path_num == 1) in rtw88xxa_query_phy_status()
1560 pkt_stat->signal_power = max3(power_a, power_b, min_rx_power); in rtw88xxa_query_phy_status()
1573 struct rtw_hal *hal = &rtwdev->hal; in rtw88xxa_set_tx_power_index_by_rate()
1581 pwr_index = hal->tx_pwr_tbl[path][rate]; in rtw88xxa_set_tx_power_index_by_rate()
1587 hal->rf_path_num == 1; in rtw88xxa_set_tx_power_index_by_rate()
1597 rate_idx -= 0x10; in rtw88xxa_set_tx_power_index_by_rate()
1616 power_level = rtwdev->hal.tx_pwr_tbl[path][DESC_RATEMCS7]; in rtw88xxa_tx_power_training()
1621 power_level -= 10; in rtw88xxa_tx_power_training()
1622 else if (i == 1) in rtw88xxa_tx_power_training()
1623 power_level -= 8; in rtw88xxa_tx_power_training()
1625 power_level -= 6; in rtw88xxa_tx_power_training()
1635 struct rtw_hal *hal = &rtwdev->hal; in rtw88xxa_set_tx_power_index()
1639 for (path = 0; path < hal->rf_path_num; path++) { in rtw88xxa_set_tx_power_index()
1641 if (hal->rf_path_num == 1 && in rtw88xxa_set_tx_power_index()
1646 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags) && in rtw88xxa_set_tx_power_index()
1650 if (hal->current_band_type == RTW_BAND_5G && in rtw88xxa_set_tx_power_index()
1658 rtw88xxa_tx_power_training(rtwdev, hal->current_band_width, in rtw88xxa_set_tx_power_index()
1659 hal->current_channel, path); in rtw88xxa_set_tx_power_index()
1666 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw88xxa_false_alarm_statistics()
1671 cck_enable = rtw_read32(rtwdev, REG_RXPSEL) & BIT(28); in rtw88xxa_false_alarm_statistics()
1675 dm_info->cck_fa_cnt = cck_fa_cnt; in rtw88xxa_false_alarm_statistics()
1676 dm_info->ofdm_fa_cnt = ofdm_fa_cnt; in rtw88xxa_false_alarm_statistics()
1677 dm_info->total_fa_cnt = ofdm_fa_cnt; in rtw88xxa_false_alarm_statistics()
1679 dm_info->total_fa_cnt += cck_fa_cnt; in rtw88xxa_false_alarm_statistics()
1682 dm_info->cck_ok_cnt = u32_get_bits(crc32_cnt, MASKLWORD); in rtw88xxa_false_alarm_statistics()
1683 dm_info->cck_err_cnt = u32_get_bits(crc32_cnt, MASKHWORD); in rtw88xxa_false_alarm_statistics()
1686 dm_info->ofdm_ok_cnt = u32_get_bits(crc32_cnt, MASKLWORD); in rtw88xxa_false_alarm_statistics()
1687 dm_info->ofdm_err_cnt = u32_get_bits(crc32_cnt, MASKHWORD); in rtw88xxa_false_alarm_statistics()
1690 dm_info->ht_ok_cnt = u32_get_bits(crc32_cnt, MASKLWORD); in rtw88xxa_false_alarm_statistics()
1691 dm_info->ht_err_cnt = u32_get_bits(crc32_cnt, MASKHWORD); in rtw88xxa_false_alarm_statistics()
1694 dm_info->vht_ok_cnt = u32_get_bits(crc32_cnt, MASKLWORD); in rtw88xxa_false_alarm_statistics()
1695 dm_info->vht_err_cnt = u32_get_bits(crc32_cnt, MASKHWORD); in rtw88xxa_false_alarm_statistics()
1698 dm_info->ofdm_cca_cnt = u32_get_bits(cca32_cnt, MASKHWORD); in rtw88xxa_false_alarm_statistics()
1699 dm_info->total_cca_cnt = dm_info->ofdm_cca_cnt; in rtw88xxa_false_alarm_statistics()
1702 dm_info->cck_cca_cnt = u32_get_bits(cca32_cnt, MASKLWORD); in rtw88xxa_false_alarm_statistics()
1703 dm_info->total_cca_cnt += dm_info->cck_cca_cnt; in rtw88xxa_false_alarm_statistics()
1706 rtw_write32_set(rtwdev, REG_FAS, BIT(17)); in rtw88xxa_false_alarm_statistics()
1707 rtw_write32_clr(rtwdev, REG_FAS, BIT(17)); in rtw88xxa_false_alarm_statistics()
1708 rtw_write32_clr(rtwdev, REG_CCK0_FAREPORT, BIT(15)); in rtw88xxa_false_alarm_statistics()
1709 rtw_write32_set(rtwdev, REG_CCK0_FAREPORT, BIT(15)); in rtw88xxa_false_alarm_statistics()
1710 rtw_write32_set(rtwdev, REG_CNTRST, BIT(0)); in rtw88xxa_false_alarm_statistics()
1711 rtw_write32_clr(rtwdev, REG_CNTRST, BIT(0)); in rtw88xxa_false_alarm_statistics()
1722 /* [31] = 0 --> Page C */ in rtw88xxa_iqk_backup_mac_bb()
1723 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw88xxa_iqk_backup_mac_bb()
1736 /* [31] = 0 --> Page C */ in rtw88xxa_iqk_backup_afe()
1737 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw88xxa_iqk_backup_afe()
1752 /* [31] = 0 --> Page C */ in rtw88xxa_iqk_restore_mac_bb()
1753 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw88xxa_iqk_restore_mac_bb()
1763 /* [31] = 0 --> Page C */ in rtw88xxa_iqk_configure_mac()
1764 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw88xxa_iqk_configure_mac()
1789 for (ii = i + 1; ii < average; ii++) { in rtw88xxa_iqk_finish()
1818 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw88xxa_pwrtrack_set()
1861 cck_swing_idx = dm_info->delta_power_index[path] + dm_info->default_cck_index; in rtw88xxa_pwrtrack_set()
1862 ofdm_swing_idx = dm_info->delta_power_index[path] + dm_info->default_ofdm_index; in rtw88xxa_pwrtrack_set()
1866 dm_info->txagc_remnant_cck = cck_swing_idx - pwr_tracking_limit; in rtw88xxa_pwrtrack_set()
1867 dm_info->txagc_remnant_ofdm[path] = ofdm_swing_idx - pwr_tracking_limit; in rtw88xxa_pwrtrack_set()
1872 dm_info->txagc_remnant_cck = cck_swing_idx; in rtw88xxa_pwrtrack_set()
1873 dm_info->txagc_remnant_ofdm[path] = ofdm_swing_idx; in rtw88xxa_pwrtrack_set()
1876 dm_info->txagc_remnant_cck = 0; in rtw88xxa_pwrtrack_set()
1877 dm_info->txagc_remnant_ofdm[path] = 0; in rtw88xxa_pwrtrack_set()
1888 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw88xxa_phy_pwrtrack()
1889 struct rtw_hal *hal = &rtwdev->hal; in rtw88xxa_phy_pwrtrack()
1897 if (rtwdev->efuse.thermal_meter[0] == 0xff) { in rtw88xxa_phy_pwrtrack()
1911 if (dm_info->pwr_trk_init_trigger) in rtw88xxa_phy_pwrtrack()
1912 dm_info->pwr_trk_init_trigger = false; in rtw88xxa_phy_pwrtrack()
1919 for (path = RF_PATH_A; path < hal->rf_path_num; path++) { in rtw88xxa_phy_pwrtrack()
1920 remnant_pre[path] = dm_info->txagc_remnant_ofdm[path]; in rtw88xxa_phy_pwrtrack()
1922 dm_info->delta_power_index[path] = in rtw88xxa_phy_pwrtrack()
1926 if (dm_info->delta_power_index[path] != in rtw88xxa_phy_pwrtrack()
1927 dm_info->delta_power_index_last[path]) { in rtw88xxa_phy_pwrtrack()
1928 dm_info->delta_power_index_last[path] = in rtw88xxa_phy_pwrtrack()
1929 dm_info->delta_power_index[path]; in rtw88xxa_phy_pwrtrack()
1931 rtw88xxa_pwrtrack_set(rtwdev, dm_info->tx_rate, path); in rtw88xxa_phy_pwrtrack()
1935 for (path = RF_PATH_A; path < hal->rf_path_num; path++) { in rtw88xxa_phy_pwrtrack()
1936 if (remnant_pre[path] != dm_info->txagc_remnant_ofdm[path]) { in rtw88xxa_phy_pwrtrack()
1938 hal->current_channel); in rtw88xxa_phy_pwrtrack()
1952 struct rtw_dm_info *dm_info = &rtwdev->dm_info; in rtw88xxa_phy_cck_pd_set()
1955 * like type 2/3/4. We need type 1 here. in rtw88xxa_phy_cck_pd_set()
1958 if (dm_info->min_rssi > 60) { in rtw88xxa_phy_cck_pd_set()
1960 } else if (dm_info->min_rssi > 35) { in rtw88xxa_phy_cck_pd_set()
1962 } else if (dm_info->min_rssi > 20) { in rtw88xxa_phy_cck_pd_set()
1963 if (dm_info->cck_fa_avg > 500) in rtw88xxa_phy_cck_pd_set()
1965 else if (dm_info->cck_fa_avg < 250) in rtw88xxa_phy_cck_pd_set()
1974 rtw_dbg(rtwdev, RTW_DBG_PHY, "lv: (%d) -> (%d)\n", in rtw88xxa_phy_cck_pd_set()
1975 dm_info->cck_pd_lv[RTW_CHANNEL_WIDTH_20][RF_PATH_A], new_lvl); in rtw88xxa_phy_cck_pd_set()
1977 if (dm_info->cck_pd_lv[RTW_CHANNEL_WIDTH_20][RF_PATH_A] == new_lvl) in rtw88xxa_phy_cck_pd_set()
1980 dm_info->cck_fa_avg = CCK_FA_AVG_RESET; in rtw88xxa_phy_cck_pd_set()
1981 dm_info->cck_pd_lv[RTW_CHANNEL_WIDTH_20][RF_PATH_A] = new_lvl; in rtw88xxa_phy_cck_pd_set()