Lines Matching +full:0 +full:xf0ffffff
75 rtw_write8_set(rtwdev, REG_LIFETIME_EN, 0xf); in rtw_coex_limited_tx()
76 rtw_write16(rtwdev, REG_RETRY_LIMIT, 0x0808); in rtw_coex_limited_tx()
79 rtw_write32(rtwdev, REG_DARFRC, 0x1000000); in rtw_coex_limited_tx()
80 rtw_write32(rtwdev, REG_DARFRCH, 0x4030201); in rtw_coex_limited_tx()
83 rtw_write8_clr(rtwdev, REG_LIFETIME_EN, 0xf); in rtw_coex_limited_tx()
91 rtw_write8(rtwdev, REG_AMPDU_MAX_TIME_V1, 0x20); in rtw_coex_limited_tx()
132 COEX_RSSI_HIGH(coex_dm->bt_rssi_state[0])) in rtw_coex_freerun_check()
136 bt_rssi = coex_dm->bt_rssi_state[0]; in rtw_coex_freerun_check()
152 u8 para[6] = {0}; in rtw_coex_wl_slot_extend()
154 para[0] = COEX_H2C69_WL_LEAKAP; in rtw_coex_wl_slot_extend()
160 coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0; in rtw_coex_wl_slot_extend()
163 rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]); in rtw_coex_wl_slot_extend()
177 "[BTCoex], set h2c 0x69 opcode 12 to turn off 5ms WL slot extend!!\n"); in rtw_coex_wl_ccklock_action()
187 coex_stat->cnt_wl[COEX_CNT_WL_5MS_NOEXTEND] = 0; in rtw_coex_wl_ccklock_action()
195 "[BTCoex], set h2c 0x69 opcode 12 to turn off 5ms WL slot extend!!\n"); in rtw_coex_wl_ccklock_action()
200 "[BTCoex], set h2c 0x69 opcode 12 to turn on 5ms WL slot extend!!\n"); in rtw_coex_wl_ccklock_action()
275 coex_stat->cnt_wl[COEX_CNT_WL_NOISY0] = 0; in rtw_coex_wl_noisy_detect()
276 coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] = 0; in rtw_coex_wl_noisy_detect()
283 coex_stat->cnt_wl[COEX_CNT_WL_NOISY1] = 0; in rtw_coex_wl_noisy_detect()
284 coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] = 0; in rtw_coex_wl_noisy_detect()
291 coex_stat->cnt_wl[COEX_CNT_WL_NOISY0] = 0; in rtw_coex_wl_noisy_detect()
292 coex_stat->cnt_wl[COEX_CNT_WL_NOISY2] = 0; in rtw_coex_wl_noisy_detect()
301 coex_stat->wl_noisy_level = 0; in rtw_coex_wl_noisy_detect()
312 u8 para[2] = {0}; in rtw_coex_tdma_timer_base()
321 para[0] = COEX_H2C69_TDMA_SLOT; in rtw_coex_tdma_timer_base()
328 } else if (tbtt_interval < 80 && tbtt_interval > 0) { in rtw_coex_tdma_timer_base()
330 if (100 % tbtt_interval != 0) in rtw_coex_tdma_timer_base()
345 rtw_fw_bt_wifi_control(rtwdev, para[0], ¶[1]); in rtw_coex_tdma_timer_base()
347 rtw_dbg(rtwdev, RTW_DBG_COEX, "[BTCoex], %s(): h2c_0x69 = 0x%x\n", in rtw_coex_tdma_timer_base()
371 u16 val = 0x2; in rtw_coex_write_scbd()
406 return 0; in rtw_coex_read_scbd()
417 u8 cnt = 0; in rtw_coex_check_rfk()
422 coex_stat->bt_iqk_state != 0xff) { in rtw_coex_check_rfk()
445 coex_stat->bt_iqk_state = 0xff; in rtw_coex_check_rfk()
504 if (coex_stat->hi_pri_tx == 0 && coex_stat->hi_pri_rx == 0 && in rtw_coex_monitor_bt_enable()
505 coex_stat->lo_pri_tx == 0 && coex_stat->lo_pri_rx == 0) in rtw_coex_monitor_bt_enable()
508 if (coex_stat->hi_pri_tx == 0xffff && coex_stat->hi_pri_rx == 0xffff && in rtw_coex_monitor_bt_enable()
509 coex_stat->lo_pri_tx == 0xffff && coex_stat->lo_pri_rx == 0xffff) in rtw_coex_monitor_bt_enable()
513 coex_stat->bt_disable_cnt = 0; in rtw_coex_monitor_bt_enable()
528 coex_stat->bt_ble_scan_type = 0; in rtw_coex_monitor_bt_enable()
529 coex_dm->cur_bt_lna_lvl = 0; in rtw_coex_monitor_bt_enable()
584 for (i = 0; i < 4; i++) { in rtw_coex_update_wl_link_info()
639 if (payload[0] != COEX_RESP_ACK_BY_WL_FW) { in rtw_coex_info_response()
676 struct rtw_coex_info_req req = {0}; in rtw_coex_get_bt_scan_type()
694 struct rtw_coex_info_req req = {0}; in rtw_coex_set_lna_constrain_level()
736 for (i = 0; i < COEX_RSSI_STEP; i++) { in rtw_coex_update_bt_link_info()
746 coex_stat->cnt_bt[COEX_CNT_BT_INFOUPDATE] % 3 == 0) { in rtw_coex_update_bt_link_info()
751 if ((coex_stat->bt_ble_scan_type & 0x1) == 0x1) in rtw_coex_update_bt_link_info()
758 coex_stat->bt_profile_num = 0; in rtw_coex_update_bt_link_info()
830 u8 link = 0; in rtw_coex_update_wl_ch_info()
831 u8 center_chan = 0; in rtw_coex_update_wl_ch_info()
840 if (center_chan == 0 || in rtw_coex_update_wl_ch_info()
843 link = 0; in rtw_coex_update_wl_ch_info()
844 center_chan = 0; in rtw_coex_update_wl_ch_info()
845 bw = 0; in rtw_coex_update_wl_ch_info()
847 link = 0x1; in rtw_coex_update_wl_ch_info()
854 for (i = 0; i < chip->afh_5g_num; i++) { in rtw_coex_update_wl_ch_info()
856 link = 0x3; in rtw_coex_update_wl_ch_info()
864 coex_dm->wl_ch_info[0] = link; in rtw_coex_update_wl_ch_info()
870 "[BTCoex], %s: para[0:2] = 0x%x 0x%x 0x%x\n", __func__, link, in rtw_coex_update_wl_ch_info()
913 u8 offset = 0; in rtw_coex_set_rf_para()
930 return 0; in rtw_coex_read_indirect_reg()
974 rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0xc000, state); in rtw_coex_set_gnt_bt()
975 rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0x0c00, state); in rtw_coex_set_gnt_bt()
983 rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0x3000, state); in rtw_coex_set_gnt_wl()
984 rtw_coex_write_indirect_reg(rtwdev, LTE_COEX_CTRL, 0x0300, state); in rtw_coex_set_gnt_wl()
1009 u8 h2c_para[6] = {0}; in rtw_btc_wltoggle_table_a()
1010 u32 table_wl = 0x5a5a5a5a; in rtw_btc_wltoggle_table_a()
1012 h2c_para[0] = COEX_H2C69_TOGGLE_TABLE_A; in rtw_btc_wltoggle_table_a()
1014 h2c_para[1] = 0x1; in rtw_btc_wltoggle_table_a()
1025 h2c_para[2] = (u8)u32_get_bits(table_wl, GENMASK(7, 0)); in rtw_btc_wltoggle_table_a()
1030 rtw_fw_bt_wifi_control(rtwdev, h2c_para[0], &h2c_para[1]); in rtw_btc_wltoggle_table_a()
1034 __func__, h2c_para[0], h2c_para[1], h2c_para[2], in rtw_btc_wltoggle_table_a()
1038 #define COEX_WL_SLOT_TOGLLE 0x5a5a5aaa
1044 u8 cur_h2c_para[6] = {0}; in rtw_btc_wltoggle_table_b()
1047 cur_h2c_para[0] = COEX_H2C69_TOGGLE_TABLE_B; in rtw_btc_wltoggle_table_b()
1049 cur_h2c_para[2] = (u8)u32_get_bits(table, GENMASK(7, 0)); in rtw_btc_wltoggle_table_b()
1056 for (i = 0; i <= 5; i++) in rtw_btc_wltoggle_table_b()
1059 rtw_fw_bt_wifi_control(rtwdev, cur_h2c_para[0], &cur_h2c_para[1]); in rtw_btc_wltoggle_table_b()
1063 __func__, cur_h2c_para[0], cur_h2c_para[1], cur_h2c_para[2], in rtw_btc_wltoggle_table_b()
1070 #define DEF_BRK_TABLE_VAL 0xf0ffffff in rtw_coex_set_table()
1085 "[BTCoex], %s(): 0x6c0 = %x, 0x6c4 = %x\n", __func__, table0, in rtw_coex_set_table()
1132 u8 lps_mode = 0x0; in rtw_coex_power_save_state()
1147 rtw_fw_coex_tdma_type(rtwdev, 0, 0, 0, 0, 0); in rtw_coex_power_save_state()
1179 rtw_coex_power_save_state(rtwdev, ps_type, 0x0, 0x0); in rtw_coex_set_tdma()
1183 "[BTCoex], %s(): Force LPS (byte1 = 0x%x)\n", __func__, in rtw_coex_set_tdma()
1190 rtw_coex_power_save_state(rtwdev, ps_type, 0x50, 0x4); in rtw_coex_set_tdma()
1193 "[BTCoex], %s(): native power save (byte1 = 0x%x)\n", in rtw_coex_set_tdma()
1197 rtw_coex_power_save_state(rtwdev, ps_type, 0x0, 0x0); in rtw_coex_set_tdma()
1200 coex_dm->ps_tdma_para[0] = byte1; in rtw_coex_set_tdma()
1233 type = (u8)(tcase & 0xff); in rtw_coex_tdma()
1235 turn_on = (type == 0 || type == 100) ? false : true; in rtw_coex_tdma()
1262 chip->tdma_sant[type].para[0], in rtw_coex_tdma()
1271 chip->tdma_nsant[n].para[0], in rtw_coex_tdma()
1301 "[BTCoex], coex_stat->bt_disabled = 0x%x\n", in rtw_coex_set_ant_path()
1488 u8 profile_map = 0; in rtw_coex_algorithm()
1530 if (coex_stat->bt_hid_pair_num > 0) in rtw_coex_algorithm()
1557 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_coex_all_off()
1562 tdma_case = 0; in rtw_coex_action_coex_all_off()
1580 u8 level = 0; in rtw_coex_action_freerun()
1597 if (COEX_RSSI_HIGH(coex_dm->wl_rssi_state[0])) in rtw_coex_action_freerun()
1627 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_rf4ce()
1652 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_whql_test()
1657 tdma_case = 0; in rtw_coex_action_bt_whql_test()
1675 u32 slot_type = 0; in rtw_coex_action_bt_relink()
1680 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_relink()
1694 tdma_case = 0; in rtw_coex_action_bt_relink()
1716 u8 table_case = 0xff, tdma_case = 0xff; in rtw_coex_action_bt_idle()
1719 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_idle()
1726 table_case = 0; in rtw_coex_action_bt_idle()
1727 tdma_case = 0; in rtw_coex_action_bt_idle()
1734 if (table_case != 0xff && tdma_case != 0xff) { in rtw_coex_action_bt_idle()
1762 } else if ((coex_stat->bt_ble_scan_type & 0x2) && in rtw_coex_action_bt_idle()
1785 u32 slot_type = 0; in rtw_coex_action_bt_inquiry()
1789 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_inquiry()
1802 if (coex_stat->bt_profile_num > 0) in rtw_coex_action_bt_inquiry()
1813 if (coex_stat->bt_profile_num == 0) { in rtw_coex_action_bt_inquiry()
1835 tdma_case = 0; in rtw_coex_action_bt_inquiry()
1844 if (coex_stat->bt_profile_num > 0) in rtw_coex_action_bt_inquiry()
1896 table_case = 0; in rtw_coex_action_bt_game_hid()
1902 tdma_case = 0; in rtw_coex_action_bt_game_hid()
1918 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_game_hid()
1935 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_hfp()
1963 u32 slot_type = 0; in rtw_coex_action_bt_hid()
1968 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_hid()
2047 u32 slot_type = 0; in rtw_coex_action_bt_a2dp()
2052 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dp()
2058 if (coex_stat->wl_gl_busy && coex_stat->wl_noisy_level == 0) in rtw_coex_action_bt_a2dp()
2093 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dpsink()
2098 tdma_case = 0; in rtw_coex_action_bt_a2dpsink()
2130 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_pan()
2134 if (coex_stat->wl_gl_busy && coex_stat->wl_noisy_level == 0) in rtw_coex_action_bt_pan()
2164 u8 table_case, tdma_case, interval = 0; in rtw_coex_action_bt_a2dp_hid()
2165 u32 slot_type = 0; in rtw_coex_action_bt_a2dp_hid()
2172 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dp_hid()
2225 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dp_pan()
2229 coex_stat->wl_noisy_level == 0) in rtw_coex_action_bt_a2dp_pan()
2248 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dp_pan()
2264 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_pan_hid()
2298 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_bt_a2dp_pan_hid()
2333 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_wl_under5g()
2342 table_case = 0; in rtw_coex_action_wl_under5g()
2343 tdma_case = 0; in rtw_coex_action_wl_under5g()
2362 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_wl_only()
2367 tdma_case = 0; in rtw_coex_action_wl_only()
2396 tdma_case = 0; in rtw_coex_action_wl_native_lps()
2410 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_wl_native_lps()
2424 u32 slot_type = 0; in rtw_coex_action_wl_linkscan()
2428 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_wl_linkscan()
2465 rtw_coex_set_rf_para(rtwdev, chip->wl_rf_para_rx[0]); in rtw_coex_action_wl_not_connected()
2470 tdma_case = 0; in rtw_coex_action_wl_not_connected()
2674 memset(coex_dm, 0, sizeof(*coex_dm)); in rtw_coex_init_coex_var()
2675 memset(coex_stat, 0, sizeof(*coex_stat)); in rtw_coex_init_coex_var()
2677 for (i = 0; i < COEX_CNT_WL_MAX; i++) in rtw_coex_init_coex_var()
2678 coex_stat->cnt_wl[i] = 0; in rtw_coex_init_coex_var()
2680 for (i = 0; i < COEX_CNT_BT_MAX; i++) in rtw_coex_init_coex_var()
2681 coex_stat->cnt_bt[i] = 0; in rtw_coex_init_coex_var()
2683 for (i = 0; i < ARRAY_SIZE(coex_dm->bt_rssi_state); i++) in rtw_coex_init_coex_var()
2686 for (i = 0; i < ARRAY_SIZE(coex_dm->wl_rssi_state); i++) in rtw_coex_init_coex_var()
2703 coex_stat->kt_ver = u8_get_bits(rtw_read8(rtwdev, 0xf1), GENMASK(7, 4)); in __rtw_coex_init_hw_config()
2745 rtw_coex_tdma(rtwdev, true, 0); in __rtw_coex_init_hw_config()
2759 /* enable BB, we can write 0x948 */ in rtw_coex_power_on_setting()
2771 rtw_write8(rtwdev, 0xff1a, 0x0); in rtw_coex_power_on_setting()
3004 rtw_coex_set_wl_pri_mask(rtwdev, COEX_WLPRI_RX_CCK, 0); in rtw_coex_media_status_notify()
3018 u8 i, rsp_source = 0, type; in rtw_coex_bt_info_notify()
3021 rsp_source = buf[0] & 0xf; in rtw_coex_bt_info_notify()
3028 if (coex_stat->bt_iqk_state == 0) in rtw_coex_bt_info_notify()
3034 "[BTCoex], BT IQK by bt_info, data0 = 0x%02x\n", in rtw_coex_bt_info_notify()
3042 "[BTCoex], BT Scoreboard change notify by WL FW c2h, 0xaa = 0x%02x, 0xab = 0x%02x\n", in rtw_coex_bt_info_notify()
3055 "[BTCoex], H2C 0x60 content replied by WL FW: H2C_0x60 = [%02x %02x %02x %02x %02x]\n", in rtw_coex_bt_info_notify()
3093 buf[0], length, buf[1], buf[2], buf[3], buf[4], buf[5], buf[6]); in rtw_coex_bt_info_notify()
3095 for (i = 0; i < COEX_BTINFO_LENGTH; i++) in rtw_coex_bt_info_notify()
3117 /* 0xff means BT is under WHCK test */ in rtw_coex_bt_info_notify()
3118 coex_stat->bt_whck_test = (coex_stat->bt_info_lb2 == 0xff); in rtw_coex_bt_info_notify()
3136 if (coex_stat->bt_info_hb1 & BIT(0)) { in rtw_coex_bt_info_notify()
3143 } else if (coex_stat->bt_info_hb1 & BIT(0)) { in rtw_coex_bt_info_notify()
3152 if (coex_stat->bt_info_hb1 & BIT(0)) { in rtw_coex_bt_info_notify()
3168 coex_stat->cnt_bt[COEX_CNT_BT_RETRY] = coex_stat->bt_info_lb3 & 0xf; in rtw_coex_bt_info_notify()
3190 coex_stat->bt_rssi = 0; in rtw_coex_bt_info_notify()
3221 /* for multi_link = 0 but bt pkt remain exist */ in rtw_coex_bt_info_notify()
3251 coex_stat->bt_opp_exist = ((coex_stat->bt_info_hb2 & BIT(0)) == BIT(0)); in rtw_coex_bt_info_notify()
3257 coex_stat->bt_hid_slot = (coex_stat->bt_info_hb2 & 0x30) >> 4; in rtw_coex_bt_info_notify()
3258 coex_stat->bt_hid_pair_num = (coex_stat->bt_info_hb2 & 0xc0) >> 6; in rtw_coex_bt_info_notify()
3259 if (coex_stat->bt_hid_pair_num > 0 && coex_stat->bt_hid_slot >= 2) in rtw_coex_bt_info_notify()
3261 else if (coex_stat->bt_hid_pair_num == 0 || coex_stat->bt_hid_slot == 1) in rtw_coex_bt_info_notify()
3264 if ((coex_stat->bt_info_lb2 & 0x49) == 0x49) in rtw_coex_bt_info_notify()
3265 coex_stat->bt_a2dp_bitpool = (coex_stat->bt_info_hb3 & 0x7f); in rtw_coex_bt_info_notify()
3267 coex_stat->bt_a2dp_bitpool = 0; in rtw_coex_bt_info_notify()
3275 #define COEX_BT_HIDINFO_MTK 0x46
3276 static const u8 coex_bt_hidinfo_ps[] = {0x57, 0x69, 0x72};
3277 static const u8 coex_bt_hidinfo_xb[] = {0x58, 0x62, 0x6f};
3287 u8 sub_id = buf[2], gamehid_cnt = 0, handle, i; in rtw_coex_bt_hid_info_notify()
3295 "[BTCoex], HID info notify, sub_id = 0x%x\n", sub_id); in rtw_coex_bt_hid_info_notify()
3304 memset(&coex_stat->hid_info, 0, sizeof(coex_stat->hid_info)); in rtw_coex_bt_hid_info_notify()
3305 for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { in rtw_coex_bt_hid_info_notify()
3308 hl->handle[i] != 0) in rtw_coex_bt_hid_info_notify()
3315 for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { in rtw_coex_bt_hid_info_notify()
3327 for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { in rtw_coex_bt_hid_info_notify()
3332 handle == 0 || handle >= COEX_BT_BLE_HANDLE_THRS) { in rtw_coex_bt_hid_info_notify()
3340 COEX_BT_HIDINFO_NAME)) == 0) in rtw_coex_bt_hid_info_notify()
3344 COEX_BT_HIDINFO_NAME)) == 0) in rtw_coex_bt_hid_info_notify()
3355 if (gamehid_cnt > 0) in rtw_coex_bt_hid_info_notify()
3388 rtw_fw_coex_query_hid_info(rtwdev, COEX_BT_HIDINFO_LIST, 0); in rtw_coex_query_bt_hid_list()
3390 for (i = 0; i < COEX_BT_HIDINFO_HANDLE_NUM; i++) { in rtw_coex_query_bt_hid_list()
3394 if (handle == 0 || handle == COEX_BT_HIDINFO_NOTCON || in rtw_coex_query_bt_hid_list()
3417 if (buf[0] != 0x08) in rtw_coex_wl_fwdbginfo_notify()
3595 u8 ans = 0xFF; in rtw_coex_get_table_index()
3606 for (i = 0; i < n; i++) { in rtw_coex_get_table_index()
3631 u8 ans = 0xFF; in rtw_coex_get_tdma_index()
3642 for (i = 0; i < n; i++) { in rtw_coex_get_tdma_index()
3644 for (j = 0; j < 5; j++) { in rtw_coex_get_tdma_index()
3670 const char *sep = n == 0 ? "" : "/ "; in rtw_coex_addr_info()
3674 if (INFO_SIZE - n <= 0) in rtw_coex_addr_info()
3675 return 0; in rtw_coex_addr_info()
3693 return 0; in rtw_coex_addr_info()
3699 if (ffs == 0 && fls == max_fls) in rtw_coex_addr_info()
3714 const char *sep = n == 0 ? "" : "/ "; in rtw_coex_val_info()
3717 if (INFO_SIZE - n <= 0) in rtw_coex_val_info()
3718 return 0; in rtw_coex_val_info()
3737 return 0; in rtw_coex_val_info()
3750 int n_addr = 0; in rtw_coex_set_coexinfo_hw()
3752 int n_val = 0; in rtw_coex_set_coexinfo_hw()
3755 for (i = 0; i < chip->coex_info_hw_regs_num; i++) { in rtw_coex_set_coexinfo_hw()
3763 n_addr = 0; in rtw_coex_set_coexinfo_hw()
3764 n_val = 0; in rtw_coex_set_coexinfo_hw()
3768 if (n_addr != 0 && n_val != 0) in rtw_coex_set_coexinfo_hw()
3775 struct rtw_coex_info_req req = {0}; in rtw_coex_get_bt_reg()
3783 req.para2 = le16_get_bits(le_addr, GENMASK(7, 0)); in rtw_coex_get_bt_reg()
3787 *val = 0xeaea; in rtw_coex_get_bt_reg()
3801 struct rtw_coex_info_req req = {0}; in rtw_coex_get_bt_patch_version()
3820 struct rtw_coex_info_req req = {0}; in rtw_coex_get_bt_supported_version()
3839 struct rtw_coex_info_req req = {0}; in rtw_coex_get_bt_supported_feature()
3934 u32 lte_coex = 0, bt_coex = 0; in rtw_coex_display_coex_info()
3945 sys_lte = rtw_read8(rtwdev, 0x73); in rtw_coex_display_coex_info()
3947 lte_coex = rtw_coex_read_indirect_reg(rtwdev, 0x38); in rtw_coex_display_coex_info()
3948 bt_coex = rtw_coex_read_indirect_reg(rtwdev, 0x54); in rtw_coex_display_coex_info()
3959 rtw_coex_get_bt_reg(rtwdev, 3, 0xae, &coex_stat->bt_reg_vendor_ae); in rtw_coex_display_coex_info()
3960 rtw_coex_get_bt_reg(rtwdev, 3, 0xac, &coex_stat->bt_reg_vendor_ac); in rtw_coex_display_coex_info()
3962 if (coex_stat->patch_ver != 0) in rtw_coex_display_coex_info()
3988 seq_printf(m, "%-40s = %08x/ 0x%02x/ 0x%08x %s\n", in rtw_coex_display_coex_info()
4000 seq_printf(m, "%-40s = %u.%u/ 0x%x/ 0x%x/ %c\n", in rtw_coex_display_coex_info()
4007 coex_dm->wl_ch_info[0], coex_dm->wl_ch_info[1], in rtw_coex_display_coex_info()
4035 seq_printf(m, "%-40s = %u/ %u/ %u/ 0x%08x\n", in rtw_coex_display_coex_info()
4047 seq_printf(m, "%-40s = 0x%04x/ 0x%04x/ 0x%04x/ 0x%04x\n", in rtw_coex_display_coex_info()
4048 "0xae/ 0xac/ score board (W->B)/ (B->W)", in rtw_coex_display_coex_info()
4056 for (i = 0; i < COEX_BTINFO_SRC_BT_IQK; i++) in rtw_coex_display_coex_info()
4088 &coex_dm->fw_tdma_para[0])); in rtw_coex_display_coex_info()
4102 seq_printf(m, "%-40s = %d(%d)/ 0x%08x/ 0x%08x/ 0x%08x\n", in rtw_coex_display_coex_info()
4103 "Table/ 0x6c0/ 0x6c4/ 0x6c8", in rtw_coex_display_coex_info()
4107 seq_printf(m, "%-40s = 0x%08x/ 0x%08x/ %d/ reason (%s)\n", in rtw_coex_display_coex_info()
4108 "0x778/ 0x6cc/ Run Count/ Reason", in rtw_coex_display_coex_info()