Lines Matching +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2009-2014 Realtek Corporation.*/
106 /*-----------------------------------------------------
110 *-----------------------------------------------------
121 /*-----------------------------------------------------
125 *-----------------------------------------------------
137 /*-----------------------------------------------------
141 *-----------------------------------------------------
206 *-----------------------------------------------------
210 *-----------------------------------------------------
256 /*-----------------------------------------------------
260 *-----------------------------------------------------
300 /*-----------------------------------------------------
304 *-----------------------------------------------------
382 #define CMDEEPROM_EN BIT(5)
383 #define CMDEEPROM_SEL BIT(4)
384 #define CMD9346CR_9356SEL BIT(4)
389 #define GPIOSEL_ENBT BIT(5)
407 #define RRSR_1M BIT(0)
408 #define RRSR_2M BIT(1)
409 #define RRSR_5_5M BIT(2)
410 #define RRSR_11M BIT(3)
411 #define RRSR_6M BIT(4)
412 #define RRSR_9M BIT(5)
413 #define RRSR_12M BIT(6)
414 #define RRSR_18M BIT(7)
415 #define RRSR_24M BIT(8)
416 #define RRSR_36M BIT(9)
417 #define RRSR_48M BIT(10)
418 #define RRSR_54M BIT(11)
419 #define RRSR_MCS0 BIT(12)
420 #define RRSR_MCS1 BIT(13)
421 #define RRSR_MCS2 BIT(14)
422 #define RRSR_MCS3 BIT(15)
423 #define RRSR_MCS4 BIT(16)
424 #define RRSR_MCS5 BIT(17)
425 #define RRSR_MCS6 BIT(18)
426 #define RRSR_MCS7 BIT(19)
427 #define BRSR_ACKSHORTPMB BIT(23)
458 #define RATE_1M BIT(0)
459 #define RATE_2M BIT(1)
460 #define RATE_5_5M BIT(2)
461 #define RATE_11M BIT(3)
462 #define RATE_6M BIT(4)
463 #define RATE_9M BIT(5)
464 #define RATE_12M BIT(6)
465 #define RATE_18M BIT(7)
466 #define RATE_24M BIT(8)
467 #define RATE_36M BIT(9)
468 #define RATE_48M BIT(10)
469 #define RATE_54M BIT(11)
470 #define RATE_MCS0 BIT(12)
471 #define RATE_MCS1 BIT(13)
472 #define RATE_MCS2 BIT(14)
473 #define RATE_MCS3 BIT(15)
474 #define RATE_MCS4 BIT(16)
475 #define RATE_MCS5 BIT(17)
476 #define RATE_MCS6 BIT(18)
477 #define RATE_MCS7 BIT(19)
478 #define RATE_MCS8 BIT(20)
479 #define RATE_MCS9 BIT(21)
480 #define RATE_MCS10 BIT(22)
481 #define RATE_MCS11 BIT(23)
482 #define RATE_MCS12 BIT(24)
483 #define RATE_MCS13 BIT(25)
484 #define RATE_MCS14 BIT(26)
485 #define RATE_MCS15 BIT(27)
497 #define BW_OPMODE_20MHZ BIT(2)
498 #define BW_OPMODE_5G BIT(1)
499 #define CAM_VALID BIT(15)
501 #define CAM_USEDK BIT(5)
512 #define CAM_WRITE BIT(16)
514 #define CAM_POLLINIG BIT(31)
524 /* IMR DW0(0x0060-0063) Bit 0-31 */
525 #define IMR_TIMER2 BIT(31)
526 #define IMR_TIMER1 BIT(30)
527 #define IMR_PSTIMEOUT BIT(29)
528 #define IMR_GTINT4 BIT(28)
529 #define IMR_GTINT3 BIT(27)
530 #define IMR_TBDER BIT(26)
531 #define IMR_TBDOK BIT(25)
532 #define IMR_TSF_BIT32_TOGGLE BIT(24)
533 #define IMR_BCNDMAINT0 BIT(20)
534 #define IMR_BCNDOK0 BIT(16)
535 #define IMR_BCNDMAINT_E BIT(14)
536 #define IMR_ATIMEND BIT(12)
537 #define IMR_HISR1_IND_INT BIT(11)
538 #define IMR_C2HCMD BIT(10)
539 #define IMR_CPWM2 BIT(9)
540 #define IMR_CPWM BIT(8)
541 #define IMR_HIGHDOK BIT(7)
542 #define IMR_MGNTDOK BIT(6)
543 #define IMR_BKDOK BIT(5)
544 #define IMR_BEDOK BIT(4)
545 #define IMR_VIDOK BIT(3)
546 #define IMR_VODOK BIT(2)
547 #define IMR_RDU BIT(1)
548 #define IMR_ROK BIT(0)
550 /* IMR DW1(0x00B4-00B7) Bit 0-31 */
551 #define IMR_MCUERR BIT(28)
552 #define IMR_BCNDMAINT7 BIT(27)
553 #define IMR_BCNDMAINT6 BIT(26)
554 #define IMR_BCNDMAINT5 BIT(25)
555 #define IMR_BCNDMAINT4 BIT(24)
556 #define IMR_BCNDMAINT3 BIT(23)
557 #define IMR_BCNDMAINT2 BIT(22)
558 #define IMR_BCNDMAINT1 BIT(21)
559 #define IMR_BCNDOK7 BIT(20)
560 #define IMR_BCNDOK6 BIT(19)
561 #define IMR_BCNDOK5 BIT(18)
562 #define IMR_BCNDOK4 BIT(17)
563 #define IMR_BCNDOK3 BIT(16)
564 #define IMR_BCNDOK2 BIT(15)
565 #define IMR_BCNDOK1 BIT(14)
566 #define IMR_ATIMEND_E BIT(13)
567 #define IMR_TXERR BIT(11)
568 #define IMR_RXERR BIT(10)
569 #define IMR_TXFOVW BIT(9)
570 #define IMR_RXFOVW BIT(8)
657 #define STOPBECON BIT(6)
658 #define STOPHIGHT BIT(5)
659 #define STOPMGT BIT(4)
660 #define STOPVO BIT(3)
661 #define STOPVI BIT(2)
662 #define STOPBE BIT(1)
663 #define STOPBK BIT(0)
665 #define RCR_APPFCS BIT(31)
666 #define RCR_APP_MIC BIT(30)
667 #define RCR_APP_ICV BIT(29)
668 #define RCR_APP_PHYST_RXFF BIT(28)
669 #define RCR_APP_BA_SSN BIT(27)
670 #define RCR_ENMBID BIT(24)
671 #define RCR_LSIGEN BIT(23)
672 #define RCR_MFBEN BIT(22)
673 #define RCR_HTC_LOC_CTRL BIT(14)
674 #define RCR_AMF BIT(13)
675 #define RCR_ACF BIT(12)
676 #define RCR_ADF BIT(11)
677 #define RCR_AICV BIT(9)
678 #define RCR_ACRC32 BIT(8)
679 #define RCR_CBSSID_BCN BIT(7)
680 #define RCR_CBSSID_DATA BIT(6)
682 #define RCR_APWRMGT BIT(5)
683 #define RCR_ADD3 BIT(4)
684 #define RCR_AB BIT(3)
685 #define RCR_AM BIT(2)
686 #define RCR_APM BIT(1)
687 #define RCR_AAP BIT(0)
709 #define SW18_FPWM BIT(3)
711 #define ISO_MD2PP BIT(0)
712 #define ISO_UA2USB BIT(1)
713 #define ISO_UD2CORE BIT(2)
714 #define ISO_PA2PCIE BIT(3)
715 #define ISO_PD2CORE BIT(4)
716 #define ISO_IP2MAC BIT(5)
717 #define ISO_DIOP BIT(6)
718 #define ISO_DIOE BIT(7)
719 #define ISO_EB2CORE BIT(8)
720 #define ISO_DIOR BIT(9)
722 #define PWC_EV25V BIT(14)
723 #define PWC_EV12V BIT(15)
725 #define FEN_BBRSTB BIT(0)
726 #define FEN_BB_GLB_RSTN BIT(1)
727 #define FEN_USBA BIT(2)
728 #define FEN_UPLL BIT(3)
729 #define FEN_USBD BIT(4)
730 #define FEN_DIO_PCIE BIT(5)
731 #define FEN_PCIEA BIT(6)
732 #define FEN_PPLL BIT(7)
733 #define FEN_PCIED BIT(8)
734 #define FEN_DIOE BIT(9)
735 #define FEN_CPUEN BIT(10)
736 #define FEN_DCORE BIT(11)
737 #define FEN_ELDR BIT(12)
738 #define FEN_DIO_RF BIT(13)
739 #define FEN_HWPDN BIT(14)
740 #define FEN_MREGEN BIT(15)
742 #define PFM_LDALL BIT(0)
743 #define PFM_ALDN BIT(1)
744 #define PFM_LDKP BIT(2)
745 #define PFM_WOWL BIT(3)
746 #define ENPDN BIT(4)
747 #define PDN_PL BIT(5)
748 #define APFM_ONMAC BIT(8)
749 #define APFM_OFF BIT(9)
750 #define APFM_RSM BIT(10)
751 #define AFSM_HSUS BIT(11)
752 #define AFSM_PCIE BIT(12)
753 #define APDM_MAC BIT(13)
754 #define APDM_HOST BIT(14)
755 #define APDM_HPDN BIT(15)
756 #define RDY_MACON BIT(16)
757 #define SUS_HOST BIT(17)
758 #define ROP_ALD BIT(20)
759 #define ROP_PWR BIT(21)
760 #define ROP_SPS BIT(22)
761 #define SOP_MRST BIT(25)
762 #define SOP_FUSE BIT(26)
763 #define SOP_ABG BIT(27)
764 #define SOP_AMB BIT(28)
765 #define SOP_RCK BIT(29)
766 #define SOP_A8M BIT(30)
767 #define XOP_BTCK BIT(31)
769 #define ANAD16V_EN BIT(0)
770 #define ANA8M BIT(1)
771 #define MACSLP BIT(4)
772 #define LOADER_CLK_EN BIT(5)
773 #define _80M_SSC_DIS BIT(7)
774 #define _80M_SSC_EN_HO BIT(8)
775 #define PHY_SSC_RSTB BIT(9)
776 #define SEC_CLK_EN BIT(10)
777 #define MAC_CLK_EN BIT(11)
778 #define SYS_CLK_EN BIT(12)
779 #define RING_CLK_EN BIT(13)
781 #define BOOT_FROM_EEPROM BIT(4)
782 #define EEPROM_EN BIT(5)
784 #define AFE_BGEN BIT(0)
785 #define AFE_MBEN BIT(1)
786 #define MAC_ID_EN BIT(7)
788 #define WLOCK_ALL BIT(0)
789 #define WLOCK_00 BIT(1)
790 #define WLOCK_04 BIT(2)
791 #define WLOCK_08 BIT(3)
792 #define WLOCK_40 BIT(4)
793 #define R_DIS_PRST_0 BIT(5)
794 #define R_DIS_PRST_1 BIT(6)
795 #define LOCK_ALL_EN BIT(7)
797 #define RF_EN BIT(0)
798 #define RF_RSTB BIT(1)
799 #define RF_SDMRSTB BIT(2)
801 #define LDA15_EN BIT(0)
802 #define LDA15_STBY BIT(1)
803 #define LDA15_OBUF BIT(2)
804 #define LDA15_REG_VOS BIT(3)
807 #define LDV12_EN BIT(0)
808 #define LDV12_SDBY BIT(1)
809 #define LPLDO_HSM BIT(2)
810 #define LPLDO_LSM_DIS BIT(3)
813 #define XTAL_EN BIT(0)
814 #define XTAL_BSEL BIT(1)
817 #define XTAL_GATE_USB BIT(8)
819 #define XTAL_GATE_AFE BIT(11)
821 #define XTAL_RF_GATE BIT(14)
823 #define XTAL_GATE_DIG BIT(17)
825 #define XTAL_BT_GATE BIT(20)
829 #define CKDLY_AFE BIT(26)
830 #define CKDLY_USB BIT(27)
831 #define CKDLY_DIG BIT(28)
832 #define CKDLY_BT BIT(29)
834 #define APLL_EN BIT(0)
835 #define APLL_320_EN BIT(1)
836 #define APLL_FREF_SEL BIT(2)
837 #define APLL_EDGE_SEL BIT(3)
838 #define APLL_WDOGB BIT(4)
839 #define APLL_LPFEN BIT(5)
849 #define APLL_320EN BIT(14)
850 #define APLL_80EN BIT(15)
851 #define APLL_1MEN BIT(24)
853 #define ALD_EN BIT(18)
854 #define EF_PD BIT(19)
855 #define EF_FLAG BIT(31)
857 #define EF_TRPT BIT(7)
858 #define LDOE25_EN BIT(31)
860 #define RSM_EN BIT(0)
861 #define TIMER_EN BIT(4)
863 #define TRSW0EN BIT(2)
864 #define TRSW1EN BIT(3)
865 #define EROM_EN BIT(4)
866 #define ENBT BIT(5)
867 #define ENUART BIT(8)
868 #define UART_910 BIT(9)
869 #define ENPMAC BIT(10)
870 #define SIC_SWRST BIT(11)
871 #define ENSIC BIT(12)
872 #define SIC_23 BIT(13)
873 #define ENHDP BIT(14)
874 #define SIC_LBK BIT(15)
876 #define LED0PL BIT(4)
877 #define LED1PL BIT(12)
878 #define LED0DIS BIT(7)
880 #define MCUFWDL_EN BIT(0)
881 #define MCUFWDL_RDY BIT(1)
882 #define FWDL_CHKSUM_RPT BIT(2)
883 #define MACINI_RDY BIT(3)
884 #define BBINI_RDY BIT(4)
885 #define RFINI_RDY BIT(5)
886 #define WINTINI_RDY BIT(6)
887 #define CPRST BIT(23)
889 #define XCLK_VLD BIT(0)
890 #define ACLK_VLD BIT(1)
891 #define UCLK_VLD BIT(2)
892 #define PCLK_VLD BIT(3)
893 #define PCIRSTB BIT(4)
894 #define V15_VLD BIT(5)
895 #define TRP_B15V_EN BIT(7)
896 #define SIC_IDLE BIT(8)
897 #define BD_MAC2 BIT(9)
898 #define BD_MAC1 BIT(10)
899 #define IC_MACPHY_MODE BIT(11)
900 #define VENDOR_ID BIT(19)
901 #define PAD_HWPD_IDN BIT(22)
902 #define TRP_VAUX_EN BIT(23)
903 #define TRP_BT_EN BIT(24)
904 #define BD_PKG_SEL BIT(25)
905 #define BD_HCI_SEL BIT(26)
906 #define TYPE_ID BIT(27)
913 #define HCI_TXDMA_EN BIT(0)
914 #define HCI_RXDMA_EN BIT(1)
915 #define TXDMA_EN BIT(2)
916 #define RXDMA_EN BIT(3)
917 #define PROTOCOL_EN BIT(4)
918 #define SCHEDULE_EN BIT(5)
919 #define MACTXEN BIT(6)
920 #define MACRXEN BIT(7)
921 #define ENSWBCN BIT(8)
922 #define ENSEC BIT(9)
952 #define RXDMA_ARBBW_EN BIT(0)
953 #define RXSHFT_EN BIT(1)
954 #define RXDMA_AGG_EN BIT(2)
955 #define QS_VO_QUEUE BIT(8)
956 #define QS_VI_QUEUE BIT(9)
957 #define QS_BE_QUEUE BIT(10)
958 #define QS_BK_QUEUE BIT(11)
959 #define QS_MANAGER_QUEUE BIT(12)
960 #define QS_HIGH_QUEUE BIT(13)
962 #define HQSEL_VOQ BIT(0)
963 #define HQSEL_VIQ BIT(1)
964 #define HQSEL_BEQ BIT(2)
965 #define HQSEL_BKQ BIT(3)
966 #define HQSEL_MGTQ BIT(4)
967 #define HQSEL_HIQ BIT(5)
989 #define BB_WRITE_READ_MASK (BIT(31) | BIT(30))
990 #define BB_WRITE_EN BIT(30)
991 #define BB_READ_EN BIT(31)
998 #define HPQ_PUBLIC_DIS BIT(24)
999 #define LPQ_PUBLIC_DIS BIT(25)
1000 #define LD_RQPN BIT(31)
1002 #define BCN_VALID BIT(16)
1009 #define DROP_DATA_EN BIT(9)
1011 #define EN_AMPDU_RTY_NEW BIT(7)
1028 #define USE_SHORT_G1 BIT(20)
1083 #define DIS_EDCA_CNT_DWN BIT(11)
1085 #define EN_MBSSID BIT(1)
1086 #define EN_TXBCN_RPT BIT(2)
1087 #define EN_BCN_FUNCTION BIT(3)
1089 #define TSFTR_RST BIT(0)
1090 #define TSFTR1_RST BIT(1)
1092 #define STOP_BCNQ BIT(6)
1094 #define DIS_TSF_UDT0_NORMAL_CHIP BIT(4)
1095 #define DIS_TSF_UDT0_TEST_CHIP BIT(5)
1097 #define ACMHW_HWEN BIT(0)
1098 #define ACMHW_BEQEN BIT(1)
1099 #define ACMHW_VIQEN BIT(2)
1100 #define ACMHW_VOQEN BIT(3)
1101 #define ACMHW_BEQSTATUS BIT(4)
1102 #define ACMHW_VIQSTATUS BIT(5)
1103 #define ACMHW_VOQSTATUS BIT(6)
1105 #define APSDOFF BIT(6)
1106 #define APSDOFF_STATUS BIT(7)
1108 #define BW_20MHZ BIT(2)
1114 #define TSFRST BIT(0)
1115 #define DIS_GCLK BIT(1)
1116 #define PAD_SEL BIT(2)
1117 #define PWR_ST BIT(6)
1118 #define PWRBIT_OW_EN BIT(7)
1119 #define ACRC BIT(8)
1120 #define CFENDFORM BIT(9)
1121 #define ICV BIT(10)
1123 #define AAP BIT(0)
1124 #define APM BIT(1)
1125 #define AM BIT(2)
1126 #define AB BIT(3)
1127 #define ADD3 BIT(4)
1128 #define APWRMGT BIT(5)
1129 #define CBSSID BIT(6)
1130 #define CBSSID_DATA BIT(6)
1131 #define CBSSID_BCN BIT(7)
1132 #define ACRC32 BIT(8)
1133 #define AICV BIT(9)
1134 #define ADF BIT(11)
1135 #define ACF BIT(12)
1136 #define AMF BIT(13)
1137 #define HTC_LOC_CTRL BIT(14)
1138 #define UC_DATA_EN BIT(16)
1139 #define BM_DATA_EN BIT(17)
1140 #define MFBEN BIT(22)
1141 #define LSIGEN BIT(23)
1142 #define ENMBID BIT(24)
1143 #define APP_BASSN BIT(27)
1144 #define APP_PHYSTS BIT(28)
1145 #define APP_ICV BIT(29)
1146 #define APP_MIC BIT(30)
1147 #define APP_FCS BIT(31)
1168 #define RXERR_RPT_RST BIT(27)
1171 #define SCR_TXUSEDK BIT(0)
1172 #define SCR_RXUSEDK BIT(1)
1173 #define SCR_TXENCENABLE BIT(2)
1174 #define SCR_RXDECENABLE BIT(3)
1175 #define SCR_SKBYA2 BIT(4)
1176 #define SCR_NOSKMC BIT(5)
1177 #define SCR_TXBCUSEDK BIT(6)
1178 #define SCR_RXBCUSEDK BIT(7)
1182 #define USB_SPEED_MASK BIT(5)
1190 #define USB_AGG_EN BIT(3)
1207 #define HAL_8192C_HW_GPIO_WPS_BIT BIT(2)
2199 /* WOL bit information */
2200 #define HAL92C_WOL_PTK_UPDATE_EVENT BIT(0)
2201 #define HAL92C_WOL_GTK_UPDATE_EVENT BIT(1)
2202 #define HAL92C_WOL_DISASSOC_EVENT BIT(2)
2203 #define HAL92C_WOL_DEAUTH_EVENT BIT(3)
2204 #define HAL92C_WOL_FW_DISCONNECT_EVENT BIT(4)
2206 #define WOL_REASON_PTK_UPDATE BIT(0)
2207 #define WOL_REASON_GTK_UPDATE BIT(1)
2208 #define WOL_REASON_DISASSOC BIT(2)
2209 #define WOL_REASON_DEAUTH BIT(3)
2210 #define WOL_REASON_FW_DISCONNECT BIT(4)