11 #include "dm.h"
161 		if (rtlpriv->dm.one_entry_only) {  in rtl92ee_dm_dig()
218 	if (rtlpriv->dm.dbginfo.num_qry_beacon_pkt < 5)  in rtl92ee_dm_dig()
240 			if (rtlpriv->dm.dbginfo.num_qry_beacon_pkt < 5 &&  in rtl92ee_dm_dig()
335 	    (rtlpriv->dm.entry_min_undec_sm_pwdb == 0)) {  in rtl92ee_dm_find_minimum_rssi()
344 				rtlpriv->dm.entry_min_undec_sm_pwdb;  in rtl92ee_dm_find_minimum_rssi()
347 				rtlpriv->dm.entry_min_undec_sm_pwdb);  in rtl92ee_dm_find_minimum_rssi()
350 			    rtlpriv->dm.undec_sm_pwdb;  in rtl92ee_dm_find_minimum_rssi()
357 			rtlpriv->dm.entry_min_undec_sm_pwdb;  in rtl92ee_dm_find_minimum_rssi()
372 	struct rtl_dm *dm = rtl_dm(rtlpriv);  in rtl92ee_dm_check_rssi_monitor()  local
392 			h2c[2] = (u8)(dm->undec_sm_pwdb & 0xFF);  in rtl92ee_dm_check_rssi_monitor()
401 			dm->entry_max_undec_sm_pwdb = max;  in rtl92ee_dm_check_rssi_monitor()
405 			dm->entry_max_undec_sm_pwdb = 0;  in rtl92ee_dm_check_rssi_monitor()
409 			dm->entry_min_undec_sm_pwdb = min;  in rtl92ee_dm_check_rssi_monitor()
413 			dm->entry_min_undec_sm_pwdb = 0;  in rtl92ee_dm_check_rssi_monitor()
418 	if (dm->useramask) {  in rtl92ee_dm_check_rssi_monitor()
420 		h2c[2] = (u8)(dm->undec_sm_pwdb & 0xFF);  in rtl92ee_dm_check_rssi_monitor()
425 		rtl_write_byte(rtlpriv, 0x4fe, dm->undec_sm_pwdb);  in rtl92ee_dm_check_rssi_monitor()
459 	rtlpriv->dm.current_turbo_edca = false;  in rtl92ee_dm_init_edca_turbo()
460 	rtlpriv->dm.is_cur_rdlstate = false;  in rtl92ee_dm_init_edca_turbo()
461 	rtlpriv->dm.is_any_nonbepkts = false;  in rtl92ee_dm_init_edca_turbo()
478 	if (rtlpriv->dm.dbginfo.num_non_be_pkt > 0x100)  in rtl92ee_dm_check_edca_turbo()
479 		rtlpriv->dm.is_any_nonbepkts = true;  in rtl92ee_dm_check_edca_turbo()
480 	rtlpriv->dm.dbginfo.num_non_be_pkt = 0;  in rtl92ee_dm_check_edca_turbo()
486 	b_edca_turbo_on = ((!rtlpriv->dm.is_any_nonbepkts) &&  in rtl92ee_dm_check_edca_turbo()
487 			   (!rtlpriv->dm.disable_framebursting)) ?  in rtl92ee_dm_check_edca_turbo()
499 		rtlpriv->dm.is_cur_rdlstate = is_cur_rdlstate;  in rtl92ee_dm_check_edca_turbo()
500 		rtlpriv->dm.current_turbo_edca = true;  in rtl92ee_dm_check_edca_turbo()
502 		if (rtlpriv->dm.current_turbo_edca) {  in rtl92ee_dm_check_edca_turbo()
508 		rtlpriv->dm.current_turbo_edca = false;  in rtl92ee_dm_check_edca_turbo()
512 	rtlpriv->dm.is_any_nonbepkts = false;  in rtl92ee_dm_check_edca_turbo()
734 		else if ((cfo_ave < -rtlpriv->dm.cfo_threshold) &&  in rtl92ee_dm_dynamic_atc_switch()
735 			 rtlpriv->dm.crystal_cap > 0)  in rtl92ee_dm_dynamic_atc_switch()
772 	struct rtl_dm *dm = rtl_dm(rtlpriv);  in rtl92ee_dm_init_txpower_tracking()  local
775 	dm->txpower_tracking = true;  in rtl92ee_dm_init_txpower_tracking()
776 	dm->default_ofdm_index = 30;  in rtl92ee_dm_init_txpower_tracking()
777 	dm->default_cck_index = 20;  in rtl92ee_dm_init_txpower_tracking()
779 	dm->swing_idx_cck_base = dm->default_cck_index;  in rtl92ee_dm_init_txpower_tracking()
780 	dm->cck_index = dm->default_cck_index;  in rtl92ee_dm_init_txpower_tracking()
783 		dm->swing_idx_ofdm_base[path] = dm->default_ofdm_index;  in rtl92ee_dm_init_txpower_tracking()
784 		dm->ofdm_index[path] = dm->default_ofdm_index;  in rtl92ee_dm_init_txpower_tracking()
785 		dm->delta_power_index[path] = 0;  in rtl92ee_dm_init_txpower_tracking()
786 		dm->delta_power_index_last[path] = 0;  in rtl92ee_dm_init_txpower_tracking()
787 		dm->power_index_offset[path] = 0;  in rtl92ee_dm_init_txpower_tracking()
799 	if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)  in rtl92ee_dm_init_rate_adaptive_mask()
800 		rtlpriv->dm.useramask = true;  in rtl92ee_dm_init_rate_adaptive_mask()
802 		rtlpriv->dm.useramask = false;  in rtl92ee_dm_init_rate_adaptive_mask()
873 	if (!rtlpriv->dm.useramask) {  in rtl92ee_dm_refresh_rate_adaptive_mask()
881 		if (rtlpriv->dm.undec_sm_pwdb < p_ra->ldpc_thres) {  in rtl92ee_dm_refresh_rate_adaptive_mask()
884 		} else if (rtlpriv->dm.undec_sm_pwdb >  in rtl92ee_dm_refresh_rate_adaptive_mask()
889 		if (_rtl92ee_dm_ra_state_check(hw, rtlpriv->dm.undec_sm_pwdb,  in rtl92ee_dm_refresh_rate_adaptive_mask()
908 	rtlpriv->dm.crystal_cap = rtlpriv->efuse.crystalcap;  in rtl92ee_dm_init_dynamic_atc_switch()
910 	rtlpriv->dm.atc_status = rtl_get_bbreg(hw, ROFDM1_CFOTRACKING, BIT(11));  in rtl92ee_dm_init_dynamic_atc_switch()
911 	rtlpriv->dm.cfo_threshold = CFO_THRESHOLD_XTAL;  in rtl92ee_dm_init_dynamic_atc_switch()
919 	rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;  in rtl92ee_dm_init()
934 	rtlpriv->dm.one_entry_only = false;  in rtl92ee_dm_common_info_self_update()
938 		rtlpriv->dm.one_entry_only = true;  in rtl92ee_dm_common_info_self_update()
950 			rtlpriv->dm.one_entry_only = true;  in rtl92ee_dm_common_info_self_update()