Lines Matching +full:0 +full:x000ff000
24 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0xff); in rtl92d_stop_tx_beacon()
25 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0x64); in rtl92d_stop_tx_beacon()
27 tmp1byte &= ~(BIT(0)); in rtl92d_stop_tx_beacon()
39 rtl_write_byte(rtlpriv, REG_BCN_MAX_ERR, 0x0a); in rtl92d_resume_tx_beacon()
40 rtl_write_byte(rtlpriv, REG_TBTT_PROHIBIT + 1, 0xff); in rtl92d_resume_tx_beacon()
42 tmp1byte |= BIT(0); in rtl92d_resume_tx_beacon()
66 val_rcr &= 0x00070000; in rtl92d_get_hw_reg()
113 for (idx = 0; idx < ETH_ALEN; idx++) { in rtl92d_set_hw_reg()
119 u16 rate_cfg = ((u16 *)val)[0]; in rtl92d_set_hw_reg()
120 u8 rate_index = 0; in rtl92d_set_hw_reg()
122 rate_cfg = rate_cfg & 0x15f; in rtl92d_set_hw_reg()
124 ((rate_cfg & 0x150) == 0)) in rtl92d_set_hw_reg()
125 rate_cfg |= 0x01; in rtl92d_set_hw_reg()
126 rtl_write_byte(rtlpriv, REG_RRSR, rate_cfg & 0xff); in rtl92d_set_hw_reg()
128 (rate_cfg >> 8) & 0xff); in rtl92d_set_hw_reg()
129 while (rate_cfg > 0x1) { in rtl92d_set_hw_reg()
133 if (rtlhal->fw_version > 0xe) in rtl92d_set_hw_reg()
139 for (idx = 0; idx < ETH_ALEN; idx++) { in rtl92d_set_hw_reg()
145 rtl_write_byte(rtlpriv, REG_SIFS_CTX + 1, val[0]); in rtl92d_set_hw_reg()
147 rtl_write_byte(rtlpriv, REG_SPEC_SIFS + 1, val[0]); in rtl92d_set_hw_reg()
148 rtl_write_byte(rtlpriv, REG_MAC_SPEC_SIFS + 1, val[0]); in rtl92d_set_hw_reg()
151 0x0e0e); in rtl92d_set_hw_reg()
160 "HW_VAR_SLOT_TIME %x\n", val[0]); in rtl92d_set_hw_reg()
161 rtl_write_byte(rtlpriv, REG_SLOT, val[0]); in rtl92d_set_hw_reg()
162 for (e_aci = 0; e_aci < AC_MAX; e_aci++) in rtl92d_set_hw_reg()
174 reg_tmp |= 0x80; in rtl92d_set_hw_reg()
183 mac->min_space_cfg = ((mac->min_space_cfg & 0xf8) | in rtl92d_set_hw_reg()
214 regtoset = 0xb9726641; in rtl92d_set_hw_reg()
216 regtoset = 0x66626641; in rtl92d_set_hw_reg()
218 regtoset = 0xb972a841; in rtl92d_set_hw_reg()
222 if (factor_toset > 0xf) in rtl92d_set_hw_reg()
223 factor_toset = 0xf; in rtl92d_set_hw_reg()
224 for (index = 0; index < 4; index++) { in rtl92d_set_hw_reg()
226 if ((*ptmp_byte & 0xf0) > in rtl92d_set_hw_reg()
228 *ptmp_byte = (*ptmp_byte & 0x0f) in rtl92d_set_hw_reg()
230 if ((*ptmp_byte & 0x0f) > factor_toset) in rtl92d_set_hw_reg()
231 *ptmp_byte = (*ptmp_byte & 0xf0) in rtl92d_set_hw_reg()
242 u8 retry_limit = val[0]; in rtl92d_set_hw_reg()
250 rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, (BIT(0) | BIT(1))); in rtl92d_set_hw_reg()
276 u2btmp &= 0xC000; in rtl92d_set_hw_reg()
292 long count = 0; in rtl92d_llt_write()
332 rtl_write_byte(rtlpriv, REG_CR + 1, 0x02); in rtl92d_enable_hw_security_config()
355 if (!(value32 & 0x000f0000)) { in _rtl92d_read_chip_version()
371 memset(pwrinfo, 0, sizeof(struct txpower_info)); in _rtl92d_readpowervalue_fromprom()
373 for (group = 0; group < CHANNEL_GROUP_MAX; group++) { in _rtl92d_readpowervalue_fromprom()
374 for (rfpath = 0; rfpath < RF6052_MAX_PATH; rfpath++) { in _rtl92d_readpowervalue_fromprom()
396 for (i = 0; i < 3; i++) { in _rtl92d_readpowervalue_fromprom()
406 for (rfpath = 0; rfpath < RF6052_MAX_PATH; rfpath++) { in _rtl92d_readpowervalue_fromprom()
407 for (group = 0; group < CHANNEL_GROUP_MAX_2G; group++) { in _rtl92d_readpowervalue_fromprom()
411 efuse[eeaddr] == 0xFF ? in _rtl92d_readpowervalue_fromprom()
412 (eeaddr > 0x7B ? in _rtl92d_readpowervalue_fromprom()
418 for (rfpath = 0; rfpath < RF6052_MAX_PATH; rfpath++) { in _rtl92d_readpowervalue_fromprom()
419 for (group = 0; group < CHANNEL_GROUP_MAX; group++) { in _rtl92d_readpowervalue_fromprom()
426 efuse[eeaddr] == 0xFF ? in _rtl92d_readpowervalue_fromprom()
427 (eeaddr > 0x7B ? in _rtl92d_readpowervalue_fromprom()
435 for (group = 0; group < CHANNEL_GROUP_MAX; group++) { in _rtl92d_readpowervalue_fromprom()
436 for (rfpath = 0; rfpath < RF6052_MAX_PATH; rfpath++) { in _rtl92d_readpowervalue_fromprom()
442 if (val8 != 0xFF) in _rtl92d_readpowervalue_fromprom()
444 (val8 >> (rfpath * 4)) & 0xF; in _rtl92d_readpowervalue_fromprom()
450 if (val8 != 0xFF) in _rtl92d_readpowervalue_fromprom()
452 (val8 >> (rfpath * 4)) & 0xF; in _rtl92d_readpowervalue_fromprom()
458 if (val8 != 0xFF) in _rtl92d_readpowervalue_fromprom()
460 (val8 >> (rfpath * 4)) & 0xF; in _rtl92d_readpowervalue_fromprom()
466 if (val8 != 0xFF) in _rtl92d_readpowervalue_fromprom()
468 (val8 >> (rfpath * 4)) & 0xF; in _rtl92d_readpowervalue_fromprom()
474 if (val8 != 0xFF) in _rtl92d_readpowervalue_fromprom()
476 (val8 >> (rfpath * 4)) & 0xF; in _rtl92d_readpowervalue_fromprom()
483 if (efuse[EEPROM_TSSI_A_5G] != 0xFF) { in _rtl92d_readpowervalue_fromprom()
485 pwrinfo->tssi_a[0] = efuse[EEPROM_TSSI_A_5G] & 0x3F; in _rtl92d_readpowervalue_fromprom()
486 pwrinfo->tssi_b[0] = efuse[EEPROM_TSSI_B_5G] & 0x3F; in _rtl92d_readpowervalue_fromprom()
488 pwrinfo->tssi_a[1] = efuse[EEPROM_TSSI_AB_5G] & 0x3F; in _rtl92d_readpowervalue_fromprom()
489 pwrinfo->tssi_b[1] = (efuse[EEPROM_TSSI_AB_5G] & 0xC0) >> 6 | in _rtl92d_readpowervalue_fromprom()
490 (efuse[EEPROM_TSSI_AB_5G + 1] & 0x0F) << 2; in _rtl92d_readpowervalue_fromprom()
492 pwrinfo->tssi_a[2] = (efuse[EEPROM_TSSI_AB_5G + 1] & 0xF0) >> 4 | in _rtl92d_readpowervalue_fromprom()
493 (efuse[EEPROM_TSSI_AB_5G + 2] & 0x03) << 4; in _rtl92d_readpowervalue_fromprom()
494 pwrinfo->tssi_b[2] = (efuse[EEPROM_TSSI_AB_5G + 2] & 0xFC) >> 2; in _rtl92d_readpowervalue_fromprom()
496 for (i = 0; i < 3; i++) { in _rtl92d_readpowervalue_fromprom()
515 rtlefuse->eeprom_regulatory = (hwinfo[EEPROM_RF_OPT1] & 0x7); in _rtl92d_read_txpower_info()
517 hwinfo[EEPROM_THERMAL_METER] & 0x1f; in _rtl92d_read_txpower_info()
519 tempval[0] = hwinfo[EEPROM_IQK_DELTA] & 0x03; in _rtl92d_read_txpower_info()
520 tempval[1] = (hwinfo[EEPROM_LCK_DELTA] & 0x0C) >> 2; in _rtl92d_read_txpower_info()
524 rtlefuse->internal_pa_5g[0] = in _rtl92d_read_txpower_info()
530 rtlefuse->internal_pa_5g[0], in _rtl92d_read_txpower_info()
536 rtlefuse->eeprom_regulatory = 0; in _rtl92d_read_txpower_info()
539 tempval[0] = 3; in _rtl92d_read_txpower_info()
540 tempval[1] = tempval[0]; in _rtl92d_read_txpower_info()
548 if (rtlefuse->eeprom_thermalmeter < 0x06 || in _rtl92d_read_txpower_info()
549 rtlefuse->eeprom_thermalmeter > 0x1c) in _rtl92d_read_txpower_info()
550 rtlefuse->eeprom_thermalmeter = 0x12; in _rtl92d_read_txpower_info()
551 rtlefuse->thermalmeter[0] = rtlefuse->eeprom_thermalmeter; in _rtl92d_read_txpower_info()
554 if (rtlefuse->crystalcap == 0xFF) in _rtl92d_read_txpower_info()
555 rtlefuse->crystalcap = 0; in _rtl92d_read_txpower_info()
557 rtlefuse->eeprom_regulatory = 0; in _rtl92d_read_txpower_info()
559 for (i = 0; i < 2; i++) { in _rtl92d_read_txpower_info()
561 case 0: in _rtl92d_read_txpower_info()
572 tempval[i] = 0; in _rtl92d_read_txpower_info()
577 rtlefuse->delta_iqk = tempval[0]; in _rtl92d_read_txpower_info()
578 if (tempval[1] > 0) in _rtl92d_read_txpower_info()
580 if (rtlefuse->eeprom_c9 == 0xFF) in _rtl92d_read_txpower_info()
581 rtlefuse->eeprom_c9 = 0x00; in _rtl92d_read_txpower_info()
583 "EEPROMRegulatory = 0x%x\n", rtlefuse->eeprom_regulatory); in _rtl92d_read_txpower_info()
585 "ThermalMeter = 0x%x\n", rtlefuse->eeprom_thermalmeter); in _rtl92d_read_txpower_info()
587 "CrystalCap = 0x%x\n", rtlefuse->crystalcap); in _rtl92d_read_txpower_info()
589 "Delta_IQK = 0x%x Delta_LCK = 0x%x\n", in _rtl92d_read_txpower_info()
592 for (rfpath = 0; rfpath < RF6052_MAX_PATH; rfpath++) { in _rtl92d_read_txpower_info()
593 for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) { in _rtl92d_read_txpower_info()
611 (pwr > diff) ? (pwr - diff) : 0; in _rtl92d_read_txpower_info()
626 is_single_mac = !(content[EEPROM_ENDPOINT_SETTING] & BIT(0)); in _rtl92d_read_macphymode_from_prom()
655 read_efuse_byte(hw, EEPROME_CHIP_VERSION_L, &cutvalue[0]); in _rtl92d_efuse_update_chip_version()
656 chipvalue = (cutvalue[1] << 8) | cutvalue[0]; in _rtl92d_efuse_update_chip_version()
658 case 0xAA55: in _rtl92d_efuse_update_chip_version()
662 case 0x9966: in _rtl92d_efuse_update_chip_version()
666 case 0xCC33: in _rtl92d_efuse_update_chip_version()
667 case 0x33CC: in _rtl92d_efuse_update_chip_version()
713 if (rtlhal->interfaceindex != 0) in _rtl92d_read_adapter_info()
784 u8 ratr_index = 0; in rtl92d_update_hal_rate_table()
795 ratr_value = sta->deflink.supp_rates[0]; in rtl92d_update_hal_rate_table()
797 sta->deflink.ht_cap.mcs.rx_mask[0] << 12); in rtl92d_update_hal_rate_table()
800 ratr_value &= 0x00000FF0; in rtl92d_update_hal_rate_table()
803 if (ratr_value & 0x0000000c) in rtl92d_update_hal_rate_table()
804 ratr_value &= 0x0000000d; in rtl92d_update_hal_rate_table()
806 ratr_value &= 0x0000000f; in rtl92d_update_hal_rate_table()
809 ratr_value &= 0x00000FF5; in rtl92d_update_hal_rate_table()
815 ratr_value &= 0x0007F005; in rtl92d_update_hal_rate_table()
821 ratr_mask = 0x000ff005; in rtl92d_update_hal_rate_table()
823 ratr_mask = 0x0f0ff005; in rtl92d_update_hal_rate_table()
831 ratr_value &= 0x000ff0ff; in rtl92d_update_hal_rate_table()
833 ratr_value &= 0x0f0ff0ff; in rtl92d_update_hal_rate_table()
837 ratr_value &= 0x0FFFFFFF; in rtl92d_update_hal_rate_table()
840 ratr_value |= 0x10000000; in rtl92d_update_hal_rate_table()
842 for (shortgi_rate = 15; shortgi_rate > 0; shortgi_rate--) { in rtl92d_update_hal_rate_table()
871 u8 macid = 0; in rtl92d_update_hal_rate_mask()
891 ratr_bitmap = sta->deflink.supp_rates[0]; in rtl92d_update_hal_rate_mask()
893 sta->deflink.ht_cap.mcs.rx_mask[0] << 12); in rtl92d_update_hal_rate_mask()
898 if (ratr_bitmap & 0x0000000c) in rtl92d_update_hal_rate_mask()
899 ratr_bitmap &= 0x0000000d; in rtl92d_update_hal_rate_mask()
901 ratr_bitmap &= 0x0000000f; in rtl92d_update_hal_rate_mask()
907 ratr_bitmap &= 0x00000f00; in rtl92d_update_hal_rate_mask()
909 ratr_bitmap &= 0x00000ff0; in rtl92d_update_hal_rate_mask()
911 ratr_bitmap &= 0x00000ff5; in rtl92d_update_hal_rate_mask()
915 ratr_bitmap &= 0x00000ff0; in rtl92d_update_hal_rate_mask()
926 ratr_bitmap &= 0x00070000; in rtl92d_update_hal_rate_mask()
928 ratr_bitmap &= 0x0007f000; in rtl92d_update_hal_rate_mask()
930 ratr_bitmap &= 0x0007f005; in rtl92d_update_hal_rate_mask()
936 ratr_bitmap &= 0x000f0000; in rtl92d_update_hal_rate_mask()
938 ratr_bitmap &= 0x000ff000; in rtl92d_update_hal_rate_mask()
940 ratr_bitmap &= 0x000ff015; in rtl92d_update_hal_rate_mask()
943 ratr_bitmap &= 0x000f0000; in rtl92d_update_hal_rate_mask()
945 ratr_bitmap &= 0x000ff000; in rtl92d_update_hal_rate_mask()
947 ratr_bitmap &= 0x000ff005; in rtl92d_update_hal_rate_mask()
952 ratr_bitmap &= 0x0f0f0000; in rtl92d_update_hal_rate_mask()
954 ratr_bitmap &= 0x0f0ff000; in rtl92d_update_hal_rate_mask()
956 ratr_bitmap &= 0x0f0ff015; in rtl92d_update_hal_rate_mask()
959 ratr_bitmap &= 0x0f0f0000; in rtl92d_update_hal_rate_mask()
961 ratr_bitmap &= 0x0f0ff000; in rtl92d_update_hal_rate_mask()
963 ratr_bitmap &= 0x0f0ff005; in rtl92d_update_hal_rate_mask()
970 if (macid == 0) in rtl92d_update_hal_rate_mask()
980 ratr_bitmap &= 0x000ff0ff; in rtl92d_update_hal_rate_mask()
982 ratr_bitmap &= 0x0f0ff0ff; in rtl92d_update_hal_rate_mask()
1008 if (macid != 0) in rtl92d_update_hal_rate_mask()
1034 sifs_timer = 0x0a0a; in rtl92d_update_channel_access_setting()
1036 sifs_timer = 0x1010; in rtl92d_update_channel_access_setting()
1103 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, in rtl92d_set_key()
1104 {0x00, 0x00, 0x00, 0x00, 0x00, 0x01}, in rtl92d_set_key()
1105 {0x00, 0x00, 0x00, 0x00, 0x00, 0x02}, in rtl92d_set_key()
1106 {0x00, 0x00, 0x00, 0x00, 0x00, 0x03} in rtl92d_set_key()
1109 0xff, 0xff, 0xff, 0xff, 0xff, 0xff in rtl92d_set_key()
1120 u8 cam_offset = 0; in rtl92d_set_key()
1124 for (idx = 0; idx < clear_number; idx++) { in rtl92d_set_key()
1129 memset(rtlpriv->sec.key_buf[idx], 0, in rtl92d_set_key()
1131 rtlpriv->sec.key_len[idx] = 0; in rtl92d_set_key()
1178 if (rtlpriv->sec.key_len[key_index] == 0) { in rtl92d_set_key()
1191 rtlpriv->sec.key_buf[0][0], in rtl92d_set_key()
1192 rtlpriv->sec.key_buf[0][1]); in rtl92d_set_key()