Lines Matching +full:1 +full:mib
65 if (count && buf[count - 1] == '\n') in mt7915_sys_recovery_set()
66 buf[count - 1] = '\0'; in mt7915_sys_recovery_set()
76 * 1: trigger & enable system error L1 recovery. in mt7915_sys_recovery_set()
104 ret = mt7915_mcu_set_ser(dev, 1, 3, band); in mt7915_sys_recovery_set()
145 "1: trigger system error L1 recovery\n"); in mt7915_sys_recovery_get()
289 phy->mib.dl_cck_cnt, in mt7915_muru_stats_show()
290 phy->mib.dl_ofdm_cnt, in mt7915_muru_stats_show()
291 phy->mib.dl_htmix_cnt, in mt7915_muru_stats_show()
292 phy->mib.dl_htgf_cnt, in mt7915_muru_stats_show()
293 phy->mib.dl_vht_su_cnt); in mt7915_muru_stats_show()
302 phy->mib.dl_vht_2mu_cnt, in mt7915_muru_stats_show()
303 phy->mib.dl_vht_3mu_cnt, in mt7915_muru_stats_show()
304 phy->mib.dl_vht_4mu_cnt); in mt7915_muru_stats_show()
306 sub_total_cnt = (u64)phy->mib.dl_vht_2mu_cnt + in mt7915_muru_stats_show()
307 phy->mib.dl_vht_3mu_cnt + in mt7915_muru_stats_show()
308 phy->mib.dl_vht_4mu_cnt; in mt7915_muru_stats_show()
314 phy->mib.dl_cck_cnt + in mt7915_muru_stats_show()
315 phy->mib.dl_ofdm_cnt + in mt7915_muru_stats_show()
316 phy->mib.dl_htmix_cnt + in mt7915_muru_stats_show()
317 phy->mib.dl_htgf_cnt + in mt7915_muru_stats_show()
318 phy->mib.dl_vht_su_cnt; in mt7915_muru_stats_show()
330 phy->mib.dl_he_su_cnt, phy->mib.dl_he_ext_su_cnt); in mt7915_muru_stats_show()
339 phy->mib.dl_he_2mu_cnt, phy->mib.dl_he_3mu_cnt, in mt7915_muru_stats_show()
340 phy->mib.dl_he_4mu_cnt); in mt7915_muru_stats_show()
349 phy->mib.dl_he_2ru_cnt, in mt7915_muru_stats_show()
350 phy->mib.dl_he_3ru_cnt, in mt7915_muru_stats_show()
351 phy->mib.dl_he_4ru_cnt, in mt7915_muru_stats_show()
352 phy->mib.dl_he_5to8ru_cnt, in mt7915_muru_stats_show()
353 phy->mib.dl_he_9to16ru_cnt, in mt7915_muru_stats_show()
354 phy->mib.dl_he_gtr16ru_cnt); in mt7915_muru_stats_show()
356 sub_total_cnt = (u64)phy->mib.dl_he_2mu_cnt + in mt7915_muru_stats_show()
357 phy->mib.dl_he_3mu_cnt + in mt7915_muru_stats_show()
358 phy->mib.dl_he_4mu_cnt; in mt7915_muru_stats_show()
364 sub_total_cnt = (u64)phy->mib.dl_he_2ru_cnt + in mt7915_muru_stats_show()
365 phy->mib.dl_he_3ru_cnt + in mt7915_muru_stats_show()
366 phy->mib.dl_he_4ru_cnt + in mt7915_muru_stats_show()
367 phy->mib.dl_he_5to8ru_cnt + in mt7915_muru_stats_show()
368 phy->mib.dl_he_9to16ru_cnt + in mt7915_muru_stats_show()
369 phy->mib.dl_he_gtr16ru_cnt; in mt7915_muru_stats_show()
375 total_ppdu_cnt += (u64)phy->mib.dl_he_su_cnt + in mt7915_muru_stats_show()
376 phy->mib.dl_he_ext_su_cnt; in mt7915_muru_stats_show()
389 phy->mib.ul_hetrig_2mu_cnt, in mt7915_muru_stats_show()
390 phy->mib.ul_hetrig_3mu_cnt, in mt7915_muru_stats_show()
391 phy->mib.ul_hetrig_4mu_cnt); in mt7915_muru_stats_show()
400 phy->mib.ul_hetrig_su_cnt, in mt7915_muru_stats_show()
401 phy->mib.ul_hetrig_2ru_cnt, in mt7915_muru_stats_show()
402 phy->mib.ul_hetrig_3ru_cnt, in mt7915_muru_stats_show()
403 phy->mib.ul_hetrig_4ru_cnt, in mt7915_muru_stats_show()
404 phy->mib.ul_hetrig_5to8ru_cnt, in mt7915_muru_stats_show()
405 phy->mib.ul_hetrig_9to16ru_cnt, in mt7915_muru_stats_show()
406 phy->mib.ul_hetrig_gtr16ru_cnt); in mt7915_muru_stats_show()
408 sub_total_cnt = (u64)phy->mib.ul_hetrig_2mu_cnt + in mt7915_muru_stats_show()
409 phy->mib.ul_hetrig_3mu_cnt + in mt7915_muru_stats_show()
410 phy->mib.ul_hetrig_4mu_cnt; in mt7915_muru_stats_show()
416 sub_total_cnt = (u64)phy->mib.ul_hetrig_2ru_cnt + in mt7915_muru_stats_show()
417 phy->mib.ul_hetrig_3ru_cnt + in mt7915_muru_stats_show()
418 phy->mib.ul_hetrig_4ru_cnt + in mt7915_muru_stats_show()
419 phy->mib.ul_hetrig_5to8ru_cnt + in mt7915_muru_stats_show()
420 phy->mib.ul_hetrig_9to16ru_cnt + in mt7915_muru_stats_show()
421 phy->mib.ul_hetrig_gtr16ru_cnt; in mt7915_muru_stats_show()
427 total_ppdu_cnt += phy->mib.ul_hetrig_su_cnt; in mt7915_muru_stats_show()
506 tx = dev->fw.debug_wm || (dev->fw.debug_bin & BIT(1)); in mt7915_fw_debug_wm_set()
597 *is_global = 1; in create_buf_file_cb()
696 bound[i] = MT_MIB_ARNCR_RANGE(range[i / 4], i % 4) + 1; in mt7915_ampdu_stat_read_phy()
701 for (i = 0; i < ARRAY_SIZE(bound) - 1; i++) in mt7915_ampdu_stat_read_phy()
703 bound[i] + 1, bound[i + 1]); in mt7915_ampdu_stat_read_phy()
710 seq_printf(file, "BA miss count: %d\n", phy->mib.ba_miss_cnt); in mt7915_ampdu_stat_read_phy()
716 struct mt76_mib_stats *mib = &phy->mib; in mt7915_txbf_stat_read_phy() local
725 mib->tx_bf_ibf_ppdu_cnt, in mt7915_txbf_stat_read_phy()
726 mib->tx_bf_ebf_ppdu_cnt); in mt7915_txbf_stat_read_phy()
732 mib->tx_bf_rx_fb_all_cnt, in mt7915_txbf_stat_read_phy()
733 mib->tx_bf_rx_fb_he_cnt, in mt7915_txbf_stat_read_phy()
734 mib->tx_bf_rx_fb_vht_cnt, in mt7915_txbf_stat_read_phy()
735 mib->tx_bf_rx_fb_ht_cnt); in mt7915_txbf_stat_read_phy()
738 bw[mib->tx_bf_rx_fb_bw], in mt7915_txbf_stat_read_phy()
739 mib->tx_bf_rx_fb_nc_cnt, in mt7915_txbf_stat_read_phy()
740 mib->tx_bf_rx_fb_nr_cnt); in mt7915_txbf_stat_read_phy()
744 mib->tx_bf_fb_cpl_cnt); in mt7915_txbf_stat_read_phy()
746 mib->tx_bf_fb_trig_cnt); in mt7915_txbf_stat_read_phy()
750 mib->tx_bf_cnt); in mt7915_txbf_stat_read_phy()
751 seq_printf(s, "Tx multi-user MPDU counts: %d\n", mib->tx_mu_mpdu_cnt); in mt7915_txbf_stat_read_phy()
753 mib->tx_mu_acked_mpdu_cnt); in mt7915_txbf_stat_read_phy()
755 mib->tx_su_acked_mpdu_cnt); in mt7915_txbf_stat_read_phy()
765 struct mt76_mib_stats *mib = &phy->mib; in mt7915_tx_stats_show() local
776 for (i = 0; i < ARRAY_SIZE(mib->tx_amsdu); i++) { in mt7915_tx_stats_show()
778 i + 1, mib->tx_amsdu[i]); in mt7915_tx_stats_show()
779 if (mib->tx_amsdu_cnt) in mt7915_tx_stats_show()
781 mib->tx_amsdu[i] * 100 / mib->tx_amsdu_cnt); in mt7915_tx_stats_show()
858 { "CPU_Q0", 0, 1, MT_CTX0 }, in mt7915_hw_queues_show()
859 { "CPU_Q1", 1, 1, MT_CTX0 + 1 }, in mt7915_hw_queues_show()
860 { "CPU_Q2", 2, 1, MT_CTX0 + 2 }, in mt7915_hw_queues_show()
861 { "CPU_Q3", 3, 1, MT_CTX0 + 3 }, in mt7915_hw_queues_show()
872 { "CPU Q0", 0, 1, MT_CTX0 }, in mt7915_hw_queues_show()
873 { "CPU Q1", 1, 1, MT_CTX0 + 1 }, in mt7915_hw_queues_show()
874 { "CPU Q2", 2, 1, MT_CTX0 + 2 }, in mt7915_hw_queues_show()
875 { "CPU Q3", 3, 1, MT_CTX0 + 3 }, in mt7915_hw_queues_show()
877 { "HIF_Q1", 9, 0, MT_HIF0 + 1 }, in mt7915_hw_queues_show()
883 { "MDP_TXQ", 17, 2, 1 }, in mt7915_hw_queues_show()
1000 " ", "1m", "2m", "5m", "11m"); in mt7915_rate_txpower_get()
1072 if (count && buf[count - 1] == '\n') in mt7915_rate_txpower_set()
1073 buf[count - 1] = '\0'; in mt7915_rate_txpower_set()
1122 mt7915_txpower_sets(SKU_HE_RU26, pwr20, RX_ENC_HE + 1); in mt7915_rate_txpower_set()
1123 mt7915_txpower_sets(SKU_HE_RU52, pwr20, RX_ENC_HE + 1); in mt7915_rate_txpower_set()
1124 mt7915_txpower_sets(SKU_HE_RU106, pwr20, RX_ENC_HE + 1); in mt7915_rate_txpower_set()
1336 if (count && buf[count - 1] == '\n') in mt7915_sta_fixed_rate_set()
1337 buf[count - 1] = '\0'; in mt7915_sta_fixed_rate_set()
1341 /* mode - cck: 0, ofdm: 1, ht: 2, gf: 3, vht: 4, he_su: 8, he_er: 9 in mt7915_sta_fixed_rate_set()
1342 * bw - bw20: 0, bw40: 1, bw80: 2, bw160: 3 in mt7915_sta_fixed_rate_set()
1343 * nss - vht: 1~4, he: 1~4, others: ignore in mt7915_sta_fixed_rate_set()
1345 * gi - (ht/vht) lgi: 0, sgi: 1; (he) 0.8us: 0, 1.6us: 1, 3.2us: 2 in mt7915_sta_fixed_rate_set()
1346 * ldpc - off: 0, on: 1 in mt7915_sta_fixed_rate_set()
1347 * stbc - off: 0, on: 1 in mt7915_sta_fixed_rate_set()
1348 * he_ltf - 1xltf: 0, 2xltf: 1, 4xltf: 2 in mt7915_sta_fixed_rate_set()