Lines Matching +defs:val +defs:enabled
56 u32 val; in mt7603_mac_set_timing() local
170 mt7603_wtbl_set_skip_tx(struct mt7603_dev *dev, int idx, bool enabled) in mt7603_wtbl_set_skip_tx()
173 u32 val = mt76_rr(dev, addr + 3 * 4); in mt7603_wtbl_set_skip_tx() local
227 bool enabled) in mt7603_wtbl_set_smps()
239 bool enabled) in mt7603_wtbl_set_ps()
336 u32 val; in mt7603_wtbl_update_cap() local
708 u16 val; in mt7603_mac_tx_rate_val() local
740 u16 val[4]; in mt7603_wtbl_set_rates() local
937 u32 val; in mt7603_mac_write_txwi() local
1498 u32 val; in mt7603_dma_debug() local
1526 u32 val; in mt7603_tx_dma_busy() local
1561 u32 addr, val; in mt7603_rx_pse_busy() local
1625 mt7603_edcca_set_strict(struct mt7603_dev *dev, bool val) in mt7603_edcca_set_strict()
1654 u32 val = mt76_rr(dev, MT_AGC(41)); in mt7603_edcca_check() local
1772 u32 val; in mt7603_false_cca_check() local
1841 u32 val = mt76_rr(dev, MT_TX_AGG_CNT(i)); in mt7603_mac_work() local