Lines Matching full:trans
6 #include "iwl-trans.h"
20 int iwl_pcie_gen2_apm_init(struct iwl_trans *trans) in iwl_pcie_gen2_apm_init() argument
24 IWL_DEBUG_INFO(trans, "Init card's basic functions\n"); in iwl_pcie_gen2_apm_init()
35 iwl_set_bit(trans, CSR_GIO_CHICKEN_BITS, in iwl_pcie_gen2_apm_init()
39 iwl_set_bit(trans, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL); in iwl_pcie_gen2_apm_init()
45 iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG, in iwl_pcie_gen2_apm_init()
48 iwl_pcie_apm_config(trans); in iwl_pcie_gen2_apm_init()
50 ret = iwl_finish_nic_init(trans); in iwl_pcie_gen2_apm_init()
54 set_bit(STATUS_DEVICE_ENABLED, &trans->status); in iwl_pcie_gen2_apm_init()
59 static void iwl_pcie_gen2_apm_stop(struct iwl_trans *trans, bool op_mode_leave) in iwl_pcie_gen2_apm_stop() argument
61 IWL_DEBUG_INFO(trans, "Stop card, put in low power state\n"); in iwl_pcie_gen2_apm_stop()
64 if (!test_bit(STATUS_DEVICE_ENABLED, &trans->status)) in iwl_pcie_gen2_apm_stop()
65 iwl_pcie_gen2_apm_init(trans); in iwl_pcie_gen2_apm_stop()
68 iwl_set_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG, in iwl_pcie_gen2_apm_stop()
70 iwl_set_bit(trans, CSR_HW_IF_CONFIG_REG, in iwl_pcie_gen2_apm_stop()
74 iwl_clear_bit(trans, CSR_DBG_LINK_PWR_MGMT_REG, in iwl_pcie_gen2_apm_stop()
79 clear_bit(STATUS_DEVICE_ENABLED, &trans->status); in iwl_pcie_gen2_apm_stop()
82 iwl_pcie_apm_stop_master(trans); in iwl_pcie_gen2_apm_stop()
84 iwl_trans_sw_reset(trans, false); in iwl_pcie_gen2_apm_stop()
90 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) in iwl_pcie_gen2_apm_stop()
91 iwl_clear_bit(trans, CSR_GP_CNTRL, in iwl_pcie_gen2_apm_stop()
94 iwl_clear_bit(trans, CSR_GP_CNTRL, in iwl_pcie_gen2_apm_stop()
98 static void iwl_trans_pcie_fw_reset_handshake(struct iwl_trans *trans) in iwl_trans_pcie_fw_reset_handshake() argument
100 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_fw_reset_handshake()
105 if (trans->trans_cfg->device_family < IWL_DEVICE_FAMILY_AX210) in iwl_trans_pcie_fw_reset_handshake()
106 iwl_write_umac_prph(trans, UREG_NIC_SET_NMI_DRIVER, in iwl_trans_pcie_fw_reset_handshake()
108 else if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) in iwl_trans_pcie_fw_reset_handshake()
109 iwl_write_umac_prph(trans, UREG_DOORBELL_TO_ISR6, in iwl_trans_pcie_fw_reset_handshake()
112 iwl_write32(trans, CSR_DOORBELL_VECTOR, in iwl_trans_pcie_fw_reset_handshake()
120 u32 inta_hw = iwl_read32(trans, CSR_MSIX_HW_INT_CAUSES_AD); in iwl_trans_pcie_fw_reset_handshake()
122 IWL_ERR(trans, in iwl_trans_pcie_fw_reset_handshake()
131 iwl_op_mode_nic_error(trans->op_mode, in iwl_trans_pcie_fw_reset_handshake()
133 iwl_op_mode_dump_error(trans->op_mode, &mode); in iwl_trans_pcie_fw_reset_handshake()
140 static void _iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans) in _iwl_trans_pcie_gen2_stop_device() argument
142 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in _iwl_trans_pcie_gen2_stop_device()
149 if (trans->state >= IWL_TRANS_FW_STARTED && in _iwl_trans_pcie_gen2_stop_device()
155 trans->state = IWL_TRANS_NO_FW; in _iwl_trans_pcie_gen2_stop_device()
156 iwl_trans_pcie_fw_reset_handshake(trans); in _iwl_trans_pcie_gen2_stop_device()
162 iwl_disable_interrupts(trans); in _iwl_trans_pcie_gen2_stop_device()
165 iwl_pcie_disable_ict(trans); in _iwl_trans_pcie_gen2_stop_device()
174 if (test_and_clear_bit(STATUS_DEVICE_ENABLED, &trans->status)) { in _iwl_trans_pcie_gen2_stop_device()
175 IWL_DEBUG_INFO(trans, in _iwl_trans_pcie_gen2_stop_device()
177 iwl_pcie_synchronize_irqs(trans); in _iwl_trans_pcie_gen2_stop_device()
178 iwl_pcie_rx_napi_sync(trans); in _iwl_trans_pcie_gen2_stop_device()
179 iwl_txq_gen2_tx_free(trans); in _iwl_trans_pcie_gen2_stop_device()
180 iwl_pcie_rx_stop(trans); in _iwl_trans_pcie_gen2_stop_device()
183 iwl_pcie_ctxt_info_free_paging(trans); in _iwl_trans_pcie_gen2_stop_device()
184 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) in _iwl_trans_pcie_gen2_stop_device()
185 iwl_pcie_ctxt_info_gen3_free(trans, false); in _iwl_trans_pcie_gen2_stop_device()
187 iwl_pcie_ctxt_info_free(trans); in _iwl_trans_pcie_gen2_stop_device()
190 iwl_pcie_gen2_apm_stop(trans, false); in _iwl_trans_pcie_gen2_stop_device()
193 iwl_trans_sw_reset(trans, true); in _iwl_trans_pcie_gen2_stop_device()
211 iwl_disable_interrupts(trans); in _iwl_trans_pcie_gen2_stop_device()
214 clear_bit(STATUS_SYNC_HCMD_ACTIVE, &trans->status); in _iwl_trans_pcie_gen2_stop_device()
215 clear_bit(STATUS_INT_ENABLED, &trans->status); in _iwl_trans_pcie_gen2_stop_device()
216 clear_bit(STATUS_TPOWER_PMI, &trans->status); in _iwl_trans_pcie_gen2_stop_device()
222 iwl_enable_rfkill_int(trans); in _iwl_trans_pcie_gen2_stop_device()
225 void iwl_trans_pcie_gen2_stop_device(struct iwl_trans *trans) in iwl_trans_pcie_gen2_stop_device() argument
227 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_gen2_stop_device()
230 iwl_op_mode_time_point(trans->op_mode, in iwl_trans_pcie_gen2_stop_device()
236 was_in_rfkill = test_bit(STATUS_RFKILL_OPMODE, &trans->status); in iwl_trans_pcie_gen2_stop_device()
237 _iwl_trans_pcie_gen2_stop_device(trans); in iwl_trans_pcie_gen2_stop_device()
238 iwl_trans_pcie_handle_stop_rfkill(trans, was_in_rfkill); in iwl_trans_pcie_gen2_stop_device()
242 static int iwl_pcie_gen2_nic_init(struct iwl_trans *trans) in iwl_pcie_gen2_nic_init() argument
244 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_gen2_nic_init()
246 trans->cfg->min_txq_size); in iwl_pcie_gen2_nic_init()
251 ret = iwl_pcie_gen2_apm_init(trans); in iwl_pcie_gen2_nic_init()
256 iwl_op_mode_nic_config(trans->op_mode); in iwl_pcie_gen2_nic_init()
259 if (iwl_pcie_gen2_rx_init(trans)) in iwl_pcie_gen2_nic_init()
263 if (iwl_txq_gen2_init(trans, trans_pcie->txqs.cmd.q_id, queue_size)) in iwl_pcie_gen2_nic_init()
267 iwl_set_bit(trans, CSR_MAC_SHADOW_REG_CTRL, 0x800FFFFF); in iwl_pcie_gen2_nic_init()
268 IWL_DEBUG_INFO(trans, "Enabling shadow registers in device\n"); in iwl_pcie_gen2_nic_init()
273 static void iwl_pcie_get_rf_name(struct iwl_trans *trans) in iwl_pcie_get_rf_name() argument
275 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_get_rf_name()
284 switch (CSR_HW_RFID_TYPE(trans->hw_rf_id)) { in iwl_pcie_get_rf_name()
308 CSR_HW_RFID_STEP(trans->hw_rf_id)) in iwl_pcie_get_rf_name()
317 switch (CSR_HW_RFID_TYPE(trans->hw_rf_id)) { in iwl_pcie_get_rf_name()
321 version = iwl_read_prph(trans, CNVI_MBOX_C); in iwl_pcie_get_rf_name()
340 trans->hw_rf_id); in iwl_pcie_get_rf_name()
342 IWL_INFO(trans, "Detected RF %s\n", buf); in iwl_pcie_get_rf_name()
352 void iwl_trans_pcie_gen2_fw_alive(struct iwl_trans *trans) in iwl_trans_pcie_gen2_fw_alive() argument
354 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_gen2_fw_alive()
356 iwl_pcie_reset_ict(trans); in iwl_trans_pcie_gen2_fw_alive()
367 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) in iwl_trans_pcie_gen2_fw_alive()
368 iwl_pcie_ctxt_info_gen3_free(trans, true); in iwl_trans_pcie_gen2_fw_alive()
370 iwl_pcie_ctxt_info_free(trans); in iwl_trans_pcie_gen2_fw_alive()
376 iwl_enable_interrupts(trans); in iwl_trans_pcie_gen2_fw_alive()
378 iwl_pcie_check_hw_rf_kill(trans); in iwl_trans_pcie_gen2_fw_alive()
380 iwl_pcie_get_rf_name(trans); in iwl_trans_pcie_gen2_fw_alive()
384 static bool iwl_pcie_set_ltr(struct iwl_trans *trans) in iwl_pcie_set_ltr() argument
401 if ((trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210 || in iwl_pcie_set_ltr()
402 trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000) && in iwl_pcie_set_ltr()
403 !trans->trans_cfg->integrated) { in iwl_pcie_set_ltr()
404 iwl_write32(trans, CSR_LTR_LONG_VAL_AD, ltr_val); in iwl_pcie_set_ltr()
408 if (trans->trans_cfg->integrated && in iwl_pcie_set_ltr()
409 trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_22000) { in iwl_pcie_set_ltr()
410 iwl_write_prph(trans, HPM_MAC_LTR_CSR, HPM_MAC_LRT_ENABLE_ALL); in iwl_pcie_set_ltr()
411 iwl_write_prph(trans, HPM_UMAC_LTR, ltr_val); in iwl_pcie_set_ltr()
415 if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_AX210) { in iwl_pcie_set_ltr()
417 iwl_write32(trans, CSR_MSIX_HW_INT_CAUSES_AD, in iwl_pcie_set_ltr()
433 static void iwl_pcie_spin_for_iml(struct iwl_trans *trans) in iwl_pcie_spin_for_iml() argument
437 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_pcie_spin_for_iml()
445 value = iwl_read32(trans, CSR_LTR_LAST_MSG); in iwl_pcie_spin_for_iml()
446 IWL_DEBUG_INFO(trans, "Polling for IML load - CSR_LTR_LAST_MSG=0x%x\n", in iwl_pcie_spin_for_iml()
450 if (iwl_read32(trans, CSR_MSIX_HW_INT_CAUSES_AD) & in iwl_pcie_spin_for_iml()
456 value = iwl_read32(trans, CSR_LTR_LAST_MSG); in iwl_pcie_spin_for_iml()
460 IWL_DEBUG_INFO(trans, in iwl_pcie_spin_for_iml()
471 int iwl_trans_pcie_gen2_start_fw(struct iwl_trans *trans, in iwl_trans_pcie_gen2_start_fw() argument
474 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); in iwl_trans_pcie_gen2_start_fw()
479 if (iwl_pcie_prepare_card_hw(trans)) { in iwl_trans_pcie_gen2_start_fw()
480 IWL_WARN(trans, "Exit HW not ready\n"); in iwl_trans_pcie_gen2_start_fw()
484 iwl_enable_rfkill_int(trans); in iwl_trans_pcie_gen2_start_fw()
486 iwl_write32(trans, CSR_INT, 0xFFFFFFFF); in iwl_trans_pcie_gen2_start_fw()
493 iwl_disable_interrupts(trans); in iwl_trans_pcie_gen2_start_fw()
496 iwl_pcie_synchronize_irqs(trans); in iwl_trans_pcie_gen2_start_fw()
501 hw_rfkill = iwl_pcie_check_hw_rf_kill(trans); in iwl_trans_pcie_gen2_start_fw()
509 IWL_WARN(trans, in iwl_trans_pcie_gen2_start_fw()
516 iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); in iwl_trans_pcie_gen2_start_fw()
517 iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, in iwl_trans_pcie_gen2_start_fw()
521 iwl_write32(trans, CSR_INT, 0xFFFFFFFF); in iwl_trans_pcie_gen2_start_fw()
523 ret = iwl_pcie_gen2_nic_init(trans); in iwl_trans_pcie_gen2_start_fw()
525 IWL_ERR(trans, "Unable to init nic\n"); in iwl_trans_pcie_gen2_start_fw()
529 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) in iwl_trans_pcie_gen2_start_fw()
530 ret = iwl_pcie_ctxt_info_gen3_init(trans, fw); in iwl_trans_pcie_gen2_start_fw()
532 ret = iwl_pcie_ctxt_info_init(trans, fw); in iwl_trans_pcie_gen2_start_fw()
536 keep_ram_busy = !iwl_pcie_set_ltr(trans); in iwl_trans_pcie_gen2_start_fw()
538 if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_BZ) { in iwl_trans_pcie_gen2_start_fw()
539 IWL_DEBUG_POWER(trans, "function scratch register value is 0x%08x\n", in iwl_trans_pcie_gen2_start_fw()
540 iwl_read32(trans, CSR_FUNC_SCRATCH)); in iwl_trans_pcie_gen2_start_fw()
541 iwl_write32(trans, CSR_FUNC_SCRATCH, CSR_FUNC_SCRATCH_INIT_VALUE); in iwl_trans_pcie_gen2_start_fw()
542 iwl_set_bit(trans, CSR_GP_CNTRL, in iwl_trans_pcie_gen2_start_fw()
544 } else if (trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) { in iwl_trans_pcie_gen2_start_fw()
545 iwl_write_umac_prph(trans, UREG_CPU_INIT_RUN, 1); in iwl_trans_pcie_gen2_start_fw()
547 iwl_write_prph(trans, UREG_CPU_INIT_RUN, 1); in iwl_trans_pcie_gen2_start_fw()
551 iwl_pcie_spin_for_iml(trans); in iwl_trans_pcie_gen2_start_fw()
554 hw_rfkill = iwl_pcie_check_hw_rf_kill(trans); in iwl_trans_pcie_gen2_start_fw()