8 #include "iwl-dbg-tlv.h"
9 #include "fw/dbg.h"
116 	if (!iwl_dbg_tlv_add(tlv, &trans->dbg.debug_info_tlv_list))  in iwl_dbg_tlv_alloc_debug_info()
156 	trans->dbg.fw_mon_cfg[alloc_id] = *alloc;  in iwl_dbg_tlv_alloc_buf_alloc()
187 	if (!iwl_dbg_tlv_add(tlv, &trans->dbg.time_point[tp].hcmd_list))  in iwl_dbg_tlv_alloc_hcmd()
227 		trans->dbg.imr_data.sram_addr =  in iwl_dbg_tlv_alloc_region()
229 		trans->dbg.imr_data.sram_size =  in iwl_dbg_tlv_alloc_region()
234 	active_reg = &trans->dbg.active_regions[id];  in iwl_dbg_tlv_alloc_region()
272 	trans->dbg.last_tp_resetfw = 0xFF;  in iwl_dbg_tlv_alloc_trigger()
274 	new_tlv = iwl_dbg_tlv_add(tlv, &trans->dbg.time_point[tp].trig_list);  in iwl_dbg_tlv_alloc_trigger()
308 	if (!iwl_dbg_tlv_add(tlv, &trans->dbg.time_point[tp].config_list))  in iwl_dbg_tlv_config_set()
327 		&trans->dbg.external_ini_cfg : &trans->dbg.internal_ini_cfg;  in iwl_dbg_tlv_alloc()
342 	    !(domain & trans->dbg.domains_bitmap)) {  in iwl_dbg_tlv_alloc()
345 			     domain, trans->dbg.domains_bitmap);  in iwl_dbg_tlv_alloc()
379 	struct list_head *timer_list = &trans->dbg.periodic_trig_list;  in iwl_dbg_tlv_del_timers()
400 	fw_mon = &trans->dbg.fw_mon_ini[alloc_id];  in iwl_dbg_tlv_fragments_free()
425 	for (i = 0; i < ARRAY_SIZE(trans->dbg.active_regions); i++) {  in iwl_dbg_tlv_free()
427 			&trans->dbg.active_regions[i];  in iwl_dbg_tlv_free()
434 				 &trans->dbg.debug_info_tlv_list, list) {  in iwl_dbg_tlv_free()
439 	for (i = 0; i < ARRAY_SIZE(trans->dbg.time_point); i++) {  in iwl_dbg_tlv_free()
441 			&trans->dbg.time_point[i];  in iwl_dbg_tlv_free()
469 	for (i = 0; i < ARRAY_SIZE(trans->dbg.fw_mon_ini); i++)  in iwl_dbg_tlv_free()
515 	trans->dbg.yoyo_bin_loaded = true;  in iwl_dbg_tlv_load_bin()
526 	INIT_LIST_HEAD(&trans->dbg.debug_info_tlv_list);  in iwl_dbg_tlv_init()
527 	INIT_LIST_HEAD(&trans->dbg.periodic_trig_list);  in iwl_dbg_tlv_init()
529 	for (i = 0; i < ARRAY_SIZE(trans->dbg.time_point); i++) {  in iwl_dbg_tlv_init()
531 			&trans->dbg.time_point[i];  in iwl_dbg_tlv_init()
591 	fw_mon_cfg = &fwrt->trans->dbg.fw_mon_cfg[alloc_id];  in iwl_dbg_tlv_alloc_fragments()
592 	fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];  in iwl_dbg_tlv_alloc_fragments()
668 	if (le32_to_cpu(fwrt->trans->dbg.fw_mon_cfg[alloc_id].buf_location) !=  in iwl_dbg_tlv_apply_buffer()
672 	fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];  in iwl_dbg_tlv_apply_buffer()
750 	if (le32_to_cpu(fwrt->trans->dbg.fw_mon_cfg[alloc_id].buf_location) !=  in iwl_dbg_tlv_update_dram()
757 	fw_mon = &fwrt->trans->dbg.fw_mon_ini[alloc_id];  in iwl_dbg_tlv_update_dram()
797 		&fwrt->trans->dbg.fw_mon_ini[IWL_FW_INI_ALLOCATION_ID_DBGC1].frags[0];  in iwl_dbg_tlv_update_drams()
813 		if (fwrt->trans->dbg.fw_mon_cfg[i].buf_location ==  in iwl_dbg_tlv_update_drams()
901 			struct iwl_dram_data *frags = &fwrt->trans->dbg.fw_mon_ini[1].frags[0];  in iwl_dbg_tlv_apply_config()
940 			fwrt->trans->dbg.ucode_preset = debug_token_config;  in iwl_dbg_tlv_apply_config()
974 		&fwrt->trans->dbg.time_point[IWL_FW_INI_TIME_POINT_PERIODIC].active_trig_list;  in iwl_dbg_tlv_set_periodic_trigs()
1017 			      &fwrt->trans->dbg.periodic_trig_list);  in iwl_dbg_tlv_set_periodic_trigs()
1242 		fwrt->trans->dbg.restart_required = false;  in iwl_dbg_tlv_tp_trigger()
1246 			fwrt->trans->dbg.restart_required = true;  in iwl_dbg_tlv_tp_trigger()
1248 			   fwrt->trans->dbg.last_tp_resetfw ==  in iwl_dbg_tlv_tp_trigger()
1250 			fwrt->trans->dbg.restart_required = false;  in iwl_dbg_tlv_tp_trigger()
1251 			fwrt->trans->dbg.last_tp_resetfw = 0xFF;  in iwl_dbg_tlv_tp_trigger()
1254 			fwrt->trans->dbg.restart_required = true;  in iwl_dbg_tlv_tp_trigger()
1257 			fwrt->trans->dbg.restart_required = false;  in iwl_dbg_tlv_tp_trigger()
1258 			fwrt->trans->dbg.last_tp_resetfw =  in iwl_dbg_tlv_tp_trigger()
1273 	enum iwl_fw_ini_buffer_location *ini_dest = &fwrt->trans->dbg.ini_dest;  in iwl_dbg_tlv_init_cfg()
1280 			     fwrt->trans->dbg.domains_bitmap);  in iwl_dbg_tlv_init_cfg()
1282 		for (i = 0; i < ARRAY_SIZE(fwrt->trans->dbg.time_point); i++) {  in iwl_dbg_tlv_init_cfg()
1284 				&fwrt->trans->dbg.time_point[i];  in iwl_dbg_tlv_init_cfg()
1299 			&fwrt->trans->dbg.fw_mon_cfg[i];  in iwl_dbg_tlv_init_cfg()
1326 	for (i = 0; i < ARRAY_SIZE(fwrt->trans->dbg.active_regions) && failed_alloc; i++) {  in iwl_dbg_tlv_init_cfg()
1329 			&fwrt->trans->dbg.active_regions[i];  in iwl_dbg_tlv_init_cfg()
1333 			fwrt->trans->dbg.unsupported_region_msk |= BIT(i);  in iwl_dbg_tlv_init_cfg()
1349 		fwrt->trans->dbg.unsupported_region_msk |= BIT(i);  in iwl_dbg_tlv_init_cfg()
1368 	hcmd_list = &fwrt->trans->dbg.time_point[tp_id].hcmd_list;  in _iwl_dbg_tlv_time_point()
1369 	trig_list = &fwrt->trans->dbg.time_point[tp_id].active_trig_list;  in _iwl_dbg_tlv_time_point()
1370 	conf_list = &fwrt->trans->dbg.time_point[tp_id].config_list;  in _iwl_dbg_tlv_time_point()