Lines Matching +full:tclk +full:- +full:period
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
70 #define ATH_AMPDU_LIMIT_MAX (64 * 1024 - 1)
72 #define ATH_DEFAULT_NOISE_FLOOR -95
74 #define ATH9K_RSSI_BAD -128
80 (_ah)->reg_ops.write((_ah), (_val), (_reg))
83 (_ah)->reg_ops.read((_ah), (_reg))
86 (_ah)->reg_ops.multi_read((_ah), (_addr), (_val), (_cnt))
89 (_ah)->reg_ops.rmw((_ah), (_reg), (_set), (_clr))
93 if ((_ah)->reg_ops.enable_write_buffer) \
94 (_ah)->reg_ops.enable_write_buffer((_ah)); \
99 if ((_ah)->reg_ops.write_flush) \
100 (_ah)->reg_ops.write_flush((_ah)); \
105 if ((_ah)->reg_ops.enable_rmw_buffer) \
106 (_ah)->reg_ops.enable_rmw_buffer((_ah)); \
111 if ((_ah)->reg_ops.rmw_flush) \
112 (_ah)->reg_ops.rmw_flush((_ah)); \
117 len += scnprintf(buf + len, size - len, "%20s : %10d\n",\
134 (ath9k_hw_common(ah)->bus_ops->ath_bus_type \
282 * an exact user defined pattern or de-authentication/disassoc pattern.
284 * bytes of the pattern for user defined pattern, de-authentication and
464 #define IS_CHAN_5GHZ(_c) (!!((_c)->channelFlags & CHANNEL_5GHZ))
467 #define IS_CHAN_HALF_RATE(_c) (!!((_c)->channelFlags & CHANNEL_HALF))
468 #define IS_CHAN_QUARTER_RATE(_c) (!!((_c)->channelFlags & CHANNEL_QUARTER))
470 (IS_CHAN_5GHZ(_c) && ((_ah)->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK))
472 #define IS_CHAN_HT(_c) ((_c)->channelFlags & CHANNEL_HT)
477 (!!((_c)->channelFlags & (CHANNEL_HT40PLUS | CHANNEL_HT40MINUS)))
479 #define IS_CHAN_HT40PLUS(_c) ((_c)->channelFlags & CHANNEL_HT40PLUS)
480 #define IS_CHAN_HT40MINUS(_c) ((_c)->channelFlags & CHANNEL_HT40MINUS)
574 * struct ath_hw_radar_conf - radar detection initialization parameters
576 * @pulse_inband: threshold for checking the ratio of in-band power
578 * @pulse_inband_step: threshold for checking an in-band power to total
587 * @radar_inband: threshold for checking the ratio of in-band power
608 * struct ath_hw_private_ops - callbacks used internally by hardware code
680 * struct ath_spec_scan - parameters for Atheros spectral scan
692 * @period: time duration between successive spectral scan entry points
693 * (period*256*Tclk). Tclk = ath_common->clockrate
696 * Note: Tclk = 40MHz or 44MHz depending upon operating mode.
706 u8 period; member
711 * struct ath_hw_ops - callbacks used by hardware code and driver code
717 * @calibrate: periodic calibration for NF, ANI, IQ, ADC gain, ADC-DC
883 /* Used to program the radio on non single-chip devices */
1003 return &ah->common; in ath9k_hw_common()
1008 return &(ath9k_hw_common(ah)->regulatory); in ath9k_hw_regulatory()
1013 return &ah->private_ops; in ath9k_hw_private_ops()
1018 return &ah->ops; in ath9k_hw_ops()
1164 return ah->btcoex_hw.enabled; in ath9k_hw_btcoex_is_enabled()
1168 return ah->common.btcoex_enabled && in ath9k_hw_mci_is_enabled()
1169 (ah->caps.hw_caps & ATH9K_HW_CAP_MCI); in ath9k_hw_mci_is_enabled()
1176 return ah->btcoex_hw.scheme; in ath9k_hw_get_btcoex_scheme()