Lines Matching full:ab
22 static void ath12k_dp_htt_htc_tx_complete(struct ath12k_base *ab, in ath12k_dp_htt_htc_tx_complete() argument
30 struct ath12k_base *ab = ar->ab; in ath12k_dp_peer_cleanup() local
35 spin_lock_bh(&ab->base_lock); in ath12k_dp_peer_cleanup()
36 peer = ath12k_peer_find(ab, vdev_id, addr); in ath12k_dp_peer_cleanup()
38 ath12k_warn(ab, "failed to lookup peer %pM on vdev %d\n", in ath12k_dp_peer_cleanup()
40 spin_unlock_bh(&ab->base_lock); in ath12k_dp_peer_cleanup()
45 spin_unlock_bh(&ab->base_lock); in ath12k_dp_peer_cleanup()
52 spin_unlock_bh(&ab->base_lock); in ath12k_dp_peer_cleanup()
57 struct ath12k_base *ab = ar->ab; in ath12k_dp_peer_setup() local
69 ath12k_warn(ab, "failed to set default routing %d peer :%pM vdev_id :%d\n", in ath12k_dp_peer_setup()
78 ath12k_warn(ab, "failed to setup rxd tid queue for tid %d: %d\n", in ath12k_dp_peer_setup()
86 ath12k_warn(ab, "failed to setup rx defrag context\n"); in ath12k_dp_peer_setup()
95 spin_lock_bh(&ab->base_lock); in ath12k_dp_peer_setup()
97 peer = ath12k_peer_find(ab, vdev_id, addr); in ath12k_dp_peer_setup()
99 ath12k_warn(ab, "failed to find the peer to del rx tid\n"); in ath12k_dp_peer_setup()
100 spin_unlock_bh(&ab->base_lock); in ath12k_dp_peer_setup()
107 spin_unlock_bh(&ab->base_lock); in ath12k_dp_peer_setup()
112 void ath12k_dp_srng_cleanup(struct ath12k_base *ab, struct dp_srng *ring) in ath12k_dp_srng_cleanup() argument
117 dma_free_coherent(ab->dev, ring->size, ring->vaddr_unaligned, in ath12k_dp_srng_cleanup()
137 static int ath12k_dp_srng_calculate_msi_group(struct ath12k_base *ab, in ath12k_dp_srng_calculate_msi_group() argument
147 grp_mask = &ab->hw_params->ring_mask->rx_wbm_rel[0]; in ath12k_dp_srng_calculate_msi_group()
150 map = ab->hw_params->hal_ops->tcl_to_wbm_rbm_map; in ath12k_dp_srng_calculate_msi_group()
151 for (i = 0; i < ab->hw_params->max_tx_ring; i++) { in ath12k_dp_srng_calculate_msi_group()
158 grp_mask = &ab->hw_params->ring_mask->tx[0]; in ath12k_dp_srng_calculate_msi_group()
162 grp_mask = &ab->hw_params->ring_mask->rx_err[0]; in ath12k_dp_srng_calculate_msi_group()
165 grp_mask = &ab->hw_params->ring_mask->rx[0]; in ath12k_dp_srng_calculate_msi_group()
168 grp_mask = &ab->hw_params->ring_mask->reo_status[0]; in ath12k_dp_srng_calculate_msi_group()
172 grp_mask = &ab->hw_params->ring_mask->rx_mon_dest[0]; in ath12k_dp_srng_calculate_msi_group()
175 grp_mask = &ab->hw_params->ring_mask->tx_mon_dest[0]; in ath12k_dp_srng_calculate_msi_group()
178 grp_mask = &ab->hw_params->ring_mask->host2rxdma[0]; in ath12k_dp_srng_calculate_msi_group()
198 static void ath12k_dp_srng_msi_setup(struct ath12k_base *ab, in ath12k_dp_srng_msi_setup() argument
206 ret = ath12k_hif_get_user_msi_vector(ab, "DP", in ath12k_dp_srng_msi_setup()
212 msi_group_number = ath12k_dp_srng_calculate_msi_group(ab, type, in ath12k_dp_srng_msi_setup()
215 ath12k_dbg(ab, ATH12K_DBG_PCI, in ath12k_dp_srng_msi_setup()
224 ath12k_dbg(ab, ATH12K_DBG_PCI, in ath12k_dp_srng_msi_setup()
229 ath12k_hif_get_msi_address(ab, &addr_lo, &addr_hi); in ath12k_dp_srng_msi_setup()
238 int ath12k_dp_srng_setup(struct ath12k_base *ab, struct dp_srng *ring, in ath12k_dp_srng_setup() argument
243 int entry_sz = ath12k_hal_srng_get_entrysize(ab, type); in ath12k_dp_srng_setup()
244 int max_entries = ath12k_hal_srng_get_max_entries(ab, type); in ath12k_dp_srng_setup()
254 ring->vaddr_unaligned = dma_alloc_coherent(ab->dev, ring->size, in ath12k_dp_srng_setup()
267 ath12k_dp_srng_msi_setup(ab, ¶ms, type, ring_num + mac_id); in ath12k_dp_srng_setup()
290 if (ab->hw_params->hw_ops->dp_srng_is_tx_comp_ring(ring_num)) { in ath12k_dp_srng_setup()
318 ath12k_warn(ab, "Not a valid ring type in dp :%d\n", type); in ath12k_dp_srng_setup()
322 ret = ath12k_hal_srng_setup(ab, type, ring_num, mac_id, ¶ms); in ath12k_dp_srng_setup()
324 ath12k_warn(ab, "failed to setup srng: %d ring_id %d\n", in ath12k_dp_srng_setup()
335 u32 ath12k_dp_tx_get_vdev_bank_config(struct ath12k_base *ab, in ath12k_dp_tx_get_vdev_bank_config() argument
345 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED, &ab->dev_flags)) in ath12k_dp_tx_get_vdev_bank_config()
375 static int ath12k_dp_tx_get_bank_profile(struct ath12k_base *ab, in ath12k_dp_tx_get_bank_profile() argument
385 bank_config = ath12k_dp_tx_get_vdev_bank_config(ab, arvif); in ath12k_dp_tx_get_bank_profile()
404 ath12k_err(ab, "unable to find TX bank!"); in ath12k_dp_tx_get_bank_profile()
417 ath12k_hal_tx_configure_bank_register(ab, bank_config, bank_id); in ath12k_dp_tx_get_bank_profile()
419 ath12k_dbg(ab, ATH12K_DBG_DP_HTT, "dp_htt tcl bank_id %d input 0x%x match 0x%x num_users %u", in ath12k_dp_tx_get_bank_profile()
433 static void ath12k_dp_deinit_bank_profiles(struct ath12k_base *ab) in ath12k_dp_deinit_bank_profiles() argument
435 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_deinit_bank_profiles()
441 static int ath12k_dp_init_bank_profiles(struct ath12k_base *ab) in ath12k_dp_init_bank_profiles() argument
443 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_init_bank_profiles()
444 u32 num_tcl_banks = ab->hw_params->num_tcl_banks; in ath12k_dp_init_bank_profiles()
464 static void ath12k_dp_srng_common_cleanup(struct ath12k_base *ab) in ath12k_dp_srng_common_cleanup() argument
466 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_srng_common_cleanup()
469 ath12k_dp_srng_cleanup(ab, &dp->reo_status_ring); in ath12k_dp_srng_common_cleanup()
470 ath12k_dp_srng_cleanup(ab, &dp->reo_cmd_ring); in ath12k_dp_srng_common_cleanup()
471 ath12k_dp_srng_cleanup(ab, &dp->reo_except_ring); in ath12k_dp_srng_common_cleanup()
472 ath12k_dp_srng_cleanup(ab, &dp->rx_rel_ring); in ath12k_dp_srng_common_cleanup()
473 ath12k_dp_srng_cleanup(ab, &dp->reo_reinject_ring); in ath12k_dp_srng_common_cleanup()
474 for (i = 0; i < ab->hw_params->max_tx_ring; i++) { in ath12k_dp_srng_common_cleanup()
475 ath12k_dp_srng_cleanup(ab, &dp->tx_ring[i].tcl_comp_ring); in ath12k_dp_srng_common_cleanup()
476 ath12k_dp_srng_cleanup(ab, &dp->tx_ring[i].tcl_data_ring); in ath12k_dp_srng_common_cleanup()
478 ath12k_dp_srng_cleanup(ab, &dp->wbm_desc_rel_ring); in ath12k_dp_srng_common_cleanup()
481 static int ath12k_dp_srng_common_setup(struct ath12k_base *ab) in ath12k_dp_srng_common_setup() argument
483 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_srng_common_setup()
489 ret = ath12k_dp_srng_setup(ab, &dp->wbm_desc_rel_ring, in ath12k_dp_srng_common_setup()
493 ath12k_warn(ab, "failed to set up wbm2sw_release ring :%d\n", in ath12k_dp_srng_common_setup()
498 for (i = 0; i < ab->hw_params->max_tx_ring; i++) { in ath12k_dp_srng_common_setup()
499 map = ab->hw_params->hal_ops->tcl_to_wbm_rbm_map; in ath12k_dp_srng_common_setup()
502 ret = ath12k_dp_srng_setup(ab, &dp->tx_ring[i].tcl_data_ring, in ath12k_dp_srng_common_setup()
506 ath12k_warn(ab, "failed to set up tcl_data ring (%d) :%d\n", in ath12k_dp_srng_common_setup()
511 ret = ath12k_dp_srng_setup(ab, &dp->tx_ring[i].tcl_comp_ring, in ath12k_dp_srng_common_setup()
515 ath12k_warn(ab, "failed to set up tcl_comp ring (%d) :%d\n", in ath12k_dp_srng_common_setup()
521 ret = ath12k_dp_srng_setup(ab, &dp->reo_reinject_ring, HAL_REO_REINJECT, in ath12k_dp_srng_common_setup()
524 ath12k_warn(ab, "failed to set up reo_reinject ring :%d\n", in ath12k_dp_srng_common_setup()
529 ret = ath12k_dp_srng_setup(ab, &dp->rx_rel_ring, HAL_WBM2SW_RELEASE, in ath12k_dp_srng_common_setup()
533 ath12k_warn(ab, "failed to set up rx_rel ring :%d\n", ret); in ath12k_dp_srng_common_setup()
537 ret = ath12k_dp_srng_setup(ab, &dp->reo_except_ring, HAL_REO_EXCEPTION, in ath12k_dp_srng_common_setup()
540 ath12k_warn(ab, "failed to set up reo_exception ring :%d\n", in ath12k_dp_srng_common_setup()
545 ret = ath12k_dp_srng_setup(ab, &dp->reo_cmd_ring, HAL_REO_CMD, in ath12k_dp_srng_common_setup()
548 ath12k_warn(ab, "failed to set up reo_cmd ring :%d\n", ret); in ath12k_dp_srng_common_setup()
552 srng = &ab->hal.srng_list[dp->reo_cmd_ring.ring_id]; in ath12k_dp_srng_common_setup()
553 ath12k_hal_reo_init_cmd_ring(ab, srng); in ath12k_dp_srng_common_setup()
555 ret = ath12k_dp_srng_setup(ab, &dp->reo_status_ring, HAL_REO_STATUS, in ath12k_dp_srng_common_setup()
558 ath12k_warn(ab, "failed to set up reo_status ring :%d\n", ret); in ath12k_dp_srng_common_setup()
577 ath12k_hal_reo_hw_setup(ab, ring_hash_map); in ath12k_dp_srng_common_setup()
582 ath12k_dp_srng_common_cleanup(ab); in ath12k_dp_srng_common_setup()
587 static void ath12k_dp_scatter_idle_link_desc_cleanup(struct ath12k_base *ab) in ath12k_dp_scatter_idle_link_desc_cleanup() argument
589 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_scatter_idle_link_desc_cleanup()
597 dma_free_coherent(ab->dev, HAL_WBM_IDLE_SCATTER_BUF_SIZE_MAX, in ath12k_dp_scatter_idle_link_desc_cleanup()
603 static int ath12k_dp_scatter_idle_link_desc_setup(struct ath12k_base *ab, in ath12k_dp_scatter_idle_link_desc_setup() argument
609 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_scatter_idle_link_desc_setup()
624 ath12k_hal_srng_get_entrysize(ab, HAL_WBM_IDLE_LINK); in ath12k_dp_scatter_idle_link_desc_setup()
631 slist[i].vaddr = dma_alloc_coherent(ab->dev, in ath12k_dp_scatter_idle_link_desc_setup()
670 ath12k_hal_setup_link_idle_list(ab, slist, num_scatter_buf, in ath12k_dp_scatter_idle_link_desc_setup()
676 ath12k_dp_scatter_idle_link_desc_cleanup(ab); in ath12k_dp_scatter_idle_link_desc_setup()
682 ath12k_dp_link_desc_bank_free(struct ath12k_base *ab, in ath12k_dp_link_desc_bank_free() argument
689 dma_free_coherent(ab->dev, in ath12k_dp_link_desc_bank_free()
698 static int ath12k_dp_link_desc_bank_alloc(struct ath12k_base *ab, in ath12k_dp_link_desc_bank_alloc() argument
703 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_link_desc_bank_alloc()
713 dma_alloc_coherent(ab->dev, desc_sz, in ath12k_dp_link_desc_bank_alloc()
732 ath12k_dp_link_desc_bank_free(ab, dp->link_desc_banks); in ath12k_dp_link_desc_bank_alloc()
737 void ath12k_dp_link_desc_cleanup(struct ath12k_base *ab, in ath12k_dp_link_desc_cleanup() argument
741 ath12k_dp_link_desc_bank_free(ab, desc_bank); in ath12k_dp_link_desc_cleanup()
744 ath12k_dp_srng_cleanup(ab, ring); in ath12k_dp_link_desc_cleanup()
745 ath12k_dp_scatter_idle_link_desc_cleanup(ab); in ath12k_dp_link_desc_cleanup()
749 static int ath12k_wbm_idle_ring_setup(struct ath12k_base *ab, u32 *n_link_desc) in ath12k_wbm_idle_ring_setup() argument
751 struct ath12k_dp *dp = &ab->dp; in ath12k_wbm_idle_ring_setup()
776 ret = ath12k_dp_srng_setup(ab, &dp->wbm_idle_ring, in ath12k_wbm_idle_ring_setup()
779 ath12k_warn(ab, "failed to setup wbm_idle_ring: %d\n", ret); in ath12k_wbm_idle_ring_setup()
785 int ath12k_dp_link_desc_setup(struct ath12k_base *ab, in ath12k_dp_link_desc_setup() argument
797 enum hal_rx_buf_return_buf_manager rbm = ab->dp.idle_link_rbm; in ath12k_dp_link_desc_setup()
820 ret = ath12k_dp_link_desc_bank_alloc(ab, link_desc_banks, in ath12k_dp_link_desc_setup()
826 entry_sz = ath12k_hal_srng_get_entrysize(ab, ring_type); in ath12k_dp_link_desc_setup()
832 ret = ath12k_dp_scatter_idle_link_desc_setup(ab, tot_mem_sz, in ath12k_dp_link_desc_setup()
837 ath12k_warn(ab, "failed to setup scatting idle list descriptor :%d\n", in ath12k_dp_link_desc_setup()
847 ath12k_hal_srng_access_begin(ab, srng); in ath12k_dp_link_desc_setup()
856 (desc = ath12k_hal_srng_src_get_next_entry(ab, srng))) { in ath12k_dp_link_desc_setup()
864 ath12k_hal_srng_access_end(ab, srng); in ath12k_dp_link_desc_setup()
871 ath12k_dp_link_desc_bank_free(ab, link_desc_banks); in ath12k_dp_link_desc_setup()
876 int ath12k_dp_service_srng(struct ath12k_base *ab, in ath12k_dp_service_srng() argument
888 if (ab->hw_params->ring_mask->tx[grp_id]) { in ath12k_dp_service_srng()
889 i = fls(ab->hw_params->ring_mask->tx[grp_id]) - 1; in ath12k_dp_service_srng()
890 ath12k_dp_tx_completion_handler(ab, i); in ath12k_dp_service_srng()
893 if (ab->hw_params->ring_mask->rx_err[grp_id]) { in ath12k_dp_service_srng()
894 work_done = ath12k_dp_rx_process_err(ab, napi, budget); in ath12k_dp_service_srng()
901 if (ab->hw_params->ring_mask->rx_wbm_rel[grp_id]) { in ath12k_dp_service_srng()
902 work_done = ath12k_dp_rx_process_wbm_err(ab, in ath12k_dp_service_srng()
912 if (ab->hw_params->ring_mask->rx[grp_id]) { in ath12k_dp_service_srng()
913 i = fls(ab->hw_params->ring_mask->rx[grp_id]) - 1; in ath12k_dp_service_srng()
914 work_done = ath12k_dp_rx_process(ab, i, napi, in ath12k_dp_service_srng()
922 if (ab->hw_params->ring_mask->rx_mon_dest[grp_id]) { in ath12k_dp_service_srng()
924 ring_mask = ab->hw_params->ring_mask->rx_mon_dest[grp_id]; in ath12k_dp_service_srng()
925 for (i = 0; i < ab->num_radios; i++) { in ath12k_dp_service_srng()
926 for (j = 0; j < ab->hw_params->num_rxdma_per_pdev; j++) { in ath12k_dp_service_srng()
927 int id = i * ab->hw_params->num_rxdma_per_pdev + j; in ath12k_dp_service_srng()
931 ath12k_dp_mon_process_ring(ab, id, napi, budget, in ath12k_dp_service_srng()
943 if (ab->hw_params->ring_mask->tx_mon_dest[grp_id]) { in ath12k_dp_service_srng()
945 ring_mask = ab->hw_params->ring_mask->tx_mon_dest[grp_id]; in ath12k_dp_service_srng()
946 for (i = 0; i < ab->num_radios; i++) { in ath12k_dp_service_srng()
947 for (j = 0; j < ab->hw_params->num_rxdma_per_pdev; j++) { in ath12k_dp_service_srng()
948 int id = i * ab->hw_params->num_rxdma_per_pdev + j; in ath12k_dp_service_srng()
952 ath12k_dp_mon_process_ring(ab, id, napi, budget, in ath12k_dp_service_srng()
964 if (ab->hw_params->ring_mask->reo_status[grp_id]) in ath12k_dp_service_srng()
965 ath12k_dp_rx_process_reo_status(ab); in ath12k_dp_service_srng()
967 if (ab->hw_params->ring_mask->host2rxdma[grp_id]) { in ath12k_dp_service_srng()
968 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_service_srng()
972 ath12k_dp_rx_bufs_replenish(ab, rx_ring, &list, 0); in ath12k_dp_service_srng()
981 void ath12k_dp_pdev_free(struct ath12k_base *ab) in ath12k_dp_pdev_free() argument
985 if (!ab->mon_reap_timer.function) in ath12k_dp_pdev_free()
988 del_timer_sync(&ab->mon_reap_timer); in ath12k_dp_pdev_free()
990 for (i = 0; i < ab->num_radios; i++) in ath12k_dp_pdev_free()
991 ath12k_dp_rx_pdev_free(ab, i); in ath12k_dp_pdev_free()
1004 bool ath12k_dp_wmask_compaction_rx_tlv_supported(struct ath12k_base *ab) in ath12k_dp_wmask_compaction_rx_tlv_supported() argument
1006 if (test_bit(WMI_TLV_SERVICE_WMSK_COMPACTION_RX_TLVS, ab->wmi_ab.svc_map) && in ath12k_dp_wmask_compaction_rx_tlv_supported()
1007 ab->hw_params->hal_ops->rxdma_ring_wmask_rx_mpdu_start && in ath12k_dp_wmask_compaction_rx_tlv_supported()
1008 ab->hw_params->hal_ops->rxdma_ring_wmask_rx_msdu_end && in ath12k_dp_wmask_compaction_rx_tlv_supported()
1009 ab->hw_params->hal_ops->get_hal_rx_compact_ops) { in ath12k_dp_wmask_compaction_rx_tlv_supported()
1015 void ath12k_dp_hal_rx_desc_init(struct ath12k_base *ab) in ath12k_dp_hal_rx_desc_init() argument
1017 if (ath12k_dp_wmask_compaction_rx_tlv_supported(ab)) { in ath12k_dp_hal_rx_desc_init()
1021 ab->hal_rx_ops = ab->hw_params->hal_ops->get_hal_rx_compact_ops(); in ath12k_dp_hal_rx_desc_init()
1023 ab->hal.hal_desc_sz = in ath12k_dp_hal_rx_desc_init()
1024 ab->hal_rx_ops->rx_desc_get_desc_size(); in ath12k_dp_hal_rx_desc_init()
1029 struct ath12k_base *ab = from_timer(ab, t, mon_reap_timer); in ath12k_dp_service_mon_ring() local
1032 for (i = 0; i < ab->hw_params->num_rxdma_per_pdev; i++) in ath12k_dp_service_mon_ring()
1033 ath12k_dp_mon_process_ring(ab, i, NULL, DP_MON_SERVICE_BUDGET, in ath12k_dp_service_mon_ring()
1036 mod_timer(&ab->mon_reap_timer, jiffies + in ath12k_dp_service_mon_ring()
1040 static void ath12k_dp_mon_reap_timer_init(struct ath12k_base *ab) in ath12k_dp_mon_reap_timer_init() argument
1042 if (ab->hw_params->rxdma1_enable) in ath12k_dp_mon_reap_timer_init()
1045 timer_setup(&ab->mon_reap_timer, ath12k_dp_service_mon_ring, 0); in ath12k_dp_mon_reap_timer_init()
1048 int ath12k_dp_pdev_alloc(struct ath12k_base *ab) in ath12k_dp_pdev_alloc() argument
1054 ret = ath12k_dp_rx_htt_setup(ab); in ath12k_dp_pdev_alloc()
1058 ath12k_dp_mon_reap_timer_init(ab); in ath12k_dp_pdev_alloc()
1061 for (i = 0; i < ab->num_radios; i++) { in ath12k_dp_pdev_alloc()
1062 ar = ab->pdevs[i].ar; in ath12k_dp_pdev_alloc()
1063 ret = ath12k_dp_rx_pdev_alloc(ab, i); in ath12k_dp_pdev_alloc()
1065 ath12k_warn(ab, "failed to allocate pdev rx for pdev_id :%d\n", in ath12k_dp_pdev_alloc()
1071 ath12k_warn(ab, "failed to initialize mon pdev %d\n", i); in ath12k_dp_pdev_alloc()
1078 ath12k_dp_pdev_free(ab); in ath12k_dp_pdev_alloc()
1095 status = ath12k_htc_connect_service(&dp->ab->htc, &conn_req, in ath12k_dp_htt_connect()
1129 struct ath12k_base *ab = ar->ab; in ath12k_dp_vdev_tx_attach() local
1142 arvif->bank_id = ath12k_dp_tx_get_bank_profile(ab, arvif, &ab->dp); in ath12k_dp_vdev_tx_attach()
1146 ath12k_err(ar->ab, "Failed to initialize DP TX Banks"); in ath12k_dp_vdev_tx_attach()
1151 static void ath12k_dp_cc_cleanup(struct ath12k_base *ab) in ath12k_dp_cc_cleanup() argument
1155 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_cleanup()
1181 dma_unmap_single(ab->dev, ATH12K_SKB_RXCB(skb)->paddr, in ath12k_dp_cc_cleanup()
1212 if (!(test_bit(ATH12K_FLAG_UNREGISTERING, &ab->dev_flags))) { in ath12k_dp_cc_cleanup()
1220 dma_unmap_single(ab->dev, ATH12K_SKB_CB(skb)->paddr, in ath12k_dp_cc_cleanup()
1248 dma_free_coherent(ab->dev, ATH12K_PAGE_SIZE, in ath12k_dp_cc_cleanup()
1257 static void ath12k_dp_reoq_lut_cleanup(struct ath12k_base *ab) in ath12k_dp_reoq_lut_cleanup() argument
1259 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_reoq_lut_cleanup()
1261 if (!ab->hw_params->reoq_lut_support) in ath12k_dp_reoq_lut_cleanup()
1265 ath12k_hif_write32(ab, in ath12k_dp_reoq_lut_cleanup()
1267 HAL_REO1_QDESC_LUT_BASE0(ab), 0); in ath12k_dp_reoq_lut_cleanup()
1268 dma_free_coherent(ab->dev, DP_REOQ_LUT_SIZE, in ath12k_dp_reoq_lut_cleanup()
1274 ath12k_hif_write32(ab, in ath12k_dp_reoq_lut_cleanup()
1276 HAL_REO1_QDESC_LUT_BASE1(ab), 0); in ath12k_dp_reoq_lut_cleanup()
1277 dma_free_coherent(ab->dev, DP_REOQ_LUT_SIZE, in ath12k_dp_reoq_lut_cleanup()
1283 void ath12k_dp_free(struct ath12k_base *ab) in ath12k_dp_free() argument
1285 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_free()
1288 if (!dp->ab) in ath12k_dp_free()
1291 ath12k_dp_link_desc_cleanup(ab, dp->link_desc_banks, in ath12k_dp_free()
1294 ath12k_dp_cc_cleanup(ab); in ath12k_dp_free()
1295 ath12k_dp_reoq_lut_cleanup(ab); in ath12k_dp_free()
1296 ath12k_dp_deinit_bank_profiles(ab); in ath12k_dp_free()
1297 ath12k_dp_srng_common_cleanup(ab); in ath12k_dp_free()
1299 ath12k_dp_rx_reo_cmd_list_cleanup(ab); in ath12k_dp_free()
1301 for (i = 0; i < ab->hw_params->max_tx_ring; i++) { in ath12k_dp_free()
1306 ath12k_dp_rx_free(ab); in ath12k_dp_free()
1308 dp->ab = NULL; in ath12k_dp_free()
1311 void ath12k_dp_cc_config(struct ath12k_base *ab) in ath12k_dp_cc_config() argument
1313 u32 cmem_base = ab->qmi.dev_mem[ATH12K_QMI_DEVMEM_CMEM_INDEX].start; in ath12k_dp_cc_config()
1318 ath12k_hif_write32(ab, reo_base + HAL_REO1_SW_COOKIE_CFG0(ab), cmem_base); in ath12k_dp_cc_config()
1330 ath12k_hif_write32(ab, reo_base + HAL_REO1_SW_COOKIE_CFG1(ab), val); in ath12k_dp_cc_config()
1333 ath12k_hif_write32(ab, wbm_base + HAL_WBM_SW_COOKIE_CFG0, cmem_base); in ath12k_dp_cc_config()
1343 ath12k_hif_write32(ab, wbm_base + HAL_WBM_SW_COOKIE_CFG1, val); in ath12k_dp_cc_config()
1346 val = ath12k_hif_read32(ab, wbm_base + HAL_WBM_SW_COOKIE_CFG2); in ath12k_dp_cc_config()
1351 ath12k_hif_write32(ab, wbm_base + HAL_WBM_SW_COOKIE_CFG2, val); in ath12k_dp_cc_config()
1354 val = ath12k_hif_read32(ab, wbm_base + HAL_WBM_SW_COOKIE_CONVERT_CFG); in ath12k_dp_cc_config()
1356 ab->hw_params->hal_params->wbm2sw_cc_enable; in ath12k_dp_cc_config()
1358 ath12k_hif_write32(ab, wbm_base + HAL_WBM_SW_COOKIE_CONVERT_CFG, val); in ath12k_dp_cc_config()
1366 static inline void *ath12k_dp_cc_get_desc_addr_ptr(struct ath12k_base *ab, in ath12k_dp_cc_get_desc_addr_ptr() argument
1369 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_get_desc_addr_ptr()
1374 struct ath12k_rx_desc_info *ath12k_dp_get_rx_desc(struct ath12k_base *ab, in ath12k_dp_get_rx_desc() argument
1377 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_get_rx_desc()
1393 desc_addr_ptr = ath12k_dp_cc_get_desc_addr_ptr(ab, ppt_idx, spt_idx); in ath12k_dp_get_rx_desc()
1398 struct ath12k_tx_desc_info *ath12k_dp_get_tx_desc(struct ath12k_base *ab, in ath12k_dp_get_tx_desc() argument
1416 desc_addr_ptr = ath12k_dp_cc_get_desc_addr_ptr(ab, ppt_idx, spt_idx); in ath12k_dp_get_tx_desc()
1421 static int ath12k_dp_cc_desc_init(struct ath12k_base *ab) in ath12k_dp_cc_desc_init() argument
1423 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_desc_init()
1448 rx_descs[j].device_id = ab->device_id; in ath12k_dp_cc_desc_init()
1452 rx_desc_addr = ath12k_dp_cc_get_desc_addr_ptr(ab, ppt_idx, j); in ath12k_dp_cc_desc_init()
1484 ath12k_dp_cc_get_desc_addr_ptr(ab, ppt_idx, j); in ath12k_dp_cc_desc_init()
1493 static int ath12k_dp_cmem_init(struct ath12k_base *ab, in ath12k_dp_cmem_init() argument
1500 cmem_base = ab->qmi.dev_mem[ATH12K_QMI_DEVMEM_CMEM_INDEX].start; in ath12k_dp_cmem_init()
1513 ath12k_err(ab, "invalid descriptor type %d in cmem init\n", type); in ath12k_dp_cmem_init()
1519 ath12k_hif_write32(ab, cmem_base + ATH12K_PPT_ADDR_OFFSET(i), in ath12k_dp_cmem_init()
1525 void ath12k_dp_partner_cc_init(struct ath12k_base *ab) in ath12k_dp_partner_cc_init() argument
1527 struct ath12k_hw_group *ag = ab->ag; in ath12k_dp_partner_cc_init()
1531 if (ag->ab[i] == ab) in ath12k_dp_partner_cc_init()
1534 ath12k_dp_cmem_init(ab, &ag->ab[i]->dp, ATH12K_DP_RX_DESC); in ath12k_dp_partner_cc_init()
1538 static int ath12k_dp_cc_init(struct ath12k_base *ab) in ath12k_dp_cc_init() argument
1540 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_cc_init()
1560 ath12k_warn(ab, "SPT page allocation failure"); in ath12k_dp_cc_init()
1564 dp->rx_ppt_base = ab->device_id * ATH12K_NUM_RX_SPT_PAGES; in ath12k_dp_cc_init()
1567 dp->spt_info[i].vaddr = dma_alloc_coherent(ab->dev, in ath12k_dp_cc_init()
1578 ath12k_warn(ab, "SPT allocated memory is not 4K aligned"); in ath12k_dp_cc_init()
1584 ret = ath12k_dp_cmem_init(ab, dp, ATH12K_DP_TX_DESC); in ath12k_dp_cc_init()
1586 ath12k_warn(ab, "HW CC Tx cmem init failed %d", ret); in ath12k_dp_cc_init()
1590 ret = ath12k_dp_cmem_init(ab, dp, ATH12K_DP_RX_DESC); in ath12k_dp_cc_init()
1592 ath12k_warn(ab, "HW CC Rx cmem init failed %d", ret); in ath12k_dp_cc_init()
1596 ret = ath12k_dp_cc_desc_init(ab); in ath12k_dp_cc_init()
1598 ath12k_warn(ab, "HW CC desc init failed %d", ret); in ath12k_dp_cc_init()
1604 ath12k_dp_cc_cleanup(ab); in ath12k_dp_cc_init()
1608 static int ath12k_dp_reoq_lut_setup(struct ath12k_base *ab) in ath12k_dp_reoq_lut_setup() argument
1610 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_reoq_lut_setup()
1612 if (!ab->hw_params->reoq_lut_support) in ath12k_dp_reoq_lut_setup()
1615 dp->reoq_lut.vaddr = dma_alloc_coherent(ab->dev, in ath12k_dp_reoq_lut_setup()
1620 ath12k_warn(ab, "failed to allocate memory for reoq table"); in ath12k_dp_reoq_lut_setup()
1624 dp->ml_reoq_lut.vaddr = dma_alloc_coherent(ab->dev, in ath12k_dp_reoq_lut_setup()
1629 ath12k_warn(ab, "failed to allocate memory for ML reoq table"); in ath12k_dp_reoq_lut_setup()
1630 dma_free_coherent(ab->dev, DP_REOQ_LUT_SIZE, in ath12k_dp_reoq_lut_setup()
1636 ath12k_hif_write32(ab, HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_QDESC_LUT_BASE0(ab), in ath12k_dp_reoq_lut_setup()
1638 ath12k_hif_write32(ab, HAL_SEQ_WCSS_UMAC_REO_REG + HAL_REO1_QDESC_LUT_BASE1(ab), in ath12k_dp_reoq_lut_setup()
1645 ath12k_dp_get_idle_link_rbm(struct ath12k_base *ab) in ath12k_dp_get_idle_link_rbm() argument
1647 switch (ab->device_id) { in ath12k_dp_get_idle_link_rbm()
1655 ath12k_warn(ab, "invalid %d device id, so choose default rbm\n", in ath12k_dp_get_idle_link_rbm()
1656 ab->device_id); in ath12k_dp_get_idle_link_rbm()
1662 int ath12k_dp_alloc(struct ath12k_base *ab) in ath12k_dp_alloc() argument
1664 struct ath12k_dp *dp = &ab->dp; in ath12k_dp_alloc()
1671 dp->ab = ab; in ath12k_dp_alloc()
1678 dp->idle_link_rbm = ath12k_dp_get_idle_link_rbm(ab); in ath12k_dp_alloc()
1680 ret = ath12k_wbm_idle_ring_setup(ab, &n_link_desc); in ath12k_dp_alloc()
1682 ath12k_warn(ab, "failed to setup wbm_idle_ring: %d\n", ret); in ath12k_dp_alloc()
1686 srng = &ab->hal.srng_list[dp->wbm_idle_ring.ring_id]; in ath12k_dp_alloc()
1688 ret = ath12k_dp_link_desc_setup(ab, dp->link_desc_banks, in ath12k_dp_alloc()
1691 ath12k_warn(ab, "failed to setup link desc: %d\n", ret); in ath12k_dp_alloc()
1695 ret = ath12k_dp_cc_init(ab); in ath12k_dp_alloc()
1698 ath12k_warn(ab, "failed to setup cookie converter %d\n", ret); in ath12k_dp_alloc()
1701 ret = ath12k_dp_init_bank_profiles(ab); in ath12k_dp_alloc()
1703 ath12k_warn(ab, "failed to setup bank profiles %d\n", ret); in ath12k_dp_alloc()
1707 ret = ath12k_dp_srng_common_setup(ab); in ath12k_dp_alloc()
1713 ret = ath12k_dp_reoq_lut_setup(ab); in ath12k_dp_alloc()
1715 ath12k_warn(ab, "failed to setup reoq table %d\n", ret); in ath12k_dp_alloc()
1719 for (i = 0; i < ab->hw_params->max_tx_ring; i++) { in ath12k_dp_alloc()
1735 ath12k_hal_tx_set_dscp_tid_map(ab, i); in ath12k_dp_alloc()
1737 ret = ath12k_dp_rx_alloc(ab); in ath12k_dp_alloc()
1746 ath12k_dp_rx_free(ab); in ath12k_dp_alloc()
1749 ath12k_dp_reoq_lut_cleanup(ab); in ath12k_dp_alloc()
1752 ath12k_dp_srng_common_cleanup(ab); in ath12k_dp_alloc()
1755 ath12k_dp_deinit_bank_profiles(ab); in ath12k_dp_alloc()
1758 ath12k_dp_cc_cleanup(ab); in ath12k_dp_alloc()
1761 ath12k_dp_link_desc_cleanup(ab, dp->link_desc_banks, in ath12k_dp_alloc()