30 #define PHY_EDPD_CONFIG_EXT_CROSSOVER_	0x0001
34 #define SPECIAL_CTRL_STS_OVRRD_AMDIX_	0x8000
35 #define SPECIAL_CTRL_STS_AMDIX_ENABLE_	0x4000
36 #define SPECIAL_CTRL_STS_AMDIX_STATE_	0x2000
63 	return rc < 0 ? rc : 0;  in smsc_phy_ack_interrupt()
78 		rc = phy_write(phydev, MII_LAN83C185_IM, 0);  in smsc_phy_config_intr()
85 	return rc < 0 ? rc : 0;  in smsc_phy_config_intr()
106 	if (irq_status < 0) {  in smsc_phy_handle_interrupt()
127 		return 0;  in smsc_phy_config_init()
140 	if (rc < 0)  in smsc_phy_reset()
177 	if (rc < 0)  in lan87xx_config_aneg()
192 	if (phydev->phy_id == 0x0007c0f0) { /* LAN9500A or LAN9505A */  in lan95xx_config_aneg_ext()
197 		if (rc < 0)  in lan95xx_config_aneg_ext()
231 		if (rc < 0)  in lan87xx_read_status()
236 		if (rc < 0)  in lan87xx_read_status()
243 				  rc & MII_LAN83C185_ENERGYON || rc < 0,  in lan87xx_read_status()
246 		if (rc < 0)  in lan87xx_read_status()
251 		if (rc < 0)  in lan87xx_read_status()
256 		if (rc < 0)  in lan87xx_read_status()
282 	if (rc < 0)  in lan874x_phy_config_init()
288 	if (rc < 0)  in lan874x_phy_config_init()
302 	wol->wolopts = 0;  in lan874x_get_wol()
305 	if (rc < 0)  in lan874x_get_wol()
327 	return bitrev16(crc16(0xFFFF, buffer, len));  in smsc_crc16()
334 	int ret = 0;  in lan874x_chk_wol_pattern()
345 	i = 0;  in lan874x_chk_wol_pattern()
346 	k = 0;  in lan874x_chk_wol_pattern()
347 	while (len > 0) {  in lan874x_chk_wol_pattern()
349 		for (j = 0; j < 16; j++, i++, len--) {  in lan874x_chk_wol_pattern()
378 	if (rc < 0)  in lan874x_set_wol_pattern()
384 	if (rc < 0)  in lan874x_set_wol_pattern()
387 	masklen = (masklen + 15) & ~0xf;  in lan874x_set_wol_pattern()
391 		if (rc < 0)  in lan874x_set_wol_pattern()
400 		phy_write_mmd(phydev, MDIO_MMD_PCS, reg, 0);  in lan874x_set_wol_pattern()
425 	if (rc < 0)  in lan874x_set_wol()
452 		const u8 pattern[2] = { 0x08, 0x06 };  in lan874x_set_wol()
453 		const u16 mask[1] = { 0x0003 };  in lan874x_set_wol()
466 		if (rc < 0)  in lan874x_set_wol()
474 		rc = lan874x_set_wol_pattern(phydev, val, data, 0, NULL, 0);  in lan874x_set_wol()
475 		if (rc < 0)  in lan874x_set_wol()
485 		for (i = 0; i < 6; i += 2, reg--) {  in lan874x_set_wol()
488 			if (rc < 0)  in lan874x_set_wol()
495 	if (rc < 0)  in lan874x_set_wol()
498 	return 0;  in lan874x_set_wol()
510 	for (i = 0; i < ARRAY_SIZE(smsc_hw_stats); i++)  in smsc_get_strings()
521 	if (val < 0)  in smsc_get_stat()
534 	for (i = 0; i < ARRAY_SIZE(smsc_hw_stats); i++)  in smsc_get_stats()
552 	return 0;  in smsc_phy_get_edpd()
568 		priv->edpd_max_wait_ms = 0;  in smsc_phy_set_edpd()
636 	return 0;  in smsc_phy_probe()
642 	.phy_id		= 0x0007c0a0, /* OUI=0x00800f, Model#=0x0a */
643 	.phy_id_mask	= 0xfffffff0,
661 	.phy_id		= 0x0007c0b0, /* OUI=0x00800f, Model#=0x0b */
662 	.phy_id_mask	= 0xfffffff0,
685 	/* This covers internal PHY (phy_id: 0x0007C0C3) for
686 	 * LAN9500 (PID: 0x9500), LAN9514 (PID: 0xec00), LAN9505 (PID: 0x9505)
688 	.phy_id		= 0x0007c0c0, /* OUI=0x00800f, Model#=0x0c */
689 	.phy_id_mask	= 0xfffffff0,
717 	.phy_id		= 0x0007c0d0, /* OUI=0x00800f, Model#=0x0d */
718 	.phy_id_mask	= 0xfffffff0,
732 	/* This covers internal PHY (phy_id: 0x0007C0F0) for
733 	 * LAN9500A (PID: 0x9E00), LAN9505A (PID: 0x9E01)
735 	.phy_id		= 0x0007c0f0, /* OUI=0x00800f, Model#=0x0f */
736 	.phy_id_mask	= 0xfffffff0,
764 	.phy_id		= 0x0007c110,
765 	.phy_id_mask	= 0xfffffff0,
797 	.phy_id		= 0x0007c130,	/* 0x0007c130 and 0x0007c131 */
798 	/* This mask (0xfffffff2) is to differentiate from
799 	 * LAN88xx (phy_id 0x0007c132)
802 	.phy_id_mask	= 0xfffffff2,
842 	{ 0x0007c0a0, 0xfffffff0 },
843 	{ 0x0007c0b0, 0xfffffff0 },
844 	{ 0x0007c0c0, 0xfffffff0 },
845 	{ 0x0007c0d0, 0xfffffff0 },
846 	{ 0x0007c0f0, 0xfffffff0 },
847 	{ 0x0007c110, 0xfffffff0 },
848 	{ 0x0007c130, 0xfffffff2 },