Lines Matching full:val
19 int val; in genphy_c45_baset1_able() local
22 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_EXTABLE); in genphy_c45_baset1_able()
23 if (val < 0) in genphy_c45_baset1_able()
26 phydev->pma_extable = val; in genphy_c45_baset1_able()
399 int val; in genphy_c45_aneg_done() local
404 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in genphy_c45_aneg_done()
406 return val < 0 ? val : val & MDIO_AN_STAT1_COMPLETE ? 1 : 0; in genphy_c45_aneg_done()
421 int val, devad; in genphy_c45_read_link() local
425 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in genphy_c45_read_link()
426 if (val < 0) in genphy_c45_read_link()
427 return val; in genphy_c45_read_link()
432 if (val & MDIO_AN_CTRL1_RESTART) { in genphy_c45_read_link()
448 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link()
449 if (val < 0) in genphy_c45_read_link()
450 return val; in genphy_c45_read_link()
451 else if (val & MDIO_STAT1_LSTATUS) in genphy_c45_read_link()
455 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link()
456 if (val < 0) in genphy_c45_read_link()
457 return val; in genphy_c45_read_link()
459 if (!(val & MDIO_STAT1_LSTATUS)) in genphy_c45_read_link()
476 int val; in genphy_c45_baset1_read_lpa() local
478 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_STAT); in genphy_c45_baset1_read_lpa()
479 if (val < 0) in genphy_c45_baset1_read_lpa()
480 return val; in genphy_c45_baset1_read_lpa()
482 if (!(val & MDIO_AN_STAT1_COMPLETE)) { in genphy_c45_baset1_read_lpa()
495 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_LP_L); in genphy_c45_baset1_read_lpa()
496 if (val < 0) in genphy_c45_baset1_read_lpa()
497 return val; in genphy_c45_baset1_read_lpa()
499 mii_t1_adv_l_mod_linkmode_t(phydev->lp_advertising, val); in genphy_c45_baset1_read_lpa()
500 phydev->pause = val & MDIO_AN_T1_ADV_L_PAUSE_CAP ? 1 : 0; in genphy_c45_baset1_read_lpa()
501 phydev->asym_pause = val & MDIO_AN_T1_ADV_L_PAUSE_ASYM ? 1 : 0; in genphy_c45_baset1_read_lpa()
503 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_LP_M); in genphy_c45_baset1_read_lpa()
504 if (val < 0) in genphy_c45_baset1_read_lpa()
505 return val; in genphy_c45_baset1_read_lpa()
507 mii_t1_adv_m_mod_linkmode_t(phydev->lp_advertising, val); in genphy_c45_baset1_read_lpa()
524 int val; in genphy_c45_read_lpa() local
529 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in genphy_c45_read_lpa()
530 if (val < 0) in genphy_c45_read_lpa()
531 return val; in genphy_c45_read_lpa()
533 if (!(val & MDIO_AN_STAT1_COMPLETE)) { in genphy_c45_read_lpa()
545 val & MDIO_AN_STAT1_LPABLE); in genphy_c45_read_lpa()
548 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_LPA); in genphy_c45_read_lpa()
549 if (val < 0) in genphy_c45_read_lpa()
550 return val; in genphy_c45_read_lpa()
552 mii_adv_mod_linkmode_adv_t(phydev->lp_advertising, val); in genphy_c45_read_lpa()
553 phydev->pause = val & LPA_PAUSE_CAP ? 1 : 0; in genphy_c45_read_lpa()
554 phydev->asym_pause = val & LPA_PAUSE_ASYM ? 1 : 0; in genphy_c45_read_lpa()
557 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT); in genphy_c45_read_lpa()
558 if (val < 0) in genphy_c45_read_lpa()
559 return val; in genphy_c45_read_lpa()
561 mii_10gbt_stat_mod_linkmode_lpa_t(phydev->lp_advertising, val); in genphy_c45_read_lpa()
574 int val; in genphy_c45_pma_baset1_read_master_slave() local
579 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_PMD_BT1_CTRL); in genphy_c45_pma_baset1_read_master_slave()
580 if (val < 0) in genphy_c45_pma_baset1_read_master_slave()
581 return val; in genphy_c45_pma_baset1_read_master_slave()
583 if (val & MDIO_PMA_PMD_BT1_CTRL_CFG_MST) { in genphy_c45_pma_baset1_read_master_slave()
601 int val; in genphy_c45_read_pma() local
605 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1); in genphy_c45_read_pma()
606 if (val < 0) in genphy_c45_read_pma()
607 return val; in genphy_c45_read_pma()
609 switch (val & MDIO_CTRL1_SPEEDSEL) { in genphy_c45_read_pma()
636 val = genphy_c45_pma_baset1_read_master_slave(phydev); in genphy_c45_read_pma()
637 if (val < 0) in genphy_c45_read_pma()
638 return val; in genphy_c45_read_pma()
651 int val; in genphy_c45_read_mdix() local
654 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in genphy_c45_read_mdix()
656 if (val < 0) in genphy_c45_read_mdix()
657 return val; in genphy_c45_read_mdix()
659 switch (val) { in genphy_c45_read_mdix()
687 int val, changed = 0; in genphy_c45_write_eee_adv() local
692 val = linkmode_to_mii_eee_cap1_t(tmp); in genphy_c45_write_eee_adv()
697 val = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, in genphy_c45_write_eee_adv()
702 val); in genphy_c45_write_eee_adv()
703 if (val < 0) in genphy_c45_write_eee_adv()
704 return val; in genphy_c45_write_eee_adv()
705 if (val > 0) in genphy_c45_write_eee_adv()
710 val = linkmode_to_mii_eee_cap2_t(tmp); in genphy_c45_write_eee_adv()
715 val = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, in genphy_c45_write_eee_adv()
718 val); in genphy_c45_write_eee_adv()
719 if (val < 0) in genphy_c45_write_eee_adv()
720 return val; in genphy_c45_write_eee_adv()
721 if (val > 0) in genphy_c45_write_eee_adv()
727 val = linkmode_adv_to_mii_10base_t1_t(adv); in genphy_c45_write_eee_adv()
731 val = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, in genphy_c45_write_eee_adv()
734 val); in genphy_c45_write_eee_adv()
735 if (val < 0) in genphy_c45_write_eee_adv()
736 return val; in genphy_c45_write_eee_adv()
737 if (val > 0) in genphy_c45_write_eee_adv()
751 int val; in genphy_c45_read_eee_adv() local
757 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV); in genphy_c45_read_eee_adv()
758 if (val < 0) in genphy_c45_read_eee_adv()
759 return val; in genphy_c45_read_eee_adv()
761 mii_eee_cap1_mod_linkmode_t(adv, val); in genphy_c45_read_eee_adv()
768 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV2); in genphy_c45_read_eee_adv()
769 if (val < 0) in genphy_c45_read_eee_adv()
770 return val; in genphy_c45_read_eee_adv()
772 mii_eee_cap2_mod_linkmode_adv_t(adv, val); in genphy_c45_read_eee_adv()
780 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10BT1_AN_CTRL); in genphy_c45_read_eee_adv()
781 if (val < 0) in genphy_c45_read_eee_adv()
782 return val; in genphy_c45_read_eee_adv()
784 mii_10base_t1_adv_mod_linkmode_t(adv, val); in genphy_c45_read_eee_adv()
798 int val; in genphy_c45_read_eee_lpa() local
804 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE); in genphy_c45_read_eee_lpa()
805 if (val < 0) in genphy_c45_read_eee_lpa()
806 return val; in genphy_c45_read_eee_lpa()
808 mii_eee_cap1_mod_linkmode_t(lpa, val); in genphy_c45_read_eee_lpa()
815 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE2); in genphy_c45_read_eee_lpa()
816 if (val < 0) in genphy_c45_read_eee_lpa()
817 return val; in genphy_c45_read_eee_lpa()
819 mii_eee_cap2_mod_linkmode_adv_t(lpa, val); in genphy_c45_read_eee_lpa()
827 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10BT1_AN_STAT); in genphy_c45_read_eee_lpa()
828 if (val < 0) in genphy_c45_read_eee_lpa()
829 return val; in genphy_c45_read_eee_lpa()
831 mii_10base_t1_adv_mod_linkmode_t(lpa, val); in genphy_c45_read_eee_lpa()
843 int val; in genphy_c45_read_eee_cap1() local
848 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE); in genphy_c45_read_eee_cap1()
849 if (val < 0) in genphy_c45_read_eee_cap1()
850 return val; in genphy_c45_read_eee_cap1()
857 if (val == 0xffff) in genphy_c45_read_eee_cap1()
860 mii_eee_cap1_mod_linkmode_t(phydev->supported_eee, val); in genphy_c45_read_eee_cap1()
877 int val; in genphy_c45_read_eee_cap2() local
882 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE2); in genphy_c45_read_eee_cap2()
883 if (val < 0) in genphy_c45_read_eee_cap2()
884 return val; in genphy_c45_read_eee_cap2()
887 if (val == 0xffff) in genphy_c45_read_eee_cap2()
890 mii_eee_cap2_mod_linkmode_sup_t(phydev->supported_eee, val); in genphy_c45_read_eee_cap2()
901 int val; in genphy_c45_read_eee_abilities() local
908 val = genphy_c45_read_eee_cap1(phydev); in genphy_c45_read_eee_abilities()
909 if (val) in genphy_c45_read_eee_abilities()
910 return val; in genphy_c45_read_eee_abilities()
915 val = genphy_c45_read_eee_cap2(phydev); in genphy_c45_read_eee_abilities()
916 if (val) in genphy_c45_read_eee_abilities()
917 return val; in genphy_c45_read_eee_abilities()
925 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10T1L_STAT); in genphy_c45_read_eee_abilities()
926 if (val < 0) in genphy_c45_read_eee_abilities()
927 return val; in genphy_c45_read_eee_abilities()
931 val & MDIO_PMA_10T1L_STAT_EEE); in genphy_c45_read_eee_abilities()
962 int val; in genphy_c45_pma_baset1_read_abilities() local
964 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_PMD_BT1); in genphy_c45_pma_baset1_read_abilities()
965 if (val < 0) in genphy_c45_pma_baset1_read_abilities()
966 return val; in genphy_c45_pma_baset1_read_abilities()
970 val & MDIO_PMA_PMD_BT1_B10L_ABLE); in genphy_c45_pma_baset1_read_abilities()
974 val & MDIO_PMA_PMD_BT1_B100_ABLE); in genphy_c45_pma_baset1_read_abilities()
978 val & MDIO_PMA_PMD_BT1_B1000_ABLE); in genphy_c45_pma_baset1_read_abilities()
980 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_STAT); in genphy_c45_pma_baset1_read_abilities()
981 if (val < 0) in genphy_c45_pma_baset1_read_abilities()
982 return val; in genphy_c45_pma_baset1_read_abilities()
986 val & MDIO_AN_STAT1_ABLE); in genphy_c45_pma_baset1_read_abilities()
1001 int val; in genphy_c45_pma_read_ext_abilities() local
1003 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_EXTABLE); in genphy_c45_pma_read_ext_abilities()
1004 if (val < 0) in genphy_c45_pma_read_ext_abilities()
1005 return val; in genphy_c45_pma_read_ext_abilities()
1009 val & MDIO_PMA_EXTABLE_10GBLRM); in genphy_c45_pma_read_ext_abilities()
1012 val & MDIO_PMA_EXTABLE_10GBT); in genphy_c45_pma_read_ext_abilities()
1015 val & MDIO_PMA_EXTABLE_10GBKX4); in genphy_c45_pma_read_ext_abilities()
1018 val & MDIO_PMA_EXTABLE_10GBKR); in genphy_c45_pma_read_ext_abilities()
1021 val & MDIO_PMA_EXTABLE_1000BT); in genphy_c45_pma_read_ext_abilities()
1024 val & MDIO_PMA_EXTABLE_1000BKX); in genphy_c45_pma_read_ext_abilities()
1028 val & MDIO_PMA_EXTABLE_100BTX); in genphy_c45_pma_read_ext_abilities()
1031 val & MDIO_PMA_EXTABLE_100BTX); in genphy_c45_pma_read_ext_abilities()
1035 val & MDIO_PMA_EXTABLE_10BT); in genphy_c45_pma_read_ext_abilities()
1038 val & MDIO_PMA_EXTABLE_10BT); in genphy_c45_pma_read_ext_abilities()
1040 if (val & MDIO_PMA_EXTABLE_NBT) { in genphy_c45_pma_read_ext_abilities()
1041 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in genphy_c45_pma_read_ext_abilities()
1043 if (val < 0) in genphy_c45_pma_read_ext_abilities()
1044 return val; in genphy_c45_pma_read_ext_abilities()
1048 val & MDIO_PMA_NG_EXTABLE_2_5GBT); in genphy_c45_pma_read_ext_abilities()
1052 val & MDIO_PMA_NG_EXTABLE_5GBT); in genphy_c45_pma_read_ext_abilities()
1055 if (val & MDIO_PMA_EXTABLE_BT1) { in genphy_c45_pma_read_ext_abilities()
1056 val = genphy_c45_pma_baset1_read_abilities(phydev); in genphy_c45_pma_read_ext_abilities()
1057 if (val < 0) in genphy_c45_pma_read_ext_abilities()
1058 return val; in genphy_c45_pma_read_ext_abilities()
1078 int val; in genphy_c45_pma_read_abilities() local
1082 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in genphy_c45_pma_read_abilities()
1083 if (val < 0) in genphy_c45_pma_read_abilities()
1084 return val; in genphy_c45_pma_read_abilities()
1086 if (val & MDIO_AN_STAT1_ABLE) in genphy_c45_pma_read_abilities()
1091 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT2); in genphy_c45_pma_read_abilities()
1092 if (val < 0) in genphy_c45_pma_read_abilities()
1093 return val; in genphy_c45_pma_read_abilities()
1097 val & MDIO_PMA_STAT2_10GBSR); in genphy_c45_pma_read_abilities()
1101 val & MDIO_PMA_STAT2_10GBLR); in genphy_c45_pma_read_abilities()
1105 val & MDIO_PMA_STAT2_10GBER); in genphy_c45_pma_read_abilities()
1107 if (val & MDIO_PMA_STAT2_EXTABLE) { in genphy_c45_pma_read_abilities()
1108 val = genphy_c45_pma_read_ext_abilities(phydev); in genphy_c45_pma_read_abilities()
1109 if (val < 0) in genphy_c45_pma_read_abilities()
1110 return val; in genphy_c45_pma_read_abilities()
1342 u16 val = 0; in genphy_c45_plca_set_cfg() local
1372 val = ret; in genphy_c45_plca_set_cfg()
1376 val = (val & ~MDIO_OATC14_PLCA_NCNT) | in genphy_c45_plca_set_cfg()
1380 val = (val & ~MDIO_OATC14_PLCA_ID) | in genphy_c45_plca_set_cfg()
1384 MDIO_OATC14_PLCA_CTRL1, val); in genphy_c45_plca_set_cfg()
1412 val = ret; in genphy_c45_plca_set_cfg()
1416 val = (val & ~MDIO_OATC14_PLCA_MAXBC) | in genphy_c45_plca_set_cfg()
1420 val = (val & ~MDIO_OATC14_PLCA_BTMR) | in genphy_c45_plca_set_cfg()
1424 MDIO_OATC14_PLCA_BURST, val); in genphy_c45_plca_set_cfg()