Lines Matching +full:0 +full:xfffffff0
31 #define ET1011C_STATUS_REG (0x1A)
32 #define ET1011C_CONFIG_REG (0x16)
33 #define ET1011C_SPEED_MASK (0x0300)
34 #define ET1011C_GIGABIT_SPEED (0x0200)
35 #define ET1011C_TX_FIFO_MASK (0x3000)
36 #define ET1011C_TX_FIFO_DEPTH_8 (0x0000)
37 #define ET1011C_TX_FIFO_DEPTH_16 (0x1000)
38 #define ET1011C_INTERFACE_MASK (0x0007)
39 #define ET1011C_GMII_INTERFACE (0x0002)
40 #define ET1011C_SYS_CLK_EN (0x01 << 4)
51 if (ctl < 0) in et1011c_config_aneg()
87 .phy_id = 0x0282f014,
89 .phy_id_mask = 0xfffffff0,
98 { 0x0282f014, 0xfffffff0 },