1 // SPDX-License-Identifier: GPL-2.0
24 /* 1b = TDR auto on link down, 0b = Manual TDR start */
57 /* Register 0x0576: TDR Master Link Down Control */
69  * 32-bit or 16-bit counters for TX and RX statistics and must be read in
70  * sequence to ensure the counters are cleared correctly.
72  * - DP83TG720S_PKT_STAT_1: Contains TX packet count bits [15:0].
73  * - DP83TG720S_PKT_STAT_2: Contains TX packet count bits [31:16].
74  * - DP83TG720S_PKT_STAT_3: Contains TX error packet count.
75  * - DP83TG720S_PKT_STAT_4: Contains RX packet count bits [15:0].
76  * - DP83TG720S_PKT_STAT_5: Contains RX packet count bits [31:16].
77  * - DP83TG720S_PKT_STAT_6: Contains RX error packet count.
111  * dp83tg720_update_stats - Update the PHY statistics for the DP83TD510 PHY.
121 	struct dp83tg720_priv *priv = phydev->priv;  in dp83tg720_update_stats()
131 	priv->stats.link_loss_cnt += count;  in dp83tg720_update_stats()
134 	 * - Group 1 (TX stats): DP83TG720S_PKT_STAT_1 to DP83TG720S_PKT_STAT_3  in dp83tg720_update_stats()
135 	 * - Group 2 (RX stats): DP83TG720S_PKT_STAT_4 to DP83TG720S_PKT_STAT_6  in dp83tg720_update_stats()
140 	 * prevent the group from being cleared. Additionally, the counters  in dp83tg720_update_stats()
155 	priv->stats.tx_pkt_cnt += count;  in dp83tg720_update_stats()
161 	priv->stats.tx_err_pkt_cnt += ret;  in dp83tg720_update_stats()
174 	priv->stats.rx_pkt_cnt += count;  in dp83tg720_update_stats()
180 	priv->stats.rx_err_pkt_cnt += ret;  in dp83tg720_update_stats()
188 	struct dp83tg720_priv *priv = phydev->priv;  in dp83tg720_get_link_stats()
190 	link_stats->link_down_events = priv->stats.link_loss_cnt;  in dp83tg720_get_link_stats()
197 	struct dp83tg720_priv *priv = phydev->priv;  in dp83tg720_get_phy_stats()
199 	stats->tx_packets = priv->stats.tx_pkt_cnt;  in dp83tg720_get_phy_stats()
200 	stats->tx_errors = priv->stats.tx_err_pkt_cnt;  in dp83tg720_get_phy_stats()
201 	stats->rx_packets = priv->stats.rx_pkt_cnt;  in dp83tg720_get_phy_stats()
202 	stats->rx_errors = priv->stats.rx_err_pkt_cnt;  in dp83tg720_get_phy_stats()
206  * dp83tg720_cable_test_start - Start the cable test for the DP83TG720 PHY.
218 	 * "DP83TG720S-Q1: Configuring for Open Alliance Specification  in dp83tg720_cable_test_start()
224 	/* Force master link down */  in dp83tg720_cable_test_start()
265  * dp83tg720_cable_test_get_status - Get the status of the cable test for the
338 	/* Re-read role configuration to make changes visible even if  in dp83tg720_config_aneg()
339 	 * the link is in administrative down state.  in dp83tg720_config_aneg()
349 	phydev->pause = 0;  in dp83tg720_read_status()
350 	phydev->asym_pause = 0;  in dp83tg720_read_status()
356 	phydev->link = !!(phy_sts & DP83TG720S_LINK_STATUS);  in dp83tg720_read_status()
357 	if (!phydev->link) {  in dp83tg720_read_status()
382 		phydev->speed = SPEED_UNKNOWN;  in dp83tg720_read_status()
383 		phydev->duplex = DUPLEX_UNKNOWN;  in dp83tg720_read_status()
393 		phydev->duplex = DUPLEX_FULL;  in dp83tg720_read_status()
394 		phydev->speed = SPEED_1000;  in dp83tg720_read_status()
404 	if (!phydev->link)  in dp83tg720_get_sqi()
424 	switch (phydev->interface) {  in dp83tg720_config_rgmii_delay()
462 	 * The wait value of one 1ms is documented in "DP83TG720S-Q1 1000BASE-T1  in dp83tg720_config_init()
489 	struct device *dev = &phydev->mdio.dev;  in dp83tg720_probe()
494 		return -ENOMEM;  in dp83tg720_probe()
496 	phydev->priv = priv;  in dp83tg720_probe()