Lines Matching +full:mdi +full:- +full:cfg +full:- +full:order
1 // SPDX-License-Identifier: GPL-2.0
104 /* Sleep and timeout for checking if the Processor-Intensive
127 int len_l = min(stat->size, 16); in aqr107_get_stat()
128 int len_h = stat->size - len_l; in aqr107_get_stat()
132 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg); in aqr107_get_stat()
136 ret = val & GENMASK(len_l - 1, 0); in aqr107_get_stat()
138 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1); in aqr107_get_stat()
142 ret += (val & GENMASK(len_h - 1, 0)) << 16; in aqr107_get_stat()
151 struct aqr107_priv *priv = phydev->priv; in aqr107_get_stats()
161 priv->sgmii_stats[i] += val; in aqr107_get_stats()
163 data[i] = priv->sgmii_stats[i]; in aqr107_get_stats()
195 ret = aqr_set_mdix(phydev, phydev->mdix_ctrl); in aqr_config_aneg()
201 if (phydev->autoneg == AUTONEG_DISABLE) in aqr_config_aneg()
215 phydev->advertising)) in aqr_config_aneg()
219 phydev->advertising)) in aqr_config_aneg()
224 phydev->advertising)) in aqr_config_aneg()
228 phydev->advertising)) in aqr_config_aneg()
246 bool en = phydev->interrupts == PHY_INTERRUPT_ENABLED; in aqr_config_intr()
305 if (phydev->autoneg == AUTONEG_ENABLE) { in aqr_read_status()
311 phydev->lp_advertising, in aqr_read_status()
314 phydev->lp_advertising, in aqr_read_status()
326 phydev->mdix = ETH_TP_MDI_X; in aqr_read_status()
328 phydev->mdix = ETH_TP_MDI; in aqr_read_status()
330 phydev->mdix = ETH_TP_MDI_INVALID; in aqr_read_status()
346 phydev->duplex = DUPLEX_FULL; in aqr107_read_rate()
348 phydev->duplex = DUPLEX_HALF; in aqr107_read_rate()
352 phydev->speed = SPEED_10; in aqr107_read_rate()
356 phydev->speed = SPEED_100; in aqr107_read_rate()
360 phydev->speed = SPEED_1000; in aqr107_read_rate()
364 phydev->speed = SPEED_2500; in aqr107_read_rate()
368 phydev->speed = SPEED_5000; in aqr107_read_rate()
372 phydev->speed = SPEED_10000; in aqr107_read_rate()
376 phydev->speed = SPEED_UNKNOWN; in aqr107_read_rate()
386 phydev->rate_matching = RATE_MATCH_PAUSE; in aqr107_read_rate()
388 phydev->rate_matching = RATE_MATCH_NONE; in aqr107_read_rate()
401 if (!phydev->link || phydev->autoneg == AUTONEG_DISABLE) in aqr107_read_status()
415 if (ret && ret != -ETIMEDOUT) in aqr107_read_status()
420 phydev->interface = PHY_INTERFACE_MODE_10GKR; in aqr107_read_status()
423 phydev->interface = PHY_INTERFACE_MODE_1000BASEKX; in aqr107_read_status()
426 phydev->interface = PHY_INTERFACE_MODE_10GBASER; in aqr107_read_status()
429 phydev->interface = PHY_INTERFACE_MODE_USXGMII; in aqr107_read_status()
432 phydev->interface = PHY_INTERFACE_MODE_XAUI; in aqr107_read_status()
435 phydev->interface = PHY_INTERFACE_MODE_SGMII; in aqr107_read_status()
438 phydev->interface = PHY_INTERFACE_MODE_RXAUI; in aqr107_read_status()
441 phydev->interface = PHY_INTERFACE_MODE_2500BASEX; in aqr107_read_status()
445 phydev->link = false; in aqr107_read_status()
446 phydev->interface = PHY_INTERFACE_MODE_NA; in aqr107_read_status()
475 return -E2BIG; in aqr107_set_downshift()
490 switch (tuna->id) { in aqr107_get_tunable()
494 return -EOPNOTSUPP; in aqr107_get_tunable()
501 switch (tuna->id) { in aqr107_set_tunable()
505 return -EOPNOTSUPP; in aqr107_set_tunable()
561 struct device_node *np = phydev->mdio.dev.of_node; in aqr107_config_mdi()
565 ret = of_property_read_u32(np, "marvell,mdi-cfg-order", &mdi_conf); in aqr107_config_mdi()
567 /* Do nothing in case property "marvell,mdi-cfg-order" is not present */ in aqr107_config_mdi()
568 if (ret == -EINVAL || ret == -ENOSYS) in aqr107_config_mdi()
575 return -EINVAL; in aqr107_config_mdi()
584 struct aqr107_priv *priv = phydev->priv; in aqr107_config_init()
589 if (phydev->interface != PHY_INTERFACE_MODE_SGMII && in aqr107_config_init()
590 phydev->interface != PHY_INTERFACE_MODE_1000BASEKX && in aqr107_config_init()
591 phydev->interface != PHY_INTERFACE_MODE_2500BASEX && in aqr107_config_init()
592 phydev->interface != PHY_INTERFACE_MODE_XGMII && in aqr107_config_init()
593 phydev->interface != PHY_INTERFACE_MODE_USXGMII && in aqr107_config_init()
594 phydev->interface != PHY_INTERFACE_MODE_10GKR && in aqr107_config_init()
595 phydev->interface != PHY_INTERFACE_MODE_10GBASER && in aqr107_config_init()
596 phydev->interface != PHY_INTERFACE_MODE_XAUI && in aqr107_config_init()
597 phydev->interface != PHY_INTERFACE_MODE_RXAUI) in aqr107_config_init()
598 return -ENODEV; in aqr107_config_init()
600 WARN(phydev->interface == PHY_INTERFACE_MODE_XGMII, in aqr107_config_init()
616 for_each_set_bit(led_idx, &priv->leds_active_low, AQR_MAX_LEDS) { in aqr107_config_init()
622 for_each_set_bit(led_idx, &priv->leds_active_high, AQR_MAX_LEDS) { in aqr107_config_init()
636 if (phydev->interface != PHY_INTERFACE_MODE_SGMII && in aqcs109_config_init()
637 phydev->interface != PHY_INTERFACE_MODE_2500BASEX) in aqcs109_config_init()
638 return -ENODEV; in aqcs109_config_init()
653 if (phydev->state != PHY_RUNNING || phydev->autoneg == AUTONEG_DISABLE) in aqr107_link_change_notify()
680 downshift ? ", fast-retrain downshift advertised" : "", in aqr107_link_change_notify()
689 phydev_info(phydev, "Aquantia 1000Base-T2 mode active\n"); in aqr107_link_change_notify()
709 phydev_err(phydev, "timeout: processor-intensive MDIO operation\n"); in aqr107_wait_processor_intensive_op()
761 unsigned long *possible = phydev->possible_interfaces; in aqr107_fill_interface_modes()
766 /* Walk the media-speed configuration registers to determine which in aqr107_fill_interface_modes()
767 * host-side serdes modes may be used by the PHY depending on the in aqr107_fill_interface_modes()
817 /* It's been observed on some models that - when coming out of suspend in aqr113c_fill_interface_modes()
818 * - the FW signals that the PHY is ready but the GLOBAL_CFG registers in aqr113c_fill_interface_modes()
834 unsigned long *supported = phydev->supported; in aqr115c_get_features()
852 phydev->supported); in aqr111_get_features()
881 phydev->priv = devm_kzalloc(&phydev->mdio.dev, in aqr107_probe()
883 if (!phydev->priv) in aqr107_probe()
884 return -ENOMEM; in aqr107_probe()