18 #define ETH_PLL_STS		0x40
19 #define ETH_PLL_CTL0		0x44
25 #define  PLL_CTL0_M		GENMASK(8, 0)
28 #define ETH_PLL_CTL1		0x48
29 #define ETH_PLL_CTL2		0x4c
30 #define ETH_PLL_CTL3		0x50
31 #define ETH_PLL_CTL4		0x54
32 #define ETH_PLL_CTL5		0x58
33 #define ETH_PLL_CTL6		0x5c
34 #define ETH_PLL_CTL7		0x60
36 #define ETH_PHY_CNTL0		0x80
37 #define   EPHY_G12A_ID		0x33010180
38 #define ETH_PHY_CNTL1		0x84
39 #define  PHY_CNTL1_ST_MODE	GENMASK(2, 0)
43 #define   EPHY_MODE_RMII	0x1
47 #define ETH_PHY_CNTL2		0x88
52 #define MESON_G12A_MDIO_EXTERNAL_ID 0
101 				  val & PLL_CTL0_LOCK_DIG, 0, PLL_LOCK_TIMEOUT);  in g12a_ephy_pll_enable()
122 	return (val & PLL_CTL0_LOCK_DIG) ? 1 : 0;  in g12a_ephy_pll_is_enabled()
130 	writel(0x29c0040a, pll->base + ETH_PLL_CTL0);  in g12a_ephy_pll_init()
131 	writel(0x927e0000, pll->base + ETH_PLL_CTL1);  in g12a_ephy_pll_init()
132 	writel(0xac5f49e5, pll->base + ETH_PLL_CTL2);  in g12a_ephy_pll_init()
133 	writel(0x00000000, pll->base + ETH_PLL_CTL3);  in g12a_ephy_pll_init()
134 	writel(0x00000000, pll->base + ETH_PLL_CTL4);  in g12a_ephy_pll_init()
135 	writel(0x20200000, pll->base + ETH_PLL_CTL5);  in g12a_ephy_pll_init()
136 	writel(0x0000c002, pll->base + ETH_PLL_CTL6);  in g12a_ephy_pll_init()
137 	writel(0x00000023, pll->base + ETH_PLL_CTL7);  in g12a_ephy_pll_init()
139 	return 0;  in g12a_ephy_pll_init()
165 	/* Make sure we get a 0 -> 1 transition on the enable bit */  in g12a_enable_internal_mdio()
183 	return 0;  in g12a_enable_internal_mdio()
189 	writel_relaxed(0x0, priv->regs + ETH_PHY_CNTL2);  in g12a_enable_external_mdio()
195 	return 0;  in g12a_enable_external_mdio()
204 		return 0;  in g12a_mdio_switch_fn()
234 	for (i = 0; i < PLL_MUX_NUM_PARENT; i++) {  in g12a_ephy_glue_clk_register()
257 	init.flags = 0;  in g12a_ephy_glue_clk_register()
284 	init.flags = 0;  in g12a_ephy_glue_clk_register()
285 	parent_names[0] = __clk_get_name(clk);  in g12a_ephy_glue_clk_register()
301 	return 0;  in g12a_ephy_glue_clk_register()
317 	priv->regs = devm_platform_ioremap_resource(pdev, 0);  in g12a_mdio_mux_probe()