Lines Matching +full:i2c +full:- +full:controlled

1 # SPDX-License-Identifier: GPL-2.0-only
20 	  loadable module or built-in.
58 	tristate "APM X-Gene SoC MDIO bus controller"
62 	  APM X-Gene SoC's.
72 	  third revision of the ASPEED MDIO register interface - the first two
109 	tristate "GPIO lib-based bitbanged MDIO buses"
113 	  Supports GPIO lib-based MDIO busses.
116 	  will be called mdio-gpio.
127 	depends on I2C
129 	  Support I2C based PHYs.  This provides a MDIO bus bridged
130 	  to I2C to allow PHYs connected in I2C mode to be accessed
177 	  IPQ40xx, IPQ60xx, IPQ807x and IPQ50xx series Soc-s.
193 	  layout. It's regmap-based so that it can be used on integrated,
194 	  memory-mapped PHYs, SPI PHYs and so on. A new virtual MDIO bus is
266 	tristate "GPIO controlled MDIO bus multiplexers"
271 	  are controlled via GPIO lines.  The multiplexer connects one of
282 	  that is controlled via the kernel multiplexer subsystem. The
288 	tristate "MMIO device-controlled MDIO bus multiplexers"
293 	  are controlled via a simple memory-mapped device, like an FPGA.