153 		ret = clk_prepare_enable(priv->plat->stmmac_clk);  in stmmac_bus_clks_config()
156 		ret = clk_prepare_enable(priv->plat->pclk);  in stmmac_bus_clks_config()
158 			clk_disable_unprepare(priv->plat->stmmac_clk);  in stmmac_bus_clks_config()
161 		if (priv->plat->clks_config) {  in stmmac_bus_clks_config()
162 			ret = priv->plat->clks_config(priv->plat->bsp_priv, enabled);  in stmmac_bus_clks_config()
164 				clk_disable_unprepare(priv->plat->stmmac_clk);  in stmmac_bus_clks_config()
165 				clk_disable_unprepare(priv->plat->pclk);  in stmmac_bus_clks_config()
170 		clk_disable_unprepare(priv->plat->stmmac_clk);  in stmmac_bus_clks_config()
171 		clk_disable_unprepare(priv->plat->pclk);  in stmmac_bus_clks_config()
172 		if (priv->plat->clks_config)  in stmmac_bus_clks_config()
173 			priv->plat->clks_config(priv->plat->bsp_priv, enabled);  in stmmac_bus_clks_config()
201 	u32 rx_queues_cnt = priv->plat->rx_queues_to_use;  in __stmmac_disable_all_queues()
202 	u32 tx_queues_cnt = priv->plat->tx_queues_to_use;  in __stmmac_disable_all_queues()
228 	u32 rx_queues_cnt = priv->plat->rx_queues_to_use;  in stmmac_disable_all_queues()
250 	u32 rx_queues_cnt = priv->plat->rx_queues_to_use;  in stmmac_enable_all_queues()
251 	u32 tx_queues_cnt = priv->plat->tx_queues_to_use;  in stmmac_enable_all_queues()
301 	clk_rate = clk_get_rate(priv->plat->stmmac_clk);  in stmmac_clk_csr_set()
329 	if (priv->plat->flags & STMMAC_FLAG_HAS_SUN8I) {  in stmmac_clk_csr_set()
340 	if (priv->plat->has_xgmac) {  in stmmac_clk_csr_set()
405 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_eee_tx_busy()
440 			priv->plat->flags & STMMAC_FLAG_EN_TX_LPI_CLOCKGATING);  in stmmac_try_to_start_sw_lpi()
501 						priv->plat->mult_fact_100ns,  in stmmac_eee_init()
514 					priv->plat->mult_fact_100ns,  in stmmac_eee_init()
518 	if (priv->plat->has_gmac4 && priv->tx_lpi_timer <= STMMAC_ET_MAX) {  in stmmac_eee_init()
568 		ns -= priv->plat->cdc_error_adj;  in stmmac_get_tx_hwtstamp()
598 	if (priv->plat->has_gmac4 || priv->plat->has_xgmac)  in stmmac_get_rx_hwtstamp()
605 		ns -= priv->plat->cdc_error_adj;  in stmmac_get_rx_hwtstamp()
846 	bool xmac = priv->plat->has_gmac4 || priv->plat->has_xgmac;  in stmmac_init_tstamp_counter()
859 					   priv->plat->clk_ptp_rate,  in stmmac_init_tstamp_counter()
872 	priv->default_addend = div_u64(temp, priv->plat->clk_ptp_rate);  in stmmac_init_tstamp_counter()
894 	bool xmac = priv->plat->has_gmac4 || priv->plat->has_xgmac;  in stmmac_init_ptp()
897 	if (priv->plat->ptp_clk_freq_config)  in stmmac_init_ptp()
898 		priv->plat->ptp_clk_freq_config(priv);  in stmmac_init_ptp()
922 	if (priv->plat->flags & STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY)  in stmmac_init_ptp()
930 	clk_disable_unprepare(priv->plat->clk_ptp_ref);  in stmmac_release_ptp()
942 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_mac_flow_ctrl()
958 	if (priv->plat->max_speed)  in stmmac_mac_get_caps()
959 		phylink_limit_mac_speed(config, priv->plat->max_speed);  in stmmac_mac_get_caps()
970 	if (priv->plat->select_pcs) {  in stmmac_mac_select_pcs()
971 		pcs = priv->plat->select_pcs(priv, interface);  in stmmac_mac_select_pcs()
1007 	if ((priv->plat->flags & STMMAC_FLAG_SERDES_UP_AFTER_PHY_LINKUP) &&  in stmmac_mac_link_up()
1008 	    priv->plat->serdes_powerup)  in stmmac_mac_link_up()
1009 		priv->plat->serdes_powerup(priv->dev, priv->plat->bsp_priv);  in stmmac_mac_link_up()
1075 	if (priv->plat->fix_mac_speed)  in stmmac_mac_link_up()
1076 		priv->plat->fix_mac_speed(priv->plat->bsp_priv, speed, mode);  in stmmac_mac_link_up()
1105 	if (priv->plat->flags & STMMAC_FLAG_HWTSTAMP_CORRECT_LATENCY)  in stmmac_mac_link_up()
1146 	int interface = priv->plat->mac_interface;  in stmmac_check_pcs_mode()
1180 	fwnode = priv->plat->port_node;  in stmmac_init_phy()
1193 		int addr = priv->plat->phy_addr;  in stmmac_init_phy()
1228 	if (!priv->plat->pmt) {  in stmmac_init_phy()
1242 	int mode = priv->plat->phy_interface;  in stmmac_phy_setup()
1254 	if (!(priv->plat->flags & STMMAC_FLAG_RX_CLK_RUNS_IN_LPI))  in stmmac_phy_setup()
1257 	mdio_bus_data = priv->plat->mdio_bus_data;  in stmmac_phy_setup()
1291 	fwnode = priv->plat->port_node;  in stmmac_phy_setup()
1307 	u32 rx_cnt = priv->plat->rx_queues_to_use;  in stmmac_display_rx_rings()
1335 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_display_tx_rings()
1468 	u32 rx_queue_cnt = priv->plat->rx_queues_to_use;  in stmmac_clear_descriptors()
1469 	u32 tx_queue_cnt = priv->plat->tx_queues_to_use;  in stmmac_clear_descriptors()
1788 	u32 rx_count = priv->plat->rx_queues_to_use;  in init_dma_rx_desc_rings()
1885 	tx_queue_cnt = priv->plat->tx_queues_to_use;  in init_dma_tx_desc_rings()
1954 	u32 tx_queue_cnt = priv->plat->tx_queues_to_use;  in stmmac_free_tx_skbufs()
2003 	u32 rx_count = priv->plat->rx_queues_to_use;  in free_dma_rx_desc_resources()
2050 	u32 tx_count = priv->plat->tx_queues_to_use;  in free_dma_tx_desc_resources()
2154 	u32 rx_count = priv->plat->rx_queues_to_use;  in alloc_dma_rx_desc_resources()
2233 	u32 tx_count = priv->plat->tx_queues_to_use;  in alloc_dma_tx_desc_resources()
2298 	u32 rx_queues_count = priv->plat->rx_queues_to_use;  in stmmac_mac_enable_rx_queues()
2303 		mode = priv->plat->rx_queues_cfg[queue].mode_to_use;  in stmmac_mac_enable_rx_queues()
2362 	u32 rx_channels_count = priv->plat->rx_queues_to_use;  in stmmac_enable_all_dma_irq()
2363 	u32 tx_channels_count = priv->plat->tx_queues_to_use;  in stmmac_enable_all_dma_irq()
2385 	u32 rx_channels_count = priv->plat->rx_queues_to_use;  in stmmac_start_all_dma()
2386 	u32 tx_channels_count = priv->plat->tx_queues_to_use;  in stmmac_start_all_dma()
2404 	u32 rx_channels_count = priv->plat->rx_queues_to_use;  in stmmac_stop_all_dma()
2405 	u32 tx_channels_count = priv->plat->tx_queues_to_use;  in stmmac_stop_all_dma()
2423 	u32 rx_channels_count = priv->plat->rx_queues_to_use;  in stmmac_dma_operation_mode()
2424 	u32 tx_channels_count = priv->plat->tx_queues_to_use;  in stmmac_dma_operation_mode()
2425 	int rxfifosz = priv->plat->rx_fifo_size;  in stmmac_dma_operation_mode()
2426 	int txfifosz = priv->plat->tx_fifo_size;  in stmmac_dma_operation_mode()
2438 	if (priv->plat->has_gmac4 || priv->plat->has_xgmac) {  in stmmac_dma_operation_mode()
2443 	if (priv->plat->force_thresh_dma_mode) {  in stmmac_dma_operation_mode()
2446 	} else if (priv->plat->force_sf_dma_mode || priv->plat->tx_coe) {  in stmmac_dma_operation_mode()
2467 		qmode = priv->plat->rx_queues_cfg[chan].mode_to_use;  in stmmac_dma_operation_mode()
2485 		qmode = priv->plat->tx_queues_cfg[chan].mode_to_use;  in stmmac_dma_operation_mode()
2520 		ns -= priv->plat->cdc_error_adj;  in stmmac_xsk_fill_timestamp()
2655 		if (priv->plat->force_thresh_dma_mode)  in stmmac_bump_dma_threshold()
2877 	stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,  in stmmac_tx_err()
2898 	u8 rxqmode = priv->plat->rx_queues_cfg[chan].mode_to_use;  in stmmac_set_dma_operation_mode()
2899 	u8 txqmode = priv->plat->tx_queues_cfg[chan].mode_to_use;  in stmmac_set_dma_operation_mode()
2900 	u32 rx_channels_count = priv->plat->rx_queues_to_use;  in stmmac_set_dma_operation_mode()
2901 	u32 tx_channels_count = priv->plat->tx_queues_to_use;  in stmmac_set_dma_operation_mode()
2902 	int rxfifosz = priv->plat->rx_fifo_size;  in stmmac_set_dma_operation_mode()
2903 	int txfifosz = priv->plat->tx_fifo_size;  in stmmac_set_dma_operation_mode()
2946 	if ((status & handle_rx) && (chan < priv->plat->rx_queues_to_use)) {  in stmmac_napi_check()
2955 	if ((status & handle_tx) && (chan < priv->plat->tx_queues_to_use)) {  in stmmac_napi_check()
2976 	u32 tx_channel_count = priv->plat->tx_queues_to_use;  in stmmac_dma_interrupt()
2977 	u32 rx_channel_count = priv->plat->rx_queues_to_use;  in stmmac_dma_interrupt()
3066 	u32 rx_channels_count = priv->plat->rx_queues_to_use;  in stmmac_init_dma_engine()
3067 	u32 tx_channels_count = priv->plat->tx_queues_to_use;  in stmmac_init_dma_engine()
3074 	if (!priv->plat->dma_cfg || !priv->plat->dma_cfg->pbl) {  in stmmac_init_dma_engine()
3080 		priv->plat->dma_cfg->atds = 1;  in stmmac_init_dma_engine()
3089 	stmmac_dma_init(priv, priv->ioaddr, priv->plat->dma_cfg);  in stmmac_init_dma_engine()
3091 	if (priv->plat->axi)  in stmmac_init_dma_engine()
3092 		stmmac_axi(priv, priv->ioaddr, priv->plat->axi);  in stmmac_init_dma_engine()
3096 		stmmac_init_chan(priv, priv->ioaddr, priv->plat->dma_cfg, chan);  in stmmac_init_dma_engine()
3104 		stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,  in stmmac_init_dma_engine()
3118 		stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,  in stmmac_init_dma_engine()
3192 	u32 tx_channel_count = priv->plat->tx_queues_to_use;  in stmmac_init_coalesce()
3193 	u32 rx_channel_count = priv->plat->rx_queues_to_use;  in stmmac_init_coalesce()
3212 	u32 rx_channels_count = priv->plat->rx_queues_to_use;  in stmmac_set_rings_length()
3213 	u32 tx_channels_count = priv->plat->tx_queues_to_use;  in stmmac_set_rings_length()
3234 	u32 tx_queues_count = priv->plat->tx_queues_to_use;  in stmmac_set_tx_queue_weight()
3239 		weight = priv->plat->tx_queues_cfg[queue].weight;  in stmmac_set_tx_queue_weight()
3251 	u32 tx_queues_count = priv->plat->tx_queues_to_use;  in stmmac_configure_cbs()
3257 		mode_to_use = priv->plat->tx_queues_cfg[queue].mode_to_use;  in stmmac_configure_cbs()
3262 				priv->plat->tx_queues_cfg[queue].send_slope,  in stmmac_configure_cbs()
3263 				priv->plat->tx_queues_cfg[queue].idle_slope,  in stmmac_configure_cbs()
3264 				priv->plat->tx_queues_cfg[queue].high_credit,  in stmmac_configure_cbs()
3265 				priv->plat->tx_queues_cfg[queue].low_credit,  in stmmac_configure_cbs()
3277 	u32 rx_queues_count = priv->plat->rx_queues_to_use;  in stmmac_rx_queue_dma_chan_map()
3282 		chan = priv->plat->rx_queues_cfg[queue].chan;  in stmmac_rx_queue_dma_chan_map()
3294 	u32 rx_queues_count = priv->plat->rx_queues_to_use;  in stmmac_mac_config_rx_queues_prio()
3299 		if (!priv->plat->rx_queues_cfg[queue].use_prio)  in stmmac_mac_config_rx_queues_prio()
3302 		prio = priv->plat->rx_queues_cfg[queue].prio;  in stmmac_mac_config_rx_queues_prio()
3314 	u32 tx_queues_count = priv->plat->tx_queues_to_use;  in stmmac_mac_config_tx_queues_prio()
3319 		if (!priv->plat->tx_queues_cfg[queue].use_prio)  in stmmac_mac_config_tx_queues_prio()
3322 		prio = priv->plat->tx_queues_cfg[queue].prio;  in stmmac_mac_config_tx_queues_prio()
3334 	u32 rx_queues_count = priv->plat->rx_queues_to_use;  in stmmac_mac_config_rx_queues_routing()
3340 		if (priv->plat->rx_queues_cfg[queue].pkt_route == 0x0)  in stmmac_mac_config_rx_queues_routing()
3343 		packet = priv->plat->rx_queues_cfg[queue].pkt_route;  in stmmac_mac_config_rx_queues_routing()
3350 	if (!priv->dma_cap.rssen || !priv->plat->rss_en) {  in stmmac_mac_config_rss()
3361 			     priv->plat->rx_queues_to_use);  in stmmac_mac_config_rss()
3371 	u32 rx_queues_count = priv->plat->rx_queues_to_use;  in stmmac_mtl_configuration()
3372 	u32 tx_queues_count = priv->plat->tx_queues_to_use;  in stmmac_mtl_configuration()
3380 				priv->plat->rx_sched_algorithm);  in stmmac_mtl_configuration()
3385 				priv->plat->tx_sched_algorithm);  in stmmac_mtl_configuration()
3419 					  priv->plat->safety_feat_cfg);  in stmmac_safety_feat_configuration()
3441 	u32 rx_cnt = priv->plat->rx_queues_to_use;  in stmmac_hw_setup()
3442 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_hw_setup()
3464 		int speed = priv->plat->mac_port_sel_speed;  in stmmac_hw_setup()
3487 		priv->plat->rx_coe = STMMAC_RX_COE_NONE;  in stmmac_hw_setup()
3500 		ret = clk_prepare_enable(priv->plat->clk_ptp_ref);  in stmmac_hw_setup()
3565 	netif_set_real_num_rx_queues(dev, priv->plat->rx_queues_to_use);  in stmmac_hw_setup()
3566 	netif_set_real_num_tx_queues(dev, priv->plat->tx_queues_to_use);  in stmmac_hw_setup()
3580 	clk_disable_unprepare(priv->plat->clk_ptp_ref);  in stmmac_hw_teardown()
3591 		irq_idx = priv->plat->tx_queues_to_use;  in stmmac_free_irq()
3600 		irq_idx = priv->plat->rx_queues_to_use;  in stmmac_free_irq()
3752 	for (i = 0; i < priv->plat->rx_queues_to_use; i++) {  in stmmac_request_irq_multi_msi()
3776 	for (i = 0; i < priv->plat->tx_queues_to_use; i++) {  in stmmac_request_irq_multi_msi()
3879 	if (priv->plat->flags & STMMAC_FLAG_MULTI_MSI_EN)  in stmmac_request_irq()
3929 	for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++) {  in stmmac_setup_dma_desc()
3931 		int tbs_en = priv->plat->tx_queues_cfg[chan].tbs_en;  in stmmac_setup_dma_desc()
3974 	int mode = priv->plat->phy_interface;  in __stmmac_open()
4005 	if (!(priv->plat->flags & STMMAC_FLAG_SERDES_UP_AFTER_PHY_LINKUP) &&  in __stmmac_open()
4006 	    priv->plat->serdes_powerup) {  in __stmmac_open()
4007 		ret = priv->plat->serdes_powerup(dev, priv->plat->bsp_priv);  in __stmmac_open()
4040 	for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)  in __stmmac_open()
4088 	for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)  in stmmac_release()
4106 	if (priv->plat->serdes_powerdown)  in stmmac_release()
4107 		priv->plat->serdes_powerdown(dev, priv->plat->bsp_priv);  in stmmac_release()
4553 		if (priv->plat->has_gmac4 && (gso & SKB_GSO_UDP_L4))  in stmmac_xmit()
4592 	    (priv->plat->tx_queues_cfg[queue].coe_unsupported ||  in stmmac_xmit()
4611 	enh_desc = priv->plat->enh_desc;  in stmmac_xmit()
5015 	while (index >= priv->plat->tx_queues_to_use)  in stmmac_xdp_get_tx_queue()
5016 		index -= priv->plat->tx_queues_to_use;  in stmmac_xdp_get_tx_queue()
5878 	int txfifosz = priv->plat->tx_fifo_size;  in stmmac_change_mtu()
5886 	txfifosz /= priv->plat->tx_queues_to_use;  in stmmac_change_mtu()
5935 	if (priv->plat->rx_coe == STMMAC_RX_COE_NONE)  in stmmac_fix_features()
5938 	if (!priv->plat->tx_coe)  in stmmac_fix_features()
5946 	if (priv->plat->bugged_jumbo && (dev->mtu > ETH_DATA_LEN))  in stmmac_fix_features()
5950 	if ((priv->plat->flags & STMMAC_FLAG_TSO_EN) && (priv->dma_cap.tsoen)) {  in stmmac_fix_features()
5967 		priv->hw->rx_csum = priv->plat->rx_coe;  in stmmac_set_features()
5979 		for (chan = 0; chan < priv->plat->rx_queues_to_use; chan++)  in stmmac_set_features()
5995 	u32 rx_cnt = priv->plat->rx_queues_to_use;  in stmmac_common_interrupt()
5996 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_common_interrupt()
6001 	xmac = priv->plat->has_gmac4 || priv->plat->has_xgmac;  in stmmac_common_interrupt()
6015 	if ((priv->plat->has_gmac) || xmac) {  in stmmac_common_interrupt()
6031 		    !(priv->plat->flags & STMMAC_FLAG_HAS_INTEGRATED_PCS)) {  in stmmac_common_interrupt()
6310 	u32 rx_count = priv->plat->rx_queues_to_use;  in stmmac_rings_status_show()
6311 	u32 tx_count = priv->plat->tx_queues_to_use;  in stmmac_rings_status_show()
6389 	if (priv->plat->has_xgmac) {  in stmmac_dma_cap_show()
6413 	if (priv->plat->has_xgmac)  in stmmac_dma_cap_show()
6422 	    priv->plat->has_xgmac) {  in stmmac_dma_cap_show()
6782 	stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,  in stmmac_enable_rx_queue()
6844 	stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,  in stmmac_enable_tx_queue()
6872 	for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)  in stmmac_xdp_release()
6897 	u32 rx_cnt = priv->plat->rx_queues_to_use;  in stmmac_xdp_open()
6898 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_xdp_open()
6925 		stmmac_init_chan(priv, priv->ioaddr, priv->plat->dma_cfg, chan);  in stmmac_xdp_open()
6936 		stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,  in stmmac_xdp_open()
6963 		stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,  in stmmac_xdp_open()
6993 	for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)  in stmmac_xdp_open()
7017 	if (queue >= priv->plat->rx_queues_to_use ||  in stmmac_xsk_wakeup()
7018 	    queue >= priv->plat->tx_queues_to_use)  in stmmac_xsk_wakeup()
7042 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_get_stats64()
7043 	u32 rx_cnt = priv->plat->rx_queues_to_use;  in stmmac_get_stats64()
7157 	if (priv->plat->flags & STMMAC_FLAG_HAS_SUN8I)  in stmmac_hw_init()
7176 		priv->plat->enh_desc = priv->dma_cap.enh_desc;  in stmmac_hw_init()
7177 		priv->plat->pmt = priv->dma_cap.pmt_remote_wake_up &&  in stmmac_hw_init()
7178 				!(priv->plat->flags & STMMAC_FLAG_USE_PHY_WOL);  in stmmac_hw_init()
7179 		priv->hw->pmt = priv->plat->pmt;  in stmmac_hw_init()
7188 		if (priv->plat->force_thresh_dma_mode)  in stmmac_hw_init()
7189 			priv->plat->tx_coe = 0;  in stmmac_hw_init()
7191 			priv->plat->tx_coe = priv->dma_cap.tx_coe;  in stmmac_hw_init()
7194 		priv->plat->rx_coe = priv->dma_cap.rx_coe;  in stmmac_hw_init()
7197 			priv->plat->rx_coe = STMMAC_RX_COE_TYPE2;  in stmmac_hw_init()
7199 			priv->plat->rx_coe = STMMAC_RX_COE_TYPE1;  in stmmac_hw_init()
7205 	if (priv->plat->rx_coe) {  in stmmac_hw_init()
7206 		priv->hw->rx_csum = priv->plat->rx_coe;  in stmmac_hw_init()
7211 	if (priv->plat->tx_coe)  in stmmac_hw_init()
7214 	if (priv->plat->pmt) {  in stmmac_hw_init()
7223 	    priv->plat->rx_queues_to_use > priv->dma_cap.number_rx_queues) {  in stmmac_hw_init()
7226 			 priv->plat->rx_queues_to_use);  in stmmac_hw_init()
7227 		priv->plat->rx_queues_to_use = priv->dma_cap.number_rx_queues;  in stmmac_hw_init()
7230 	    priv->plat->tx_queues_to_use > priv->dma_cap.number_tx_queues) {  in stmmac_hw_init()
7233 			 priv->plat->tx_queues_to_use);  in stmmac_hw_init()
7234 		priv->plat->tx_queues_to_use = priv->dma_cap.number_tx_queues;  in stmmac_hw_init()
7238 	    priv->plat->rx_fifo_size > priv->dma_cap.rx_fifo_size) {  in stmmac_hw_init()
7241 			 priv->plat->rx_fifo_size);  in stmmac_hw_init()
7242 		priv->plat->rx_fifo_size = priv->dma_cap.rx_fifo_size;  in stmmac_hw_init()
7245 	    priv->plat->tx_fifo_size > priv->dma_cap.tx_fifo_size) {  in stmmac_hw_init()
7248 			 priv->plat->tx_fifo_size);  in stmmac_hw_init()
7249 		priv->plat->tx_fifo_size = priv->dma_cap.tx_fifo_size;  in stmmac_hw_init()
7253 		(priv->plat->flags & STMMAC_FLAG_VLAN_FAIL_Q_EN);  in stmmac_hw_init()
7254 	priv->hw->vlan_fail_q = priv->plat->vlan_fail_q;  in stmmac_hw_init()
7269 	    (priv->plat->has_xgmac)) && (!priv->plat->riwt_off)) {  in stmmac_hw_init()
7283 	maxq = max(priv->plat->rx_queues_to_use, priv->plat->tx_queues_to_use);  in stmmac_napi_add()
7292 		if (queue < priv->plat->rx_queues_to_use) {  in stmmac_napi_add()
7295 		if (queue < priv->plat->tx_queues_to_use) {  in stmmac_napi_add()
7299 		if (queue < priv->plat->rx_queues_to_use &&  in stmmac_napi_add()
7300 		    queue < priv->plat->tx_queues_to_use) {  in stmmac_napi_add()
7312 	maxq = max(priv->plat->rx_queues_to_use, priv->plat->tx_queues_to_use);  in stmmac_napi_del()
7317 		if (queue < priv->plat->rx_queues_to_use)  in stmmac_napi_del()
7319 		if (queue < priv->plat->tx_queues_to_use)  in stmmac_napi_del()
7321 		if (queue < priv->plat->rx_queues_to_use &&  in stmmac_napi_del()
7322 		    queue < priv->plat->tx_queues_to_use) {  in stmmac_napi_del()
7338 	priv->plat->rx_queues_to_use = rx_cnt;  in stmmac_reinit_queues()
7339 	priv->plat->tx_queues_to_use = tx_cnt;  in stmmac_reinit_queues()
7383 	if (priv->plat->has_gmac4 || priv->plat->has_xgmac)  in stmmac_xdp_rx_timestamp()
7389 		ns -= priv->plat->cdc_error_adj;  in stmmac_xdp_rx_timestamp()
7445 	priv->plat = plat_dat;  in stmmac_dvr_probe()
7448 	priv->plat->dma_cfg->multi_msi_en =  in stmmac_dvr_probe()
7449 		(priv->plat->flags & STMMAC_FLAG_MULTI_MSI_EN);  in stmmac_dvr_probe()
7490 		priv->plat->phy_addr = phyaddr;  in stmmac_dvr_probe()
7492 	if (priv->plat->stmmac_rst) {  in stmmac_dvr_probe()
7493 		ret = reset_control_assert(priv->plat->stmmac_rst);  in stmmac_dvr_probe()
7494 		reset_control_deassert(priv->plat->stmmac_rst);  in stmmac_dvr_probe()
7499 			reset_control_reset(priv->plat->stmmac_rst);  in stmmac_dvr_probe()
7502 	ret = reset_control_deassert(priv->plat->stmmac_ahb_rst);  in stmmac_dvr_probe()
7518 		priv->plat->dma_cfg->dche = false;  in stmmac_dvr_probe()
7537 	if ((priv->plat->flags & STMMAC_FLAG_TSO_EN) && (priv->dma_cap.tsoen)) {  in stmmac_dvr_probe()
7539 		if (priv->plat->has_gmac4)  in stmmac_dvr_probe()
7546 	    !(priv->plat->flags & STMMAC_FLAG_SPH_DISABLE)) {  in stmmac_dvr_probe()
7558 	if (priv->plat->host_dma_width)  in stmmac_dvr_probe()
7559 		priv->dma_cap.host_dma_width = priv->plat->host_dma_width;  in stmmac_dvr_probe()
7575 				priv->plat->dma_cfg->eame = true;  in stmmac_dvr_probe()
7592 	if (priv->plat->has_gmac4) {  in stmmac_dvr_probe()
7611 	rxq = priv->plat->rx_queues_to_use;  in stmmac_dvr_probe()
7616 	if (priv->dma_cap.rssen && priv->plat->rss_en)  in stmmac_dvr_probe()
7623 	if (priv->plat->has_xgmac)  in stmmac_dvr_probe()
7625 	else if ((priv->plat->enh_desc) || (priv->synopsys_id >= DWMAC_CORE_4_00))  in stmmac_dvr_probe()
7629 	/* Will not overwrite ndev->max_mtu if plat->maxmtu > ndev->max_mtu  in stmmac_dvr_probe()
7630 	 * as well as plat->maxmtu < ndev->min_mtu which is a invalid range.  in stmmac_dvr_probe()
7632 	if ((priv->plat->maxmtu < ndev->max_mtu) &&  in stmmac_dvr_probe()
7633 	    (priv->plat->maxmtu >= ndev->min_mtu))  in stmmac_dvr_probe()
7634 		ndev->max_mtu = priv->plat->maxmtu;  in stmmac_dvr_probe()
7635 	else if (priv->plat->maxmtu < ndev->min_mtu)  in stmmac_dvr_probe()
7638 			 __func__, priv->plat->maxmtu);  in stmmac_dvr_probe()
7658 	if (priv->plat->clk_csr >= 0)  in stmmac_dvr_probe()
7659 		priv->clk_csr = priv->plat->clk_csr;  in stmmac_dvr_probe()
7674 			      priv->plat->bus_id);  in stmmac_dvr_probe()
7678 	if (priv->plat->speed_mode_2500)  in stmmac_dvr_probe()
7679 		priv->plat->speed_mode_2500(ndev, priv->plat->bsp_priv);  in stmmac_dvr_probe()
7702 	if (priv->plat->dump_debug_regs)  in stmmac_dvr_probe()
7703 		priv->plat->dump_debug_regs(priv->plat->bsp_priv);  in stmmac_dvr_probe()
7752 	if (priv->plat->stmmac_rst)  in stmmac_dvr_remove()
7753 		reset_control_assert(priv->plat->stmmac_rst);  in stmmac_dvr_remove()
7754 	reset_control_assert(priv->plat->stmmac_ahb_rst);  in stmmac_dvr_remove()
7790 	for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)  in stmmac_suspend()
7801 	if (priv->plat->serdes_powerdown)  in stmmac_suspend()
7802 		priv->plat->serdes_powerdown(ndev, priv->plat->bsp_priv);  in stmmac_suspend()
7805 	if (device_may_wakeup(priv->device) && priv->plat->pmt) {  in stmmac_suspend()
7816 	if (device_may_wakeup(priv->device) && priv->plat->pmt) {  in stmmac_suspend()
7858 	u32 rx_cnt = priv->plat->rx_queues_to_use;  in stmmac_reset_queues_param()
7859 	u32 tx_cnt = priv->plat->tx_queues_to_use;  in stmmac_reset_queues_param()
7890 	if (device_may_wakeup(priv->device) && priv->plat->pmt) {  in stmmac_resume()
7902 	if (!(priv->plat->flags & STMMAC_FLAG_SERDES_UP_AFTER_PHY_LINKUP) &&  in stmmac_resume()
7903 	    priv->plat->serdes_powerup) {  in stmmac_resume()
7904 		ret = priv->plat->serdes_powerup(ndev,  in stmmac_resume()
7905 						 priv->plat->bsp_priv);  in stmmac_resume()
7912 	if (device_may_wakeup(priv->device) && priv->plat->pmt) {  in stmmac_resume()