Lines Matching +full:x +full:- +full:rc
1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright 2005-2018 Solarflare Communications Inc.
5 * Copyright 2019-2022 Xilinx Inc.
44 /* Number of bytes to offset when reading bit position x with dword accessors. */
45 #define ROUND_DOWN_TO_DWORD(x) (((x) & (~31)) >> 3) argument
47 #define EXTRACT_BITS(x, lbn, width) \ argument
48 (((x) >> ((lbn) & 31)) & ((1ull << (width)) - 1))
73 netif_dbg(efx, probe, efx->net_dev, in ef100_pci_parse_ef100_entry()
74 "Found EF100 function control window bar=%d offset=0x%llx\n", in ef100_pci_parse_ef100_entry()
77 if (result->valid) { in ef100_pci_parse_ef100_entry()
78 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_ef100_entry()
80 return -EINVAL; in ef100_pci_parse_ef100_entry()
85 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_ef100_entry()
88 return -EINVAL; in ef100_pci_parse_ef100_entry()
91 result->bar = bar; in ef100_pci_parse_ef100_entry()
92 result->offset = offset; in ef100_pci_parse_ef100_entry()
93 result->valid = true; in ef100_pci_parse_ef100_entry()
101 pci_resource_len(efx->pci_dev, bar); in ef100_pci_does_bar_overflow()
105 * sub-table.
113 int rc = 0; in ef100_pci_parse_continue_entry() local
123 previous_bar = efx->mem_bar; in ef100_pci_parse_continue_entry()
127 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_continue_entry()
128 "Bad BAR value of %d in Xilinx capabilities sub-table.\n", in ef100_pci_parse_continue_entry()
130 return -EINVAL; in ef100_pci_parse_continue_entry()
137 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_continue_entry()
138 "Xilinx table will overrun BAR[%d] offset=0x%llx\n", in ef100_pci_parse_continue_entry()
140 return -EINVAL; in ef100_pci_parse_continue_entry()
144 rc = efx_init_io(efx, bar, in ef100_pci_parse_continue_entry()
146 pci_resource_len(efx->pci_dev, bar)); in ef100_pci_parse_continue_entry()
147 if (rc) { in ef100_pci_parse_continue_entry()
148 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_continue_entry()
149 "Mapping new BAR for Xilinx table failed, rc=%d\n", rc); in ef100_pci_parse_continue_entry()
150 return rc; in ef100_pci_parse_continue_entry()
154 rc = ef100_pci_walk_xilinx_table(efx, offset, result); in ef100_pci_parse_continue_entry()
155 if (rc) in ef100_pci_parse_continue_entry()
156 return rc; in ef100_pci_parse_continue_entry()
162 rc = efx_init_io(efx, previous_bar, in ef100_pci_parse_continue_entry()
164 pci_resource_len(efx->pci_dev, previous_bar)); in ef100_pci_parse_continue_entry()
165 if (rc) { in ef100_pci_parse_continue_entry()
166 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_continue_entry()
167 "Putting old BAR back failed, rc=%d\n", rc); in ef100_pci_parse_continue_entry()
168 return rc; in ef100_pci_parse_continue_entry()
183 int rc = 0; in ef100_pci_walk_xilinx_table() local
196 netif_dbg(efx, probe, efx->net_dev, in ef100_pci_walk_xilinx_table()
197 "Seen Xilinx table entry 0x%x size 0x%x at 0x%llx in BAR[%d]\n", in ef100_pci_walk_xilinx_table()
198 id, entry_size, current_entry, efx->mem_bar); in ef100_pci_walk_xilinx_table()
201 netif_err(efx, probe, efx->net_dev, in ef100_pci_walk_xilinx_table()
202 "Xilinx table entry too short len=0x%x\n", entry_size); in ef100_pci_walk_xilinx_table()
203 return -EINVAL; in ef100_pci_walk_xilinx_table()
210 netif_err(efx, probe, efx->net_dev, in ef100_pci_walk_xilinx_table()
213 return -EINVAL; in ef100_pci_walk_xilinx_table()
216 rc = ef100_pci_parse_ef100_entry(efx, current_entry, in ef100_pci_walk_xilinx_table()
218 if (rc) in ef100_pci_walk_xilinx_table()
219 return rc; in ef100_pci_walk_xilinx_table()
223 netif_err(efx, probe, efx->net_dev, in ef100_pci_walk_xilinx_table()
226 return -EINVAL; in ef100_pci_walk_xilinx_table()
229 rc = ef100_pci_parse_continue_entry(efx, current_entry, result); in ef100_pci_walk_xilinx_table()
230 if (rc) in ef100_pci_walk_xilinx_table()
231 return rc; in ef100_pci_walk_xilinx_table()
243 if (ef100_pci_does_bar_overflow(efx, efx->mem_bar, current_entry)) { in ef100_pci_walk_xilinx_table()
244 netif_err(efx, probe, efx->net_dev, in ef100_pci_walk_xilinx_table()
245 "Xilinx table overrun at position=0x%llx.\n", in ef100_pci_walk_xilinx_table()
247 return -EINVAL; in ef100_pci_walk_xilinx_table()
256 int rc, pos = structure_start + ROUND_DOWN_TO_DWORD(lbn); in _ef100_pci_get_config_bits_with_width() local
259 rc = pci_read_config_dword(efx->pci_dev, pos, &temp); in _ef100_pci_get_config_bits_with_width()
260 if (rc) { in _ef100_pci_get_config_bits_with_width()
261 netif_err(efx, probe, efx->net_dev, in _ef100_pci_get_config_bits_with_width()
264 return rc; in _ef100_pci_get_config_bits_with_width()
288 int rc = 0; in ef100_pci_parse_xilinx_cap() local
290 rc = ef100_pci_get_config_bits(efx, vndr_cap, TBL_BAR, &bar); in ef100_pci_parse_xilinx_cap()
291 if (rc) { in ef100_pci_parse_xilinx_cap()
292 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_xilinx_cap()
293 "Failed to read ESF_GZ_VSEC_TBL_BAR, rc=%d\n", in ef100_pci_parse_xilinx_cap()
294 rc); in ef100_pci_parse_xilinx_cap()
295 return rc; in ef100_pci_parse_xilinx_cap()
300 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_xilinx_cap()
301 "Bad BAR value of %d in Xilinx capabilities sub-table.\n", in ef100_pci_parse_xilinx_cap()
303 return -EINVAL; in ef100_pci_parse_xilinx_cap()
306 rc = ef100_pci_get_config_bits(efx, vndr_cap, TBL_OFF_LO, &offset_lo); in ef100_pci_parse_xilinx_cap()
307 if (rc) { in ef100_pci_parse_xilinx_cap()
308 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_xilinx_cap()
309 "Failed to read ESF_GZ_VSEC_TBL_OFF_LO, rc=%d\n", in ef100_pci_parse_xilinx_cap()
310 rc); in ef100_pci_parse_xilinx_cap()
311 return rc; in ef100_pci_parse_xilinx_cap()
316 rc = ef100_pci_get_config_bits(efx, vndr_cap, TBL_OFF_HI, &offset_high); in ef100_pci_parse_xilinx_cap()
317 if (rc) { in ef100_pci_parse_xilinx_cap()
318 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_xilinx_cap()
319 "Failed to read ESF_GZ_VSEC_TBL_OFF_HI, rc=%d\n", in ef100_pci_parse_xilinx_cap()
320 rc); in ef100_pci_parse_xilinx_cap()
321 return rc; in ef100_pci_parse_xilinx_cap()
328 if (offset > pci_resource_len(efx->pci_dev, bar) - sizeof(u32) * 2) { in ef100_pci_parse_xilinx_cap()
329 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_xilinx_cap()
330 "Xilinx table will overrun BAR[%d] offset=0x%llx\n", in ef100_pci_parse_xilinx_cap()
332 return -EINVAL; in ef100_pci_parse_xilinx_cap()
336 rc = efx_init_io(efx, bar, in ef100_pci_parse_xilinx_cap()
338 pci_resource_len(efx->pci_dev, bar)); in ef100_pci_parse_xilinx_cap()
339 if (rc) { in ef100_pci_parse_xilinx_cap()
340 netif_err(efx, probe, efx->net_dev, in ef100_pci_parse_xilinx_cap()
341 "efx_init_io failed, rc=%d\n", rc); in ef100_pci_parse_xilinx_cap()
342 return rc; in ef100_pci_parse_xilinx_cap()
345 rc = ef100_pci_walk_xilinx_table(efx, offset, result); in ef100_pci_parse_xilinx_cap()
349 return rc; in ef100_pci_parse_xilinx_cap()
361 result->valid = false; in ef100_pci_find_func_ctrl_window()
363 while ((cap = pci_find_next_ext_capability(efx->pci_dev, cap, PCI_EXT_CAP_ID_VNDR)) != 0) { in ef100_pci_find_func_ctrl_window()
368 int rc = 0; in ef100_pci_find_func_ctrl_window() local
372 rc = ef100_pci_get_config_bits(efx, vndr_cap, ID, &vsec_id); in ef100_pci_find_func_ctrl_window()
373 if (rc) { in ef100_pci_find_func_ctrl_window()
374 netif_err(efx, probe, efx->net_dev, in ef100_pci_find_func_ctrl_window()
375 "Failed to read ESF_GZ_VSEC_ID, rc=%d\n", in ef100_pci_find_func_ctrl_window()
376 rc); in ef100_pci_find_func_ctrl_window()
377 return rc; in ef100_pci_find_func_ctrl_window()
380 rc = ef100_pci_get_config_bits(efx, vndr_cap, VER, &vsec_ver); in ef100_pci_find_func_ctrl_window()
381 if (rc) { in ef100_pci_find_func_ctrl_window()
382 netif_err(efx, probe, efx->net_dev, in ef100_pci_find_func_ctrl_window()
383 "Failed to read ESF_GZ_VSEC_VER, rc=%d\n", in ef100_pci_find_func_ctrl_window()
384 rc); in ef100_pci_find_func_ctrl_window()
385 return rc; in ef100_pci_find_func_ctrl_window()
388 /* Get length of whole capability - i.e. starting at cap */ in ef100_pci_find_func_ctrl_window()
389 rc = ef100_pci_get_config_bits(efx, vndr_cap, LEN, &vsec_len); in ef100_pci_find_func_ctrl_window()
390 if (rc) { in ef100_pci_find_func_ctrl_window()
391 netif_err(efx, probe, efx->net_dev, in ef100_pci_find_func_ctrl_window()
392 "Failed to read ESF_GZ_VSEC_LEN, rc=%d\n", in ef100_pci_find_func_ctrl_window()
393 rc); in ef100_pci_find_func_ctrl_window()
394 return rc; in ef100_pci_find_func_ctrl_window()
402 rc = ef100_pci_parse_xilinx_cap(efx, vndr_cap, in ef100_pci_find_func_ctrl_window()
404 if (rc) in ef100_pci_find_func_ctrl_window()
405 return rc; in ef100_pci_find_func_ctrl_window()
409 if (num_xilinx_caps && !result->valid) { in ef100_pci_find_func_ctrl_window()
410 netif_err(efx, probe, efx->net_dev, in ef100_pci_find_func_ctrl_window()
413 return -EINVAL; in ef100_pci_find_func_ctrl_window()
453 int rc; in ef100_pci_probe() local
458 return -ENOMEM; in ef100_pci_probe()
459 probe_data->pci_dev = pci_dev; in ef100_pci_probe()
460 efx = &probe_data->efx; in ef100_pci_probe()
462 efx->type = (const struct efx_nic_type *)entry->driver_data; in ef100_pci_probe()
464 efx->pci_dev = pci_dev; in ef100_pci_probe()
466 rc = efx_init_struct(efx, pci_dev); in ef100_pci_probe()
467 if (rc) in ef100_pci_probe()
470 efx->vi_stride = EF100_DEFAULT_VI_STRIDE; in ef100_pci_probe()
473 rc = ef100_pci_find_func_ctrl_window(efx, &fcw); in ef100_pci_probe()
474 if (rc) { in ef100_pci_probe()
476 "Error looking for ef100 function control window, rc=%d\n", in ef100_pci_probe()
477 rc); in ef100_pci_probe()
482 /* Extended capability not found - use defaults. */ in ef100_pci_probe()
488 if (fcw.offset > pci_resource_len(efx->pci_dev, fcw.bar) - ESE_GZ_FCW_LEN) { in ef100_pci_probe()
490 rc = -EIO; in ef100_pci_probe()
495 rc = efx_init_io(efx, fcw.bar, in ef100_pci_probe()
497 pci_resource_len(efx->pci_dev, fcw.bar)); in ef100_pci_probe()
498 if (rc) in ef100_pci_probe()
501 efx->reg_base = fcw.offset; in ef100_pci_probe()
503 rc = efx->type->probe(efx); in ef100_pci_probe()
504 if (rc) in ef100_pci_probe()
507 efx->state = STATE_PROBED; in ef100_pci_probe()
508 rc = ef100_probe_netdev(probe_data); in ef100_pci_probe()
509 if (rc) in ef100_pci_probe()
518 return rc; in ef100_pci_probe()
525 int rc; in ef100_pci_sriov_configure() local
527 if (efx->type->sriov_configure) { in ef100_pci_sriov_configure()
528 rc = efx->type->sriov_configure(efx, num_vfs); in ef100_pci_sriov_configure()
529 if (rc) in ef100_pci_sriov_configure()
530 return rc; in ef100_pci_sriov_configure()
534 return -ENOENT; in ef100_pci_sriov_configure()