Lines Matching +full:70 +full:h
11 #include "sparx5_regs.h"
29 [RC_ANA_ACL_VCAP_S2_CFG] = 70,
42 [RC_HSCH_PORT_MODE] = 70,
43 [RC_QFWD_SWITCH_PORT_MODE] = 70,
44 [RC_QSYS_PAUSE_CFG] = 70,
45 [RC_QSYS_ATOP] = 70,
46 [RC_QSYS_FWD_PRESSURE] = 70,
49 [RC_REW_RTAG_ETAG_CTRL] = 70,
116 [GC_ANA_AC_STAT_CNT_CFG_PORT] = 70,
122 [GC_ANA_CL_PORT] = 70,
134 [GC_REW_PORT] = 70,