Lines Matching full:eth
865 struct airoha_eth *eth; member
932 #define airoha_fe_rr(eth, offset) \ argument
933 airoha_rr((eth)->fe_regs, (offset))
934 #define airoha_fe_wr(eth, offset, val) \ argument
935 airoha_wr((eth)->fe_regs, (offset), (val))
936 #define airoha_fe_rmw(eth, offset, mask, val) \ argument
937 airoha_rmw((eth)->fe_regs, (offset), (mask), (val))
938 #define airoha_fe_set(eth, offset, val) \ argument
939 airoha_rmw((eth)->fe_regs, (offset), 0, (val))
940 #define airoha_fe_clear(eth, offset, val) \ argument
941 airoha_rmw((eth)->fe_regs, (offset), (val), 0)
998 struct airoha_eth *eth = port->qdma->eth; in airoha_set_macaddr() local
1004 airoha_fe_wr(eth, reg, val); in airoha_set_macaddr()
1007 airoha_fe_wr(eth, REG_FE_MAC_LMIN(reg), val); in airoha_set_macaddr()
1008 airoha_fe_wr(eth, REG_FE_MAC_LMAX(reg), val); in airoha_set_macaddr()
1011 static void airoha_set_gdm_port_fwd_cfg(struct airoha_eth *eth, u32 addr, in airoha_set_gdm_port_fwd_cfg() argument
1014 airoha_fe_rmw(eth, addr, GDM_OCFQ_MASK, in airoha_set_gdm_port_fwd_cfg()
1016 airoha_fe_rmw(eth, addr, GDM_MCFQ_MASK, in airoha_set_gdm_port_fwd_cfg()
1018 airoha_fe_rmw(eth, addr, GDM_BCFQ_MASK, in airoha_set_gdm_port_fwd_cfg()
1020 airoha_fe_rmw(eth, addr, GDM_UCFQ_MASK, in airoha_set_gdm_port_fwd_cfg()
1024 static int airoha_set_gdm_port(struct airoha_eth *eth, int port, bool enable) in airoha_set_gdm_port() argument
1051 airoha_fe_set(eth, REG_FE_VIP_PORT_EN, vip_port); in airoha_set_gdm_port()
1052 airoha_fe_set(eth, REG_FE_IFC_PORT_EN, vip_port); in airoha_set_gdm_port()
1054 airoha_fe_clear(eth, REG_FE_VIP_PORT_EN, vip_port); in airoha_set_gdm_port()
1055 airoha_fe_clear(eth, REG_FE_IFC_PORT_EN, vip_port); in airoha_set_gdm_port()
1058 airoha_set_gdm_port_fwd_cfg(eth, cfg_addr, val); in airoha_set_gdm_port()
1063 static int airoha_set_gdm_ports(struct airoha_eth *eth, bool enable) in airoha_set_gdm_ports() argument
1074 err = airoha_set_gdm_port(eth, port_list[i], enable); in airoha_set_gdm_ports()
1083 airoha_set_gdm_port(eth, port_list[i], false); in airoha_set_gdm_ports()
1088 static void airoha_fe_maccr_init(struct airoha_eth *eth) in airoha_fe_maccr_init() argument
1092 for (p = 1; p <= ARRAY_SIZE(eth->ports); p++) { in airoha_fe_maccr_init()
1093 airoha_fe_set(eth, REG_GDM_FWD_CFG(p), in airoha_fe_maccr_init()
1096 airoha_set_gdm_port_fwd_cfg(eth, REG_GDM_FWD_CFG(p), in airoha_fe_maccr_init()
1098 airoha_fe_rmw(eth, REG_GDM_LEN_CFG(p), in airoha_fe_maccr_init()
1104 airoha_fe_rmw(eth, REG_CDM1_VLAN_CTRL, CDM1_VLAN_MASK, in airoha_fe_maccr_init()
1107 airoha_fe_set(eth, REG_FE_CPORT_CFG, FE_CPORT_PAD); in airoha_fe_maccr_init()
1110 static void airoha_fe_vip_setup(struct airoha_eth *eth) in airoha_fe_vip_setup() argument
1112 airoha_fe_wr(eth, REG_FE_VIP_PATN(3), ETH_P_PPP_DISC); in airoha_fe_vip_setup()
1113 airoha_fe_wr(eth, REG_FE_VIP_EN(3), PATN_FCPU_EN_MASK | PATN_EN_MASK); in airoha_fe_vip_setup()
1115 airoha_fe_wr(eth, REG_FE_VIP_PATN(4), PPP_LCP); in airoha_fe_vip_setup()
1116 airoha_fe_wr(eth, REG_FE_VIP_EN(4), in airoha_fe_vip_setup()
1120 airoha_fe_wr(eth, REG_FE_VIP_PATN(6), PPP_IPCP); in airoha_fe_vip_setup()
1121 airoha_fe_wr(eth, REG_FE_VIP_EN(6), in airoha_fe_vip_setup()
1125 airoha_fe_wr(eth, REG_FE_VIP_PATN(7), PPP_CHAP); in airoha_fe_vip_setup()
1126 airoha_fe_wr(eth, REG_FE_VIP_EN(7), in airoha_fe_vip_setup()
1131 airoha_fe_wr(eth, REG_FE_VIP_PATN(8), 0x43); in airoha_fe_vip_setup()
1132 airoha_fe_wr(eth, REG_FE_VIP_EN(8), in airoha_fe_vip_setup()
1137 airoha_fe_wr(eth, REG_FE_VIP_PATN(9), 0x44); in airoha_fe_vip_setup()
1138 airoha_fe_wr(eth, REG_FE_VIP_EN(9), in airoha_fe_vip_setup()
1143 airoha_fe_wr(eth, REG_FE_VIP_PATN(10), 0x1f401f4); in airoha_fe_vip_setup()
1144 airoha_fe_wr(eth, REG_FE_VIP_EN(10), in airoha_fe_vip_setup()
1148 airoha_fe_wr(eth, REG_FE_VIP_PATN(11), PPP_IPV6CP); in airoha_fe_vip_setup()
1149 airoha_fe_wr(eth, REG_FE_VIP_EN(11), in airoha_fe_vip_setup()
1154 airoha_fe_wr(eth, REG_FE_VIP_PATN(12), 0x2220223); in airoha_fe_vip_setup()
1155 airoha_fe_wr(eth, REG_FE_VIP_EN(12), in airoha_fe_vip_setup()
1159 airoha_fe_wr(eth, REG_FE_VIP_PATN(19), PPP_PAP); in airoha_fe_vip_setup()
1160 airoha_fe_wr(eth, REG_FE_VIP_EN(19), in airoha_fe_vip_setup()
1164 /* ETH->ETH_P_1905 (0x893a) */ in airoha_fe_vip_setup()
1165 airoha_fe_wr(eth, REG_FE_VIP_PATN(20), 0x893a); in airoha_fe_vip_setup()
1166 airoha_fe_wr(eth, REG_FE_VIP_EN(20), in airoha_fe_vip_setup()
1169 airoha_fe_wr(eth, REG_FE_VIP_PATN(21), ETH_P_LLDP); in airoha_fe_vip_setup()
1170 airoha_fe_wr(eth, REG_FE_VIP_EN(21), in airoha_fe_vip_setup()
1174 static u32 airoha_fe_get_pse_queue_rsv_pages(struct airoha_eth *eth, in airoha_fe_get_pse_queue_rsv_pages() argument
1179 airoha_fe_rmw(eth, REG_FE_PSE_QUEUE_CFG_WR, in airoha_fe_get_pse_queue_rsv_pages()
1183 val = airoha_fe_rr(eth, REG_FE_PSE_QUEUE_CFG_VAL); in airoha_fe_get_pse_queue_rsv_pages()
1188 static void airoha_fe_set_pse_queue_rsv_pages(struct airoha_eth *eth, in airoha_fe_set_pse_queue_rsv_pages() argument
1191 airoha_fe_rmw(eth, REG_FE_PSE_QUEUE_CFG_VAL, PSE_CFG_OQ_RSV_MASK, in airoha_fe_set_pse_queue_rsv_pages()
1193 airoha_fe_rmw(eth, REG_FE_PSE_QUEUE_CFG_WR, in airoha_fe_set_pse_queue_rsv_pages()
1201 static u32 airoha_fe_get_pse_all_rsv(struct airoha_eth *eth) in airoha_fe_get_pse_all_rsv() argument
1203 u32 val = airoha_fe_rr(eth, REG_FE_PSE_BUF_SET); in airoha_fe_get_pse_all_rsv()
1208 static int airoha_fe_set_pse_oq_rsv(struct airoha_eth *eth, in airoha_fe_set_pse_oq_rsv() argument
1211 u32 orig_val = airoha_fe_get_pse_queue_rsv_pages(eth, port, queue); in airoha_fe_set_pse_oq_rsv()
1214 airoha_fe_set_pse_queue_rsv_pages(eth, port, queue, val); in airoha_fe_set_pse_oq_rsv()
1217 all_rsv = airoha_fe_get_pse_all_rsv(eth); in airoha_fe_set_pse_oq_rsv()
1219 airoha_fe_rmw(eth, REG_FE_PSE_BUF_SET, PSE_ALLRSV_MASK, in airoha_fe_set_pse_oq_rsv()
1223 tmp = airoha_fe_rr(eth, PSE_FQ_CFG); in airoha_fe_set_pse_oq_rsv()
1226 airoha_fe_rmw(eth, REG_PSE_SHARE_USED_THD, in airoha_fe_set_pse_oq_rsv()
1231 airoha_fe_rmw(eth, REG_PSE_SHARE_USED_THD, in airoha_fe_set_pse_oq_rsv()
1235 airoha_fe_rmw(eth, REG_FE_PSE_BUF_SET, in airoha_fe_set_pse_oq_rsv()
1242 static void airoha_fe_pse_ports_init(struct airoha_eth *eth) in airoha_fe_pse_ports_init() argument
1260 all_rsv = airoha_fe_get_pse_all_rsv(eth); in airoha_fe_pse_ports_init()
1263 airoha_fe_set(eth, REG_FE_PSE_BUF_SET, all_rsv); in airoha_fe_pse_ports_init()
1267 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_CDM1, q, in airoha_fe_pse_ports_init()
1271 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_GDM1, q, in airoha_fe_pse_ports_init()
1275 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_GDM2, q, 0); in airoha_fe_pse_ports_init()
1278 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_GDM3, q, in airoha_fe_pse_ports_init()
1283 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_PPE1, q, in airoha_fe_pse_ports_init()
1286 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_PPE1, q, 0); in airoha_fe_pse_ports_init()
1290 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_CDM2, q, in airoha_fe_pse_ports_init()
1294 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_CDM3, q, 0); in airoha_fe_pse_ports_init()
1297 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_CDM4, q, in airoha_fe_pse_ports_init()
1302 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_PPE2, q, in airoha_fe_pse_ports_init()
1305 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_PPE2, q, 0); in airoha_fe_pse_ports_init()
1309 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_GDM4, q, in airoha_fe_pse_ports_init()
1313 airoha_fe_set_pse_oq_rsv(eth, FE_PSE_PORT_CDM5, q, in airoha_fe_pse_ports_init()
1317 static int airoha_fe_mc_vlan_clear(struct airoha_eth *eth) in airoha_fe_mc_vlan_clear() argument
1325 airoha_fe_wr(eth, REG_MC_VLAN_DATA, 0x0); in airoha_fe_mc_vlan_clear()
1329 airoha_fe_wr(eth, REG_MC_VLAN_CFG, val); in airoha_fe_mc_vlan_clear()
1333 false, eth, REG_MC_VLAN_CFG); in airoha_fe_mc_vlan_clear()
1338 airoha_fe_wr(eth, REG_MC_VLAN_DATA, 0x0); in airoha_fe_mc_vlan_clear()
1343 airoha_fe_wr(eth, REG_MC_VLAN_CFG, val); in airoha_fe_mc_vlan_clear()
1347 5 * USEC_PER_MSEC, false, eth, in airoha_fe_mc_vlan_clear()
1357 static void airoha_fe_crsn_qsel_init(struct airoha_eth *eth) in airoha_fe_crsn_qsel_init() argument
1360 airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_22 >> 2), in airoha_fe_crsn_qsel_init()
1364 airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_08 >> 2), in airoha_fe_crsn_qsel_init()
1368 airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_21 >> 2), in airoha_fe_crsn_qsel_init()
1372 airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_24 >> 2), in airoha_fe_crsn_qsel_init()
1376 airoha_fe_rmw(eth, REG_CDM1_CRSN_QSEL(CRSN_25 >> 2), in airoha_fe_crsn_qsel_init()
1381 airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_08 >> 2), in airoha_fe_crsn_qsel_init()
1385 airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_21 >> 2), in airoha_fe_crsn_qsel_init()
1389 airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_22 >> 2), in airoha_fe_crsn_qsel_init()
1393 airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_24 >> 2), in airoha_fe_crsn_qsel_init()
1397 airoha_fe_rmw(eth, REG_CDM2_CRSN_QSEL(CRSN_25 >> 2), in airoha_fe_crsn_qsel_init()
1403 static int airoha_fe_init(struct airoha_eth *eth) in airoha_fe_init() argument
1405 airoha_fe_maccr_init(eth); in airoha_fe_init()
1408 airoha_fe_rmw(eth, REG_PSE_IQ_REV1, PSE_IQ_RES1_P2_MASK, in airoha_fe_init()
1410 airoha_fe_rmw(eth, REG_PSE_IQ_REV2, in airoha_fe_init()
1416 airoha_fe_wr(eth, REG_FE_PCE_CFG, in airoha_fe_init()
1419 airoha_fe_rmw(eth, REG_CDM1_FWD_CFG, CDM1_VIP_QSEL_MASK, in airoha_fe_init()
1421 airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_VIP_QSEL_MASK, in airoha_fe_init()
1424 airoha_fe_rmw(eth, REG_GDM4_SRC_PORT_SET, in airoha_fe_init()
1433 airoha_fe_rmw(eth, REG_FE_DMA_GLO_CFG, in airoha_fe_init()
1437 airoha_fe_wr(eth, REG_FE_RST_GLO_CFG, in airoha_fe_init()
1445 airoha_fe_wr(eth, REG_FE_CDM1_OQ_MAP0, BIT(4)); in airoha_fe_init()
1446 airoha_fe_wr(eth, REG_FE_CDM1_OQ_MAP1, BIT(28)); in airoha_fe_init()
1447 airoha_fe_wr(eth, REG_FE_CDM1_OQ_MAP2, BIT(4)); in airoha_fe_init()
1448 airoha_fe_wr(eth, REG_FE_CDM1_OQ_MAP3, BIT(28)); in airoha_fe_init()
1450 airoha_fe_vip_setup(eth); in airoha_fe_init()
1451 airoha_fe_pse_ports_init(eth); in airoha_fe_init()
1453 airoha_fe_set(eth, REG_GDM_MISC_CFG, in airoha_fe_init()
1456 airoha_fe_rmw(eth, REG_CDM2_FWD_CFG, CDM2_OAM_QSEL_MASK, in airoha_fe_init()
1461 airoha_fe_rmw(eth, REG_IP_FRAG_FP, in airoha_fe_init()
1466 airoha_fe_rmw(eth, REG_IP_FRAG_FP, in airoha_fe_init()
1471 airoha_fe_set(eth, REG_GDM3_FWD_CFG, GDM3_PAD_EN_MASK); in airoha_fe_init()
1472 airoha_fe_set(eth, REG_GDM4_FWD_CFG, GDM4_PAD_EN_MASK); in airoha_fe_init()
1474 airoha_fe_crsn_qsel_init(eth); in airoha_fe_init()
1476 airoha_fe_clear(eth, REG_FE_CPORT_CFG, FE_CPORT_QUEUE_XFC_MASK); in airoha_fe_init()
1477 airoha_fe_set(eth, REG_FE_CPORT_CFG, FE_CPORT_PORT_XFC_MASK); in airoha_fe_init()
1480 airoha_fe_rmw(eth, REG_GDM2_CHN_RLS, in airoha_fe_init()
1486 airoha_fe_clear(eth, REG_FE_CSR_IFC_CFG, FE_IFC_EN_MASK); in airoha_fe_init()
1489 airoha_fe_set(eth, REG_MC_VLAN_EN, MC_VLAN_EN_MASK); in airoha_fe_init()
1491 return airoha_fe_mc_vlan_clear(eth); in airoha_fe_init()
1498 struct airoha_eth *eth = qdma->eth; in airoha_qdma_fill_rx_queue() local
1522 dma_sync_single_for_device(eth->dev, e->dma_addr, e->dma_len, in airoha_qdma_fill_rx_queue()
1543 static int airoha_qdma_get_gdm_port(struct airoha_eth *eth, in airoha_qdma_get_gdm_port() argument
1560 return port >= ARRAY_SIZE(eth->ports) ? -EINVAL : port; in airoha_qdma_get_gdm_port()
1567 struct airoha_eth *eth = qdma->eth; in airoha_qdma_rx_process() local
1592 dma_sync_single_for_cpu(eth->dev, dma_addr, in airoha_qdma_rx_process()
1595 p = airoha_qdma_get_gdm_port(eth, desc); in airoha_qdma_rx_process()
1596 if (p < 0 || !eth->ports[p]) { in airoha_qdma_rx_process()
1614 skb->dev = eth->ports[p]->dev; in airoha_qdma_rx_process()
1654 .dev = qdma->eth->dev, in airoha_qdma_init_rx_queue()
1657 struct airoha_eth *eth = qdma->eth; in airoha_qdma_init_rx_queue() local
1665 q->entry = devm_kzalloc(eth->dev, q->ndesc * sizeof(*q->entry), in airoha_qdma_init_rx_queue()
1678 q->desc = dmam_alloc_coherent(eth->dev, q->ndesc * sizeof(*q->desc), in airoha_qdma_init_rx_queue()
1683 netif_napi_add(eth->napi_dev, &q->napi, airoha_qdma_rx_napi_poll); in airoha_qdma_init_rx_queue()
1703 struct airoha_eth *eth = q->qdma->eth; in airoha_qdma_cleanup_rx_queue() local
1709 dma_sync_single_for_cpu(eth->dev, e->dma_addr, e->dma_len, in airoha_qdma_cleanup_rx_queue()
1743 struct airoha_eth *eth; in airoha_qdma_tx_napi_poll() local
1749 eth = qdma->eth; in airoha_qdma_tx_napi_poll()
1799 dma_unmap_single(eth->dev, e->dma_addr, e->dma_len, in airoha_qdma_tx_napi_poll()
1850 struct airoha_eth *eth = qdma->eth; in airoha_qdma_init_tx_queue() local
1859 q->entry = devm_kzalloc(eth->dev, q->ndesc * sizeof(*q->entry), in airoha_qdma_init_tx_queue()
1864 q->desc = dmam_alloc_coherent(eth->dev, q->ndesc * sizeof(*q->desc), in airoha_qdma_init_tx_queue()
1893 struct airoha_eth *eth = qdma->eth; in airoha_qdma_tx_irq_init() local
1896 netif_napi_add_tx(eth->napi_dev, &irq_q->napi, in airoha_qdma_tx_irq_init()
1898 irq_q->q = dmam_alloc_coherent(eth->dev, size * sizeof(u32), in airoha_qdma_tx_irq_init()
1939 struct airoha_eth *eth = q->qdma->eth; in airoha_qdma_cleanup_tx_queue() local
1945 dma_unmap_single(eth->dev, e->dma_addr, e->dma_len, in airoha_qdma_cleanup_tx_queue()
1958 struct airoha_eth *eth = qdma->eth; in airoha_qdma_init_hfwd_queues() local
1964 qdma->hfwd.desc = dmam_alloc_coherent(eth->dev, size, &dma_addr, in airoha_qdma_init_hfwd_queues()
1972 qdma->hfwd.q = dmam_alloc_coherent(eth->dev, size, &dma_addr, in airoha_qdma_init_hfwd_queues()
2134 if (!test_bit(DEV_STATE_INITIALIZED, &qdma->eth->state)) in airoha_irq_handler()
2165 struct airoha_eth *eth, in airoha_qdma_init() argument
2168 int err, id = qdma - ð->qdma[0]; in airoha_qdma_init()
2172 qdma->eth = eth; in airoha_qdma_init()
2174 res = devm_kasprintf(eth->dev, GFP_KERNEL, "qdma%d", id); in airoha_qdma_init()
2180 return dev_err_probe(eth->dev, PTR_ERR(qdma->regs), in airoha_qdma_init()
2187 err = devm_request_irq(eth->dev, qdma->irq, airoha_irq_handler, in airoha_qdma_init()
2208 struct airoha_eth *eth) in airoha_hw_init() argument
2213 err = reset_control_bulk_assert(ARRAY_SIZE(eth->xsi_rsts), in airoha_hw_init()
2214 eth->xsi_rsts); in airoha_hw_init()
2218 err = reset_control_bulk_assert(ARRAY_SIZE(eth->rsts), eth->rsts); in airoha_hw_init()
2223 err = reset_control_bulk_deassert(ARRAY_SIZE(eth->rsts), eth->rsts); in airoha_hw_init()
2228 err = airoha_fe_init(eth); in airoha_hw_init()
2232 for (i = 0; i < ARRAY_SIZE(eth->qdma); i++) { in airoha_hw_init()
2233 err = airoha_qdma_init(pdev, eth, ð->qdma[i]); in airoha_hw_init()
2238 set_bit(DEV_STATE_INITIALIZED, ð->state); in airoha_hw_init()
2300 struct airoha_eth *eth = port->qdma->eth; in airoha_update_hw_stats() local
2307 val = airoha_fe_rr(eth, REG_FE_GDM_TX_OK_PKT_CNT_H(port->id)); in airoha_update_hw_stats()
2309 val = airoha_fe_rr(eth, REG_FE_GDM_TX_OK_PKT_CNT_L(port->id)); in airoha_update_hw_stats()
2312 val = airoha_fe_rr(eth, REG_FE_GDM_TX_OK_BYTE_CNT_H(port->id)); in airoha_update_hw_stats()
2314 val = airoha_fe_rr(eth, REG_FE_GDM_TX_OK_BYTE_CNT_L(port->id)); in airoha_update_hw_stats()
2317 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_DROP_CNT(port->id)); in airoha_update_hw_stats()
2320 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_BC_CNT(port->id)); in airoha_update_hw_stats()
2323 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_MC_CNT(port->id)); in airoha_update_hw_stats()
2326 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_RUNT_CNT(port->id)); in airoha_update_hw_stats()
2329 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_E64_CNT_H(port->id)); in airoha_update_hw_stats()
2331 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_E64_CNT_L(port->id)); in airoha_update_hw_stats()
2334 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L64_CNT_H(port->id)); in airoha_update_hw_stats()
2336 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L64_CNT_L(port->id)); in airoha_update_hw_stats()
2339 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L127_CNT_H(port->id)); in airoha_update_hw_stats()
2341 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L127_CNT_L(port->id)); in airoha_update_hw_stats()
2344 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L255_CNT_H(port->id)); in airoha_update_hw_stats()
2346 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L255_CNT_L(port->id)); in airoha_update_hw_stats()
2349 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L511_CNT_H(port->id)); in airoha_update_hw_stats()
2351 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L511_CNT_L(port->id)); in airoha_update_hw_stats()
2354 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L1023_CNT_H(port->id)); in airoha_update_hw_stats()
2356 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_L1023_CNT_L(port->id)); in airoha_update_hw_stats()
2359 val = airoha_fe_rr(eth, REG_FE_GDM_TX_ETH_LONG_CNT(port->id)); in airoha_update_hw_stats()
2363 val = airoha_fe_rr(eth, REG_FE_GDM_RX_OK_PKT_CNT_H(port->id)); in airoha_update_hw_stats()
2365 val = airoha_fe_rr(eth, REG_FE_GDM_RX_OK_PKT_CNT_L(port->id)); in airoha_update_hw_stats()
2368 val = airoha_fe_rr(eth, REG_FE_GDM_RX_OK_BYTE_CNT_H(port->id)); in airoha_update_hw_stats()
2370 val = airoha_fe_rr(eth, REG_FE_GDM_RX_OK_BYTE_CNT_L(port->id)); in airoha_update_hw_stats()
2373 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_DROP_CNT(port->id)); in airoha_update_hw_stats()
2376 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_BC_CNT(port->id)); in airoha_update_hw_stats()
2379 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_MC_CNT(port->id)); in airoha_update_hw_stats()
2382 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ERROR_DROP_CNT(port->id)); in airoha_update_hw_stats()
2385 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_CRC_ERR_CNT(port->id)); in airoha_update_hw_stats()
2388 val = airoha_fe_rr(eth, REG_FE_GDM_RX_OVERFLOW_DROP_CNT(port->id)); in airoha_update_hw_stats()
2391 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_FRAG_CNT(port->id)); in airoha_update_hw_stats()
2394 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_JABBER_CNT(port->id)); in airoha_update_hw_stats()
2398 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_RUNT_CNT(port->id)); in airoha_update_hw_stats()
2401 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_E64_CNT_H(port->id)); in airoha_update_hw_stats()
2403 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_E64_CNT_L(port->id)); in airoha_update_hw_stats()
2406 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L64_CNT_H(port->id)); in airoha_update_hw_stats()
2408 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L64_CNT_L(port->id)); in airoha_update_hw_stats()
2411 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L127_CNT_H(port->id)); in airoha_update_hw_stats()
2413 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L127_CNT_L(port->id)); in airoha_update_hw_stats()
2416 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L255_CNT_H(port->id)); in airoha_update_hw_stats()
2418 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L255_CNT_L(port->id)); in airoha_update_hw_stats()
2421 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L511_CNT_H(port->id)); in airoha_update_hw_stats()
2423 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L511_CNT_L(port->id)); in airoha_update_hw_stats()
2426 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L1023_CNT_H(port->id)); in airoha_update_hw_stats()
2428 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_L1023_CNT_L(port->id)); in airoha_update_hw_stats()
2431 val = airoha_fe_rr(eth, REG_FE_GDM_RX_ETH_LONG_CNT(port->id)); in airoha_update_hw_stats()
2435 airoha_fe_set(eth, REG_FE_GDM_MIB_CLEAR(port->id), in airoha_update_hw_stats()
2449 err = airoha_set_gdm_ports(qdma->eth, true); in airoha_dev_open()
2454 airoha_fe_set(qdma->eth, REG_GDM_INGRESS_CFG(port->id), in airoha_dev_open()
2457 airoha_fe_clear(qdma->eth, REG_GDM_INGRESS_CFG(port->id), in airoha_dev_open()
2474 err = airoha_set_gdm_ports(qdma->eth, false); in airoha_dev_stop()
2683 struct airoha_eth *eth = port->qdma->eth; in airoha_ethtool_get_drvinfo() local
2685 strscpy(info->driver, eth->dev->driver->name, sizeof(info->driver)); in airoha_ethtool_get_drvinfo()
2686 strscpy(info->bus_info, dev_name(eth->dev), sizeof(info->bus_info)); in airoha_ethtool_get_drvinfo()
3146 static int airoha_alloc_gdm_port(struct airoha_eth *eth, struct device_node *np) in airoha_alloc_gdm_port() argument
3156 dev_err(eth->dev, "missing gdm port id\n"); in airoha_alloc_gdm_port()
3163 if (!id || id > ARRAY_SIZE(eth->ports)) { in airoha_alloc_gdm_port()
3164 dev_err(eth->dev, "invalid gdm port id: %d\n", id); in airoha_alloc_gdm_port()
3168 if (eth->ports[index]) { in airoha_alloc_gdm_port()
3169 dev_err(eth->dev, "duplicate gdm port id: %d\n", id); in airoha_alloc_gdm_port()
3173 dev = devm_alloc_etherdev_mqs(eth->dev, sizeof(*port), in airoha_alloc_gdm_port()
3177 dev_err(eth->dev, "alloc_etherdev failed\n"); in airoha_alloc_gdm_port()
3181 qdma = ð->qdma[index % AIROHA_MAX_NUM_QDMA]; in airoha_alloc_gdm_port()
3193 SET_NETDEV_DEV(dev, eth->dev); in airoha_alloc_gdm_port()
3206 dev_info(eth->dev, "generated random MAC address %pM\n", in airoha_alloc_gdm_port()
3216 eth->ports[index] = port; in airoha_alloc_gdm_port()
3224 struct airoha_eth *eth; in airoha_probe() local
3227 eth = devm_kzalloc(&pdev->dev, sizeof(*eth), GFP_KERNEL); in airoha_probe()
3228 if (!eth) in airoha_probe()
3231 eth->dev = &pdev->dev; in airoha_probe()
3233 err = dma_set_mask_and_coherent(eth->dev, DMA_BIT_MASK(32)); in airoha_probe()
3235 dev_err(eth->dev, "failed configuring DMA mask\n"); in airoha_probe()
3239 eth->fe_regs = devm_platform_ioremap_resource_byname(pdev, "fe"); in airoha_probe()
3240 if (IS_ERR(eth->fe_regs)) in airoha_probe()
3241 return dev_err_probe(eth->dev, PTR_ERR(eth->fe_regs), in airoha_probe()
3244 eth->rsts[0].id = "fe"; in airoha_probe()
3245 eth->rsts[1].id = "pdma"; in airoha_probe()
3246 eth->rsts[2].id = "qdma"; in airoha_probe()
3247 err = devm_reset_control_bulk_get_exclusive(eth->dev, in airoha_probe()
3248 ARRAY_SIZE(eth->rsts), in airoha_probe()
3249 eth->rsts); in airoha_probe()
3251 dev_err(eth->dev, "failed to get bulk reset lines\n"); in airoha_probe()
3255 eth->xsi_rsts[0].id = "xsi-mac"; in airoha_probe()
3256 eth->xsi_rsts[1].id = "hsi0-mac"; in airoha_probe()
3257 eth->xsi_rsts[2].id = "hsi1-mac"; in airoha_probe()
3258 eth->xsi_rsts[3].id = "hsi-mac"; in airoha_probe()
3259 eth->xsi_rsts[4].id = "xfp-mac"; in airoha_probe()
3260 err = devm_reset_control_bulk_get_exclusive(eth->dev, in airoha_probe()
3261 ARRAY_SIZE(eth->xsi_rsts), in airoha_probe()
3262 eth->xsi_rsts); in airoha_probe()
3264 dev_err(eth->dev, "failed to get bulk xsi reset lines\n"); in airoha_probe()
3268 eth->napi_dev = alloc_netdev_dummy(0); in airoha_probe()
3269 if (!eth->napi_dev) in airoha_probe()
3273 eth->napi_dev->threaded = true; in airoha_probe()
3274 strscpy(eth->napi_dev->name, "qdma_eth", sizeof(eth->napi_dev->name)); in airoha_probe()
3275 platform_set_drvdata(pdev, eth); in airoha_probe()
3277 err = airoha_hw_init(pdev, eth); in airoha_probe()
3281 for (i = 0; i < ARRAY_SIZE(eth->qdma); i++) in airoha_probe()
3282 airoha_qdma_start_napi(ð->qdma[i]); in airoha_probe()
3285 if (!of_device_is_compatible(np, "airoha,eth-mac")) in airoha_probe()
3291 err = airoha_alloc_gdm_port(eth, np); in airoha_probe()
3301 for (i = 0; i < ARRAY_SIZE(eth->qdma); i++) in airoha_probe()
3302 airoha_qdma_stop_napi(ð->qdma[i]); in airoha_probe()
3304 for (i = 0; i < ARRAY_SIZE(eth->qdma); i++) in airoha_probe()
3305 airoha_hw_cleanup(ð->qdma[i]); in airoha_probe()
3307 for (i = 0; i < ARRAY_SIZE(eth->ports); i++) { in airoha_probe()
3308 struct airoha_gdm_port *port = eth->ports[i]; in airoha_probe()
3313 free_netdev(eth->napi_dev); in airoha_probe()
3321 struct airoha_eth *eth = platform_get_drvdata(pdev); in airoha_remove() local
3324 for (i = 0; i < ARRAY_SIZE(eth->qdma); i++) { in airoha_remove()
3325 airoha_qdma_stop_napi(ð->qdma[i]); in airoha_remove()
3326 airoha_hw_cleanup(ð->qdma[i]); in airoha_remove()
3329 for (i = 0; i < ARRAY_SIZE(eth->ports); i++) { in airoha_remove()
3330 struct airoha_gdm_port *port = eth->ports[i]; in airoha_remove()
3338 free_netdev(eth->napi_dev); in airoha_remove()
3344 { .compatible = "airoha,en7581-eth" },