519 	SK_PHY_MARV_COPPER= 4,/* Marvell 88E1011S */
520 	SK_PHY_MARV_FIBER = 5,/* Marvell 88E1011S working on fiber */
996 	PHY_MARV_PORT_IRQ	= 0x17,/* 16 bit r/o	Port 0 IRQ (88E1111 only) */
1005 /* for 10/100 Fast Ethernet PHY (88E3082 only) */
1061 	PHY_MARV_ID1_B0	= 0x0C23, /* Yukon (PHY 88E1011) */
1062 	PHY_MARV_ID1_B2	= 0x0C25, /* Yukon-Plus (PHY 88E1011) */
1063 	PHY_MARV_ID1_C2	= 0x0CC2, /* Yukon-EC (PHY 88E1111) */
1064 	PHY_MARV_ID1_Y2	= 0x0C91, /* Yukon-2 (PHY 88E1112) */
1305 /* special defines for FIBER (88E1011S only) */
1358 /* for 10/100 Fast Ethernet PHY (88E3082 only) */
1395 /* for 10/100 Fast Ethernet PHY (88E3082 only) */
1427 	PHY_M_EC_ENA_BC_EXT = 1<<15, /* Enable Block Carr. Ext. (88E1111 only) */
1428 	PHY_M_EC_ENA_LIN_LB = 1<<14, /* Enable Line Loopback (88E1111 only) */
1430 	PHY_M_EC_DIS_LINK_P = 1<<12, /* Disable Link Pulses (88E1111 only) */
1432 					/* (88E1011 only) */
1434 				       /* (88E1011 only) */
1436 					/* (88E1111 only) */
1437 	PHY_M_EC_DOWN_S_ENA  = 1<<8, /* Downshift Enable (88E1111 only) */
1441 	PHY_M_EC_FIB_AN_ENA  = 1<<3, /* Fiber Auto-Neg. Enable (88E1011S only) */
1442 	PHY_M_EC_DTE_D_ENA   = 1<<2, /* DTE Detect Enable (88E1111 only) */
1444 	PHY_M_EC_TRANS_DIS   = 1<<0, /* Transmitter Disable (88E1111 only) */};
1464 	PHY_M_LEDC_DP_C_LSB	= 1<<7, /* Duplex Control (LSB, 88E1111 only) */
1465 	PHY_M_LEDC_TX_C_LSB	= 1<<6, /* Tx Control (LSB, 88E1111 only) */
1467 					/* (88E1111 only) */
1474 					/* (88E1011 only) */
1476 	PHY_M_LEDC_DP_C_MSB	= 1<<2, /* Duplex Control (MSB, 88E1111 only) */
1479 	PHY_M_LEDC_TX_C_MSB	= 1<<0, /* Tx Control (MSB, 88E1111 only) */
1537 									/* (88E1111 only) */
1538 								/* Bit  9.. 4: reserved (88E1011 only) */
1540 	PHY_M_DTE_POW_STAT	= 1<<4, /* DTE Power Status (88E1111 only) */
1548 					/* (88E1111 only) */
1551 					/* (88E1111 only) */
1563 /* for 10/100 Fast Ethernet PHY (88E3082 only) */
1676 	GM_RXE_FRAG	= GM_MIB_CNT_BASE + 88,	/* Frames <64 Byte Received with FCS Err */
2513 	u32 v;  in xm_read32()  local
2514 	v = skge_read16(hw, SK_XMAC_REG(port, reg));  in xm_read32()
2515 	v |= (u32)skge_read16(hw, SK_XMAC_REG(port, reg+2)) << 16;  in xm_read32()
2516 	return v;  in xm_read32()
2524 static inline void xm_write32(const struct skge_hw *hw, int port, int r, u32 v)  in xm_write32()  argument
2526 	skge_write16(hw, SK_XMAC_REG(port,r), v & 0xffff);  in xm_write32()
2527 	skge_write16(hw, SK_XMAC_REG(port,r+2), v >> 16);  in xm_write32()
2530 static inline void xm_write16(const struct skge_hw *hw, int port, int r, u16 v)  in xm_write16()  argument
2532 	skge_write16(hw, SK_XMAC_REG(port,r), v);  in xm_write16()
2566 static inline void gma_write16(const struct skge_hw *hw, int port, int r, u16 v)  in gma_write16()  argument
2568 	skge_write16(hw, SK_GMAC_REG(port,r), v);  in gma_write16()