Lines Matching full:u16
95 u16 max; /* Max resource id or count */
101 u16 *fn_map; /* LF to pcifunc mapping */
186 u16 bmap_entries; /* Number of unreserved MCAM entries */
187 u16 bmap_fcnt; /* MCAM entries free count */
188 u16 *entry2pfvf_map;
189 u16 *entry2cntr_map;
190 u16 *cntr2pfvf_map;
191 u16 *cntr_refcnt;
192 u16 *entry2target_pffunc;
196 u16 banksize; /* Number of MCAM entries in each bank */
197 u16 total_entries; /* Total number of MCAM entries */
198 u16 nixlf_offset; /* Offset of nixlf rsvd uncast entries */
199 u16 pf_offset; /* Offset of PF's rsvd bcast, promisc entries */
200 u16 lprio_count;
201 u16 lprio_start;
202 u16 hprio_count;
203 u16 hprio_end;
204 u16 rx_miss_act_cntr; /* Counter for RX MISS action */
217 u16 sso;
218 u16 ssow;
219 u16 cptlfs;
220 u16 timlfs;
221 u16 cpt1_lfs;
227 u16 *msix_lfmap; /* Vector to block LF mapping */
247 u16 rx_chan_base;
248 u16 tx_chan_base;
251 u16 maxlen;
252 u16 minlen;
259 u16 bcast_mce_idx;
260 u16 mcast_mce_idx;
261 u16 promisc_mce_idx;
294 u16 cgx_bpid_cnt;
295 u16 sdp_bpid_cnt;
296 u16 free_pool_base;
297 u16 *fn_map; /* pcifunc mapping */
322 u16 schq;
354 u16 *entry2pfvf_map;
360 u16 *pfvf_map;
361 u16 *match_id;
362 u16 *ref_count;
387 u16 nix_txsch_per_cgx_lmac; /* Max Q's transmitting to CGX LMAC */
388 u16 nix_txsch_per_lbk_lmac; /* Max Q's transmitting to LBK LMAC */
389 u16 nix_txsch_per_sdp_lmac; /* Max Q's transmitting to SDP LMAC */
407 u16 total_vfs; /* Max RVU VFs HW supports */
408 u16 max_vfs_per_pf; /* Max VFs that can be attached to a PF */
411 u16 cgx_chan_base; /* CGX base channel number */
412 u16 lbk_chan_base; /* LBK base channel number */
413 u16 sdp_chan_base; /* SDP base channel number */
414 u16 cpt_chan_base; /* CPT base channel number */
423 u16 npc_counters; /* No of match stats counters */
511 u16 *entry2pcifunc;
512 u16 mode;
513 u16 start_entry;
532 u16 vf_devid; /* VF devices id */
546 u16 num_vec;
554 u16 cgx_mapped_vfs; /* maximum CGX mapped VFs */
603 u16 rep_pcifunc;
605 u16 *rep2pfvf_map;
748 static inline u16 rvu_nix_chan_cgx(struct rvu *rvu, u8 cgxid, in rvu_nix_chan_cgx()
752 u16 cgx_chans = nix_const & 0xFFULL; in rvu_nix_chan_cgx()
762 static inline u16 rvu_nix_chan_lbk(struct rvu *rvu, u8 lbkid, in rvu_nix_chan_lbk()
766 u16 lbk_chans = (nix_const >> 16) & 0xFFULL; in rvu_nix_chan_lbk()
775 static inline u16 rvu_nix_chan_sdp(struct rvu *rvu, u8 chan) in rvu_nix_chan_sdp()
785 static inline u16 rvu_nix_chan_cpt(struct rvu *rvu, u8 chan) in rvu_nix_chan_cpt()
804 static inline bool is_lbk_vf(struct rvu *rvu, u16 pcifunc) in is_lbk_vf()
810 static inline bool is_vf(u16 pcifunc) in is_vf()
816 static inline bool is_pffunc_af(u16 pcifunc) in is_pffunc_af()
836 u16 rvu_get_rsrc_mapcount(struct rvu_pfvf *pfvf, int blkaddr);
837 int rvu_get_pf(u16 pcifunc);
841 bool is_pffunc_map_valid(struct rvu *rvu, u16 pcifunc, int blktype);
842 int rvu_get_lf(struct rvu *rvu, struct rvu_block *block, u16 pcifunc, u16 slot);
844 int rvu_get_blkaddr(struct rvu *rvu, int blktype, u16 pcifunc);
848 int rvu_get_blkaddr_from_slot(struct rvu *rvu, int blktype, u16 pcifunc,
849 u16 global_slot, u16 *slot_in_block);
866 bool is_sdp_pfvf(u16 pcifunc);
867 bool is_sdp_pf(u16 pcifunc);
868 bool is_sdp_vf(struct rvu *rvu, u16 pcifunc);
870 static inline bool is_rep_dev(struct rvu *rvu, u16 pcifunc) in is_rep_dev()
891 static inline bool is_cgx_vf(struct rvu *rvu, u16 pcifunc) in is_cgx_vf()
905 int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start);
907 int rvu_cgx_start_stop_io(struct rvu *rvu, u16 pcifunc, bool start);
910 void rvu_cgx_disable_dmac_entries(struct rvu *rvu, u16 pcifunc);
915 void rvu_npa_lf_teardown(struct rvu *rvu, u16 pcifunc, int npalf);
920 bool is_nixlf_attached(struct rvu *rvu, u16 pcifunc);
926 void rvu_nix_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int npalf);
927 int nix_get_nixlf(struct rvu *rvu, u16 pcifunc, int *nixlf, int *nix_blkaddr);
928 int nix_update_mce_list(struct rvu *rvu, u16 pcifunc,
931 void nix_get_mce_list(struct rvu *rvu, u16 pcifunc, int type,
936 int nix_get_struct_ptrs(struct rvu *rvu, u16 pcifunc,
938 int rvu_nix_setup_ratelimit_aggr(struct rvu *rvu, u16 pcifunc,
939 u16 rq_idx, u16 match_id);
943 u16 pcifunc, u8 ctype, u32 qidx);
944 int rvu_get_nix_blkaddr(struct rvu *rvu, u16 pcifunc);
948 void rvu_nix_tx_tl2_cfg(struct rvu *rvu, int blkaddr, u16 pcifunc,
950 void rvu_nix_mcast_flr_free_entries(struct rvu *rvu, u16 pcifunc);
951 int rvu_nix_mcast_get_mce_index(struct rvu *rvu, u16 pcifunc,
953 int rvu_nix_mcast_update_mcam_entry(struct rvu *rvu, u16 pcifunc,
954 u32 mcast_grp_idx, u16 mcam_index);
955 void rvu_nix_flr_free_bpids(struct rvu *rvu, u16 pcifunc);
959 int rvu_npc_get_pkind(struct rvu *rvu, u16 pf);
961 int npc_config_ts_kpuaction(struct rvu *rvu, int pf, u16 pcifunc, bool en);
962 void rvu_npc_install_ucast_entry(struct rvu *rvu, u16 pcifunc,
964 void rvu_npc_install_promisc_entry(struct rvu *rvu, u16 pcifunc,
966 void rvu_npc_enable_promisc_entry(struct rvu *rvu, u16 pcifunc, int nixlf,
968 void rvu_npc_install_bcast_match_entry(struct rvu *rvu, u16 pcifunc,
970 void rvu_npc_enable_bcast_entry(struct rvu *rvu, u16 pcifunc, int nixlf,
972 void rvu_npc_install_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,
974 void rvu_npc_enable_allmulti_entry(struct rvu *rvu, u16 pcifunc, int nixlf,
977 void npc_enadis_default_mce_entry(struct rvu *rvu, u16 pcifunc,
979 void rvu_npc_disable_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf);
981 void rvu_npc_free_mcam_entries(struct rvu *rvu, u16 pcifunc, int nixlf);
982 void rvu_npc_disable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf);
983 void rvu_npc_enable_default_entries(struct rvu *rvu, u16 pcifunc, int nixlf);
984 void rvu_npc_update_flowkey_alg_idx(struct rvu *rvu, u16 pcifunc, int nixlf,
986 void __rvu_mcam_remove_counter_from_rule(struct rvu *rvu, u16 pcifunc,
988 void __rvu_mcam_add_counter_to_rule(struct rvu *rvu, u16 pcifunc,
991 void rvu_npc_get_mcam_entry_alloc_info(struct rvu *rvu, u16 pcifunc,
994 void rvu_npc_get_mcam_counter_alloc_info(struct rvu *rvu, u16 pcifunc,
1004 void npc_mcam_enable_flows(struct rvu *rvu, u16 target);
1005 void npc_mcam_disable_flows(struct rvu *rvu, u16 target);
1013 int blkaddr, u16 src, struct mcam_entry *entry,
1016 bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc);
1022 int rvu_cgx_tx_enable(struct rvu *rvu, u16 pcifunc, bool enable);
1023 int rvu_cgx_prio_flow_ctrl_cfg(struct rvu *rvu, u16 pcifunc, u8 tx_pause, u8 rx_pause,
1024 u16 pfc_en);
1025 int rvu_cgx_cfg_pause_frm(struct rvu *rvu, u16 pcifunc, u8 tx_pause, u8 rx_pause);
1026 void rvu_mac_reset(struct rvu *rvu, u16 pcifunc);
1029 int npc_get_nixlf_mcam_index(struct npc_mcam *mcam, u16 pcifunc, int nixlf,
1034 int npc_install_mcam_drop_rule(struct rvu *rvu, int mcam_idx, u16 *counter_idx,
1045 int rvu_cpt_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int lf,
1047 int rvu_cpt_ctx_flush(struct rvu *rvu, u16 pcifunc);
1061 void rvu_reset_lmt_map_tbl(struct rvu *rvu, u16 pcifunc);
1077 void rvu_switch_update_rules(struct rvu *rvu, u16 pcifunc, bool ena);
1078 void rvu_switch_enable_lbk_link(struct rvu *rvu, u16 pcifunc, bool ena);
1080 int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir,
1087 int rvu_mcs_flr_handler(struct rvu *rvu, u16 pcifunc);
1094 void rvu_rep_update_rules(struct rvu *rvu, u16 pcifunc, bool ena);
1095 int rvu_rep_notify_pfvf_state(struct rvu *rvu, u16 pcifunc, bool enable);