1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2024 Intel Corporation. */
32 	struct ixgbe_mac_info *mac = &hw->mac;  in ixgbe_get_invariants_X540()  local
33 	struct ixgbe_phy_info *phy = &hw->phy;  in ixgbe_get_invariants_X540()
36 	phy->ops.set_phy_power = ixgbe_set_copper_phy_power;  in ixgbe_get_invariants_X540()
38 	mac->mcft_size = IXGBE_X540_MC_TBL_SIZE;  in ixgbe_get_invariants_X540()
39 	mac->vft_size = IXGBE_X540_VFT_TBL_SIZE;  in ixgbe_get_invariants_X540()
40 	mac->num_rar_entries = IXGBE_X540_RAR_ENTRIES;  in ixgbe_get_invariants_X540()
41 	mac->rx_pb_size = IXGBE_X540_RX_PB_SIZE;  in ixgbe_get_invariants_X540()
42 	mac->max_rx_queues = IXGBE_X540_MAX_RX_QUEUES;  in ixgbe_get_invariants_X540()
43 	mac->max_tx_queues = IXGBE_X540_MAX_TX_QUEUES;  in ixgbe_get_invariants_X540()
44 	mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw);  in ixgbe_get_invariants_X540()
50  *  ixgbe_setup_mac_link_X540 - Set the auto advertised capabilitires
58 	return hw->phy.ops.setup_link_speed(hw, speed,  in ixgbe_setup_mac_link_X540()
63  *  ixgbe_reset_hw_X540 - Perform hardware reset
67  *  and clears all interrupts, perform a PHY reset, and perform a link (MAC)
74 	u32 swfw_mask = hw->phy.phy_semaphore_mask;  in ixgbe_reset_hw_X540()
79 	status = hw->mac.ops.stop_adapter(hw);  in ixgbe_reset_hw_X540()
87 	status = hw->mac.ops.acquire_swfw_sync(hw, swfw_mask);  in ixgbe_reset_hw_X540()
90 		return -EBUSY;  in ixgbe_reset_hw_X540()
97 	hw->mac.ops.release_swfw_sync(hw, swfw_mask);  in ixgbe_reset_hw_X540()
100 	/* Poll for reset bit to self-clear indicating reset is complete */  in ixgbe_reset_hw_X540()
109 		status = -EIO;  in ixgbe_reset_hw_X540()
119 	if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) {  in ixgbe_reset_hw_X540()
120 		hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;  in ixgbe_reset_hw_X540()
127 	/* Store the permanent mac address */  in ixgbe_reset_hw_X540()
128 	hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);  in ixgbe_reset_hw_X540()
131 	 * Store MAC address from RAR0, clear receive address registers, and  in ixgbe_reset_hw_X540()
133 	 * since we modify this value when programming the SAN MAC address.  in ixgbe_reset_hw_X540()
135 	hw->mac.num_rar_entries = IXGBE_X540_MAX_TX_QUEUES;  in ixgbe_reset_hw_X540()
136 	hw->mac.ops.init_rx_addrs(hw);  in ixgbe_reset_hw_X540()
139 	if (hw->mac.type == ixgbe_mac_e610)  in ixgbe_reset_hw_X540()
142 	/* Store the permanent SAN mac address */  in ixgbe_reset_hw_X540()
143 	hw->mac.ops.get_san_mac_addr(hw, hw->mac.san_addr);  in ixgbe_reset_hw_X540()
145 	/* Add the SAN MAC address to RAR if it's a valid address */  in ixgbe_reset_hw_X540()
146 	if (is_valid_ether_addr(hw->mac.san_addr)) {  in ixgbe_reset_hw_X540()
147 		/* Save the SAN MAC RAR index */  in ixgbe_reset_hw_X540()
148 		hw->mac.san_mac_rar_index = hw->mac.num_rar_entries - 1;  in ixgbe_reset_hw_X540()
150 		hw->mac.ops.set_rar(hw, hw->mac.san_mac_rar_index,  in ixgbe_reset_hw_X540()
151 				    hw->mac.san_addr, 0, IXGBE_RAH_AV);  in ixgbe_reset_hw_X540()
154 		hw->mac.ops.clear_vmdq(hw, hw->mac.san_mac_rar_index,  in ixgbe_reset_hw_X540()
157 		/* Reserve the last RAR for the SAN MAC address */  in ixgbe_reset_hw_X540()
158 		hw->mac.num_rar_entries--;  in ixgbe_reset_hw_X540()
162 	hw->mac.ops.get_wwn_prefix(hw, &hw->mac.wwnn_prefix,  in ixgbe_reset_hw_X540()
163 				   &hw->mac.wwpn_prefix);  in ixgbe_reset_hw_X540()
169  *  ixgbe_start_hw_X540 - Prepare hardware for Tx/Rx
174  *  Then performs revision-specific operations, if any.
188  *  ixgbe_init_eeprom_params_X540 - Initialize EEPROM params
196 	struct ixgbe_eeprom_info *eeprom = &hw->eeprom;  in ixgbe_init_eeprom_params_X540()
198 	if (eeprom->type == ixgbe_eeprom_uninitialized) {  in ixgbe_init_eeprom_params_X540()
202 		eeprom->semaphore_delay = 10;  in ixgbe_init_eeprom_params_X540()
203 		eeprom->type = ixgbe_flash;  in ixgbe_init_eeprom_params_X540()
207 		eeprom->word_size = BIT(eeprom_size +  in ixgbe_init_eeprom_params_X540()
211 		       eeprom->type, eeprom->word_size);  in ixgbe_init_eeprom_params_X540()
218  *  ixgbe_read_eerd_X540- Read EEPROM word using EERD
229 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_read_eerd_X540()
230 		return -EBUSY;  in ixgbe_read_eerd_X540()
234 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_read_eerd_X540()
239  *  ixgbe_read_eerd_buffer_X540 - Read EEPROM word(s) using EERD
243  *  @data: word(s) read from the EEPROM
245  *  Reads a 16 bit word(s) from the EEPROM using the EERD register.
252 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_read_eerd_buffer_X540()
253 		return -EBUSY;  in ixgbe_read_eerd_buffer_X540()
257 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_read_eerd_buffer_X540()
262  *  ixgbe_write_eewr_X540 - Write EEPROM word using EEWR
273 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_write_eewr_X540()
274 		return -EBUSY;  in ixgbe_write_eewr_X540()
278 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_write_eewr_X540()
283  *  ixgbe_write_eewr_buffer_X540 - Write EEPROM word(s) using EEWR
287  *  @data: word(s) write to the EEPROM
289  *  Write a 16 bit word(s) to the EEPROM using the EEWR register.
296 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_write_eewr_buffer_X540()
297 		return -EBUSY;  in ixgbe_write_eewr_buffer_X540()
301 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_write_eewr_buffer_X540()
306  *  ixgbe_calc_eeprom_checksum_X540 - Calculates and returns the checksum
325 	 * Do not use hw->eeprom.ops.read because we do not want to take  in ixgbe_calc_eeprom_checksum_X540()
330 	/* Include 0x0-0x3F in the checksum */  in ixgbe_calc_eeprom_checksum_X540()
334 			return -EIO;  in ixgbe_calc_eeprom_checksum_X540()
340 	 * Include all data from pointers 0x3, 0x6-0xE.  This excludes the  in ixgbe_calc_eeprom_checksum_X540()
354 		    pointer >= hw->eeprom.word_size)  in ixgbe_calc_eeprom_checksum_X540()
359 			return -EIO;  in ixgbe_calc_eeprom_checksum_X540()
364 		    (pointer + length) >= hw->eeprom.word_size)  in ixgbe_calc_eeprom_checksum_X540()
370 				return -EIO;  in ixgbe_calc_eeprom_checksum_X540()
376 	checksum = (u16)IXGBE_EEPROM_SUM - checksum;  in ixgbe_calc_eeprom_checksum_X540()
382  *  ixgbe_validate_eeprom_checksum_X540 - Validate EEPROM checksum
400 	status = hw->eeprom.ops.read(hw, 0, &checksum);  in ixgbe_validate_eeprom_checksum_X540()
406 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_validate_eeprom_checksum_X540()
407 		return -EBUSY;  in ixgbe_validate_eeprom_checksum_X540()
409 	status = hw->eeprom.ops.calc_checksum(hw);  in ixgbe_validate_eeprom_checksum_X540()
415 	/* Do not use hw->eeprom.ops.read because we do not want to take  in ixgbe_validate_eeprom_checksum_X540()
428 		status = -EIO;  in ixgbe_validate_eeprom_checksum_X540()
436 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_validate_eeprom_checksum_X540()
442  * ixgbe_update_eeprom_checksum_X540 - Updates the EEPROM checksum and flash
458 	status = hw->eeprom.ops.read(hw, 0, &checksum);  in ixgbe_update_eeprom_checksum_X540()
464 	if (hw->mac.ops.acquire_swfw_sync(hw, IXGBE_GSSR_EEP_SM))  in ixgbe_update_eeprom_checksum_X540()
465 		return  -EBUSY;  in ixgbe_update_eeprom_checksum_X540()
467 	status = hw->eeprom.ops.calc_checksum(hw);  in ixgbe_update_eeprom_checksum_X540()
473 	/* Do not use hw->eeprom.ops.write because we do not want to  in ixgbe_update_eeprom_checksum_X540()
483 	hw->mac.ops.release_swfw_sync(hw, IXGBE_GSSR_EEP_SM);  in ixgbe_update_eeprom_checksum_X540()
488  * ixgbe_update_flash_X540 - Instruct HW to copy EEPROM to Flash device
500 	if (status == -EIO) {  in ixgbe_update_flash_X540()
514 	if (hw->revision_id == 0) {  in ixgbe_update_flash_X540()
533  * ixgbe_poll_flash_update_done_X540 - Poll flash update status
550 	return -EIO;  in ixgbe_poll_flash_update_done_X540()
554  * ixgbe_acquire_swfw_sync_X540 - Acquire SWFW semaphore
585 			return -EBUSY;  in ixgbe_acquire_swfw_sync_X540()
604 	 * the FW/HW malfunctions. In that case the SW should set the SW bit(s)  in ixgbe_acquire_swfw_sync_X540()
605 	 * of the requested resource(s) while ignoring the corresponding FW/HW  in ixgbe_acquire_swfw_sync_X540()
609 		return -EBUSY;  in ixgbe_acquire_swfw_sync_X540()
632 		return -EBUSY;  in ixgbe_acquire_swfw_sync_X540()
636 	return -EBUSY;  in ixgbe_acquire_swfw_sync_X540()
640  * ixgbe_release_swfw_sync_X540 - Release SWFW semaphore
665  * ixgbe_get_swfw_sync_semaphore - Get hardware semaphore
690 		return -EIO;  in ixgbe_get_swfw_sync_semaphore()
707 	return -EIO;  in ixgbe_get_swfw_sync_semaphore()
711  * ixgbe_release_swfw_sync_semaphore - Release hardware semaphore
734  *  ixgbe_init_swfw_sync_X540 - Release hardware semaphore
747 	 * We got the lock - we release it.  in ixgbe_init_swfw_sync_X540()
748 	 * We timeout trying to get the lock - we force its release.  in ixgbe_init_swfw_sync_X540()
763  * ixgbe_blink_led_start_X540 - Blink LED based on index.
778 		return -EINVAL;  in ixgbe_blink_led_start_X540()
781 	 * register to work. Force link and speed in the MAC if link is down.  in ixgbe_blink_led_start_X540()
784 	hw->mac.ops.check_link(hw, &speed, &link_up, false);  in ixgbe_blink_led_start_X540()
801  * ixgbe_blink_led_stop_X540 - Stop blinking LED based on index.
814 		return -EINVAL;  in ixgbe_blink_led_stop_X540()
823 	/* Unforce link and speed in the MAC. */  in ixgbe_blink_led_stop_X540()
922 	.mac                    = ixgbe_mac_X540,