Lines Matching +full:phy +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2024 Intel Corporation. */
29 * ixgbe_out_i2c_byte_ack - Send I2C byte with ack
46 * ixgbe_in_i2c_byte_ack - Receive an I2C byte and send ack
64 * ixgbe_ones_comp_byte_add - Perform one's complement addition
68 * Returns one's complement 8-bit sum.
79 * ixgbe_read_i2c_combined_generic_int - Perform I2C read combined operation
81 * @addr: I2C bus address to read from
82 * @reg: I2C device register to read from
91 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_combined_generic_int()
104 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_read_i2c_combined_generic_int()
105 return -EBUSY; in ixgbe_read_i2c_combined_generic_int()
119 /* Re-start condition */ in ixgbe_read_i2c_combined_generic_int()
138 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_combined_generic_int()
145 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_combined_generic_int()
148 hw_dbg(hw, "I2C byte read combined error - Retry.\n"); in ixgbe_read_i2c_combined_generic_int()
150 hw_dbg(hw, "I2C byte read combined error.\n"); in ixgbe_read_i2c_combined_generic_int()
153 return -EIO; in ixgbe_read_i2c_combined_generic_int()
157 * ixgbe_write_i2c_combined_generic_int - Perform I2C write combined operation
159 * @addr: I2C bus address to write to
160 * @reg: I2C device register to write to
169 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_write_i2c_combined_generic_int()
181 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_write_i2c_combined_generic_int()
182 return -EBUSY; in ixgbe_write_i2c_combined_generic_int()
204 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_combined_generic_int()
210 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_combined_generic_int()
213 hw_dbg(hw, "I2C byte write combined error - Retry.\n"); in ixgbe_write_i2c_combined_generic_int()
215 hw_dbg(hw, "I2C byte write combined error.\n"); in ixgbe_write_i2c_combined_generic_int()
218 return -EIO; in ixgbe_write_i2c_combined_generic_int()
222 * ixgbe_probe_phy - Probe a single address for a PHY
224 * @phy_addr: PHY address to probe
226 * Returns true if PHY found
232 hw->phy.mdio.prtad = phy_addr; in ixgbe_probe_phy()
233 if (mdio45_probe(&hw->phy.mdio, phy_addr) != 0) in ixgbe_probe_phy()
239 hw->phy.type = ixgbe_get_phy_type_from_id(hw->phy.id); in ixgbe_probe_phy()
241 if (hw->phy.type == ixgbe_phy_unknown) { in ixgbe_probe_phy()
242 hw->phy.ops.read_reg(hw, in ixgbe_probe_phy()
249 hw->phy.type = ixgbe_phy_cu_unknown; in ixgbe_probe_phy()
251 hw->phy.type = ixgbe_phy_generic; in ixgbe_probe_phy()
258 * ixgbe_identify_phy_generic - Get physical layer module
265 u32 status = -EFAULT; in ixgbe_identify_phy_generic()
268 if (!hw->phy.phy_semaphore_mask) { in ixgbe_identify_phy_generic()
269 if (hw->bus.lan_id) in ixgbe_identify_phy_generic()
270 hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY1_SM; in ixgbe_identify_phy_generic()
272 hw->phy.phy_semaphore_mask = IXGBE_GSSR_PHY0_SM; in ixgbe_identify_phy_generic()
275 if (hw->phy.type != ixgbe_phy_unknown) in ixgbe_identify_phy_generic()
278 if (hw->phy.nw_mng_if_sel) { in ixgbe_identify_phy_generic()
280 hw->phy.nw_mng_if_sel); in ixgbe_identify_phy_generic()
284 return -EFAULT; in ixgbe_identify_phy_generic()
294 /* Certain media types do not have a phy so an address will not in ixgbe_identify_phy_generic()
299 hw->phy.mdio.prtad = MDIO_PRTAD_NONE; in ixgbe_identify_phy_generic()
305 * ixgbe_check_reset_blocked - check status of MNG FW veto bit
318 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_check_reset_blocked()
331 * ixgbe_get_phy_id - Get the phy type
341 status = hw->phy.ops.read_reg(hw, MDIO_DEVID1, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
345 hw->phy.id = (u32)(phy_id_high << 16); in ixgbe_get_phy_id()
346 status = hw->phy.ops.read_reg(hw, MDIO_DEVID2, MDIO_MMD_PMAPMD, in ixgbe_get_phy_id()
348 hw->phy.id |= (u32)(phy_id_low & IXGBE_PHY_REVISION_MASK); in ixgbe_get_phy_id()
349 hw->phy.revision = (u32)(phy_id_low & ~IXGBE_PHY_REVISION_MASK); in ixgbe_get_phy_id()
355 * ixgbe_get_phy_type_from_id - Get the phy type
356 * @phy_id: hardware phy id
394 * ixgbe_reset_phy_generic - Performs a PHY reset
403 if (hw->phy.type == ixgbe_phy_unknown) in ixgbe_reset_phy_generic()
406 if (status != 0 || hw->phy.type == ixgbe_phy_none) in ixgbe_reset_phy_generic()
409 /* Don't reset PHY if it's shut down due to overtemp. */ in ixgbe_reset_phy_generic()
410 if (!hw->phy.reset_if_overtemp && hw->phy.ops.check_overtemp(hw)) in ixgbe_reset_phy_generic()
418 * Perform soft PHY reset to the PHY_XS. in ixgbe_reset_phy_generic()
419 * This will cause a soft reset to the PHY in ixgbe_reset_phy_generic()
421 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_reset_phy_generic()
426 * Poll for reset bit to self-clear indicating reset is complete. in ixgbe_reset_phy_generic()
432 if (hw->phy.type == ixgbe_phy_x550em_ext_t) { in ixgbe_reset_phy_generic()
433 status = hw->phy.ops.read_reg(hw, in ixgbe_reset_phy_generic()
444 status = hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_reset_phy_generic()
457 hw_dbg(hw, "PHY reset polling failed to complete.\n"); in ixgbe_reset_phy_generic()
458 return -EIO; in ixgbe_reset_phy_generic()
465 * ixgbe_read_phy_reg_mdi - read PHY register
467 * @reg_addr: 32 bit address of PHY register to read
469 * @phy_data: Pointer to read data from PHY register
471 * Reads a value from a specified PHY register without the SWFW lock
481 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
500 hw_dbg(hw, "PHY address command did not complete.\n"); in ixgbe_read_phy_reg_mdi()
501 return -EIO; in ixgbe_read_phy_reg_mdi()
509 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_read_phy_reg_mdi()
527 hw_dbg(hw, "PHY read command didn't complete\n"); in ixgbe_read_phy_reg_mdi()
528 return -EIO; in ixgbe_read_phy_reg_mdi()
542 * ixgbe_read_phy_reg_generic - Reads a value from a specified PHY register
543 * using the SWFW lock - this function is needed in most cases
545 * @reg_addr: 32 bit address of PHY register to read
547 * @phy_data: Pointer to read data from PHY register
552 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_read_phy_reg_generic()
555 if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == 0) { in ixgbe_read_phy_reg_generic()
558 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_read_phy_reg_generic()
560 return -EBUSY; in ixgbe_read_phy_reg_generic()
567 * ixgbe_write_phy_reg_mdi - Writes a value to specified PHY register
570 * @reg_addr: 32 bit PHY register to write
572 * @phy_data: Data to write to the PHY register
585 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
604 hw_dbg(hw, "PHY address cmd didn't complete\n"); in ixgbe_write_phy_reg_mdi()
605 return -EIO; in ixgbe_write_phy_reg_mdi()
614 (hw->phy.mdio.prtad << IXGBE_MSCA_PHY_ADDR_SHIFT) | in ixgbe_write_phy_reg_mdi()
632 hw_dbg(hw, "PHY write cmd didn't complete\n"); in ixgbe_write_phy_reg_mdi()
633 return -EIO; in ixgbe_write_phy_reg_mdi()
640 * ixgbe_write_phy_reg_generic - Writes a value to specified PHY register
641 * using SWFW lock- this function is needed in most cases
643 * @reg_addr: 32 bit PHY register to write
645 * @phy_data: Data to write to the PHY register
650 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_write_phy_reg_generic()
653 if (hw->mac.ops.acquire_swfw_sync(hw, gssr) == 0) { in ixgbe_write_phy_reg_generic()
656 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_write_phy_reg_generic()
658 return -EBUSY; in ixgbe_write_phy_reg_generic()
667 * ixgbe_msca_cmd - Write the command register and poll for completion/timeout
681 * ixgbe_mii_bus_read_generic_c22 - Read a clause 22 register with gssr flags
693 if (hw->mac.ops.acquire_swfw_sync(hw, gssr)) in ixgbe_mii_bus_read_generic_c22()
694 return -EBUSY; in ixgbe_mii_bus_read_generic_c22()
709 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_mii_bus_read_generic_c22()
714 * ixgbe_mii_bus_read_generic_c45 - Read a clause 45 register with gssr flags
727 if (hw->mac.ops.acquire_swfw_sync(hw, gssr)) in ixgbe_mii_bus_read_generic_c45()
728 return -EBUSY; in ixgbe_mii_bus_read_generic_c45()
747 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_mii_bus_read_generic_c45()
752 * ixgbe_mii_bus_write_generic_c22 - Write a clause 22 register with gssr flags
765 if (hw->mac.ops.acquire_swfw_sync(hw, gssr)) in ixgbe_mii_bus_write_generic_c22()
766 return -EBUSY; in ixgbe_mii_bus_write_generic_c22()
777 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_mii_bus_write_generic_c22()
782 * ixgbe_mii_bus_write_generic_c45 - Write a clause 45 register with gssr flags
797 if (hw->mac.ops.acquire_swfw_sync(hw, gssr)) in ixgbe_mii_bus_write_generic_c45()
798 return -EBUSY; in ixgbe_mii_bus_write_generic_c45()
814 hw->mac.ops.release_swfw_sync(hw, gssr); in ixgbe_mii_bus_write_generic_c45()
819 * ixgbe_mii_bus_read_c22 - Read a clause 22 register
826 struct ixgbe_adapter *adapter = bus->priv; in ixgbe_mii_bus_read_c22()
827 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_mii_bus_read_c22()
828 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_mii_bus_read_c22()
834 * ixgbe_mii_bus_read_c45 - Read a clause 45 register
843 struct ixgbe_adapter *adapter = bus->priv; in ixgbe_mii_bus_read_c45()
844 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_mii_bus_read_c45()
845 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_mii_bus_read_c45()
851 * ixgbe_mii_bus_write_c22 - Write a clause 22 register
860 struct ixgbe_adapter *adapter = bus->priv; in ixgbe_mii_bus_write_c22()
861 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_mii_bus_write_c22()
862 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_mii_bus_write_c22()
868 * ixgbe_mii_bus_write_c45 - Write a clause 45 register
878 struct ixgbe_adapter *adapter = bus->priv; in ixgbe_mii_bus_write_c45()
879 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_mii_bus_write_c45()
880 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_mii_bus_write_c45()
887 * ixgbe_x550em_a_mii_bus_read_c22 - Read a clause 22 register on x550em_a
895 struct ixgbe_adapter *adapter = bus->priv; in ixgbe_x550em_a_mii_bus_read_c22()
896 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_x550em_a_mii_bus_read_c22()
897 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_x550em_a_mii_bus_read_c22()
904 * ixgbe_x550em_a_mii_bus_read_c45 - Read a clause 45 register on x550em_a
913 struct ixgbe_adapter *adapter = bus->priv; in ixgbe_x550em_a_mii_bus_read_c45()
914 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_x550em_a_mii_bus_read_c45()
915 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_x550em_a_mii_bus_read_c45()
922 * ixgbe_x550em_a_mii_bus_write_c22 - Write a clause 22 register on x550em_a
931 struct ixgbe_adapter *adapter = bus->priv; in ixgbe_x550em_a_mii_bus_write_c22()
932 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_x550em_a_mii_bus_write_c22()
933 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_x550em_a_mii_bus_write_c22()
940 * ixgbe_x550em_a_mii_bus_write_c45 - Write a clause 45 register on x550em_a
950 struct ixgbe_adapter *adapter = bus->priv; in ixgbe_x550em_a_mii_bus_write_c45()
951 struct ixgbe_hw *hw = &adapter->hw; in ixgbe_x550em_a_mii_bus_write_c45()
952 u32 gssr = hw->phy.phy_semaphore_mask; in ixgbe_x550em_a_mii_bus_write_c45()
960 * ixgbe_get_first_secondary_devfn - get first device downstream of root port
972 if (rp_pdev && rp_pdev->subordinate) { in ixgbe_get_first_secondary_devfn()
973 bus = rp_pdev->subordinate->number; in ixgbe_get_first_secondary_devfn()
983 * ixgbe_x550em_a_has_mii - is this the first ixgbe x550em_a PCI function?
992 struct ixgbe_adapter *adapter = hw->back; in ixgbe_x550em_a_has_mii()
993 struct pci_dev *pdev = adapter->pdev; in ixgbe_x550em_a_has_mii()
1019 * ixgbe_mii_bus_init - mii_bus structure setup
1033 struct ixgbe_adapter *adapter = hw->back; in ixgbe_mii_bus_init()
1034 struct pci_dev *pdev = adapter->pdev; in ixgbe_mii_bus_init()
1035 struct device *dev = &adapter->netdev->dev; in ixgbe_mii_bus_init()
1038 switch (hw->device_id) { in ixgbe_mii_bus_init()
1066 return -ENOMEM; in ixgbe_mii_bus_init()
1068 bus->read = read_c22; in ixgbe_mii_bus_init()
1069 bus->write = write_c22; in ixgbe_mii_bus_init()
1070 bus->read_c45 = read_c45; in ixgbe_mii_bus_init()
1071 bus->write_c45 = write_c45; in ixgbe_mii_bus_init()
1074 snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mdio-%s", ixgbe_driver_name, in ixgbe_mii_bus_init()
1077 bus->name = "ixgbe-mdio"; in ixgbe_mii_bus_init()
1078 bus->priv = adapter; in ixgbe_mii_bus_init()
1079 bus->parent = dev; in ixgbe_mii_bus_init()
1080 bus->phy_mask = GENMASK(31, 0); in ixgbe_mii_bus_init()
1086 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_SUPPORTS_C22; in ixgbe_mii_bus_init()
1088 adapter->mii_bus = bus; in ixgbe_mii_bus_init()
1093 * ixgbe_setup_phy_link_generic - Set and restart autoneg
1096 * Restart autonegotiation and PHY and waits for completion.
1107 /* Set or unset auto-negotiation 10G advertisement */ in ixgbe_setup_phy_link_generic()
1108 hw->phy.ops.read_reg(hw, MDIO_AN_10GBT_CTRL, MDIO_MMD_AN, &autoneg_reg); in ixgbe_setup_phy_link_generic()
1111 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) && in ixgbe_setup_phy_link_generic()
1115 hw->phy.ops.write_reg(hw, MDIO_AN_10GBT_CTRL, MDIO_MMD_AN, autoneg_reg); in ixgbe_setup_phy_link_generic()
1117 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, in ixgbe_setup_phy_link_generic()
1120 if (hw->mac.type == ixgbe_mac_X550 || hw->mac.type == ixgbe_mac_e610) { in ixgbe_setup_phy_link_generic()
1121 /* Set or unset auto-negotiation 5G advertisement */ in ixgbe_setup_phy_link_generic()
1123 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) && in ixgbe_setup_phy_link_generic()
1127 /* Set or unset auto-negotiation 2.5G advertisement */ in ixgbe_setup_phy_link_generic()
1129 if ((hw->phy.autoneg_advertised & in ixgbe_setup_phy_link_generic()
1135 /* Set or unset auto-negotiation 1G advertisement */ in ixgbe_setup_phy_link_generic()
1137 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) && in ixgbe_setup_phy_link_generic()
1141 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, in ixgbe_setup_phy_link_generic()
1144 /* Set or unset auto-negotiation 100M advertisement */ in ixgbe_setup_phy_link_generic()
1145 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, MDIO_MMD_AN, &autoneg_reg); in ixgbe_setup_phy_link_generic()
1148 if ((hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) && in ixgbe_setup_phy_link_generic()
1152 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, MDIO_MMD_AN, autoneg_reg); in ixgbe_setup_phy_link_generic()
1154 /* Blocked by MNG FW so don't reset PHY */ in ixgbe_setup_phy_link_generic()
1158 /* Restart PHY autonegotiation and wait for completion */ in ixgbe_setup_phy_link_generic()
1159 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_generic()
1164 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_generic()
1171 * ixgbe_setup_phy_link_speed_generic - Sets the auto advertised capabilities
1183 hw->phy.autoneg_advertised = 0; in ixgbe_setup_phy_link_speed_generic()
1186 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1189 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_5GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1192 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_2_5GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1195 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_setup_phy_link_speed_generic()
1198 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_setup_phy_link_speed_generic()
1201 hw->phy.autoneg_advertised |= IXGBE_LINK_SPEED_10_FULL; in ixgbe_setup_phy_link_speed_generic()
1204 if (hw->phy.ops.setup_link) in ixgbe_setup_phy_link_speed_generic()
1205 hw->phy.ops.setup_link(hw); in ixgbe_setup_phy_link_speed_generic()
1211 * ixgbe_get_copper_speeds_supported - Get copper link speed from phy
1214 * Determines the supported link capabilities by reading the PHY auto
1222 status = hw->phy.ops.read_reg(hw, MDIO_SPEED, MDIO_MMD_PMAPMD, in ixgbe_get_copper_speeds_supported()
1228 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_10GB_FULL; in ixgbe_get_copper_speeds_supported()
1230 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_1GB_FULL; in ixgbe_get_copper_speeds_supported()
1232 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_100_FULL; in ixgbe_get_copper_speeds_supported()
1234 switch (hw->mac.type) { in ixgbe_get_copper_speeds_supported()
1237 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_2_5GB_FULL; in ixgbe_get_copper_speeds_supported()
1238 hw->phy.speeds_supported |= IXGBE_LINK_SPEED_5GB_FULL; in ixgbe_get_copper_speeds_supported()
1242 hw->phy.speeds_supported &= ~IXGBE_LINK_SPEED_100_FULL; in ixgbe_get_copper_speeds_supported()
1252 * ixgbe_get_copper_link_capabilities_generic - Determines link capabilities
1255 * @autoneg: boolean auto-negotiation value
1264 if (!hw->phy.speeds_supported) in ixgbe_get_copper_link_capabilities_generic()
1267 *speed = hw->phy.speeds_supported; in ixgbe_get_copper_link_capabilities_generic()
1272 * ixgbe_check_phy_link_tnx - Determine link and speed status
1278 * the PHY.
1295 * Check current speed and link status of the PHY register. in ixgbe_check_phy_link_tnx()
1301 status = hw->phy.ops.read_reg(hw, in ixgbe_check_phy_link_tnx()
1322 * ixgbe_setup_phy_link_tnx - Set and restart autoneg
1325 * Restart autonegotiation and PHY and waits for completion.
1339 /* Set or unset auto-negotiation 10G advertisement */ in ixgbe_setup_phy_link_tnx()
1340 hw->phy.ops.read_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_tnx()
1345 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) in ixgbe_setup_phy_link_tnx()
1348 hw->phy.ops.write_reg(hw, MDIO_AN_10GBT_CTRL, in ixgbe_setup_phy_link_tnx()
1354 /* Set or unset auto-negotiation 1G advertisement */ in ixgbe_setup_phy_link_tnx()
1355 hw->phy.ops.read_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, in ixgbe_setup_phy_link_tnx()
1360 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) in ixgbe_setup_phy_link_tnx()
1363 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, in ixgbe_setup_phy_link_tnx()
1369 /* Set or unset auto-negotiation 100M advertisement */ in ixgbe_setup_phy_link_tnx()
1370 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_tnx()
1376 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) in ixgbe_setup_phy_link_tnx()
1379 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE, in ixgbe_setup_phy_link_tnx()
1384 /* Blocked by MNG FW so don't reset PHY */ in ixgbe_setup_phy_link_tnx()
1388 /* Restart PHY autonegotiation and wait for completion */ in ixgbe_setup_phy_link_tnx()
1389 hw->phy.ops.read_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_tnx()
1394 hw->phy.ops.write_reg(hw, MDIO_CTRL1, in ixgbe_setup_phy_link_tnx()
1400 * ixgbe_reset_phy_nl - Performs a PHY reset
1416 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, &phy_data); in ixgbe_reset_phy_nl()
1418 /* reset the PHY and poll for completion */ in ixgbe_reset_phy_nl()
1419 hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, in ixgbe_reset_phy_nl()
1423 hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_PHYXS, in ixgbe_reset_phy_nl()
1431 hw_dbg(hw, "PHY reset did not complete.\n"); in ixgbe_reset_phy_nl()
1432 return -EIO; in ixgbe_reset_phy_nl()
1441 ret_val = hw->eeprom.ops.read(hw, data_offset, &block_crc); in ixgbe_reset_phy_nl()
1445 * Read control word from PHY init contents offset in ixgbe_reset_phy_nl()
1447 ret_val = hw->eeprom.ops.read(hw, data_offset, &eword); in ixgbe_reset_phy_nl()
1461 ret_val = hw->eeprom.ops.read(hw, data_offset++, in ixgbe_reset_phy_nl()
1466 ret_val = hw->eeprom.ops.read(hw, data_offset, in ixgbe_reset_phy_nl()
1470 hw->phy.ops.write_reg(hw, phy_offset, in ixgbe_reset_phy_nl()
1488 return -EIO; in ixgbe_reset_phy_nl()
1493 return -EIO; in ixgbe_reset_phy_nl()
1501 return -EIO; in ixgbe_reset_phy_nl()
1505 * ixgbe_identify_module_generic - Identifies module type
1512 switch (hw->mac.ops.get_media_type(hw)) { in ixgbe_identify_module_generic()
1518 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_module_generic()
1519 return -ENOENT; in ixgbe_identify_module_generic()
1522 return -ENOENT; in ixgbe_identify_module_generic()
1526 * ixgbe_identify_sfp_module_generic - Identifies SFP modules
1529 * Searches for and identifies the SFP module and assigns appropriate PHY type.
1533 enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; in ixgbe_identify_sfp_module_generic()
1534 struct ixgbe_adapter *adapter = hw->back; in ixgbe_identify_sfp_module_generic()
1546 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber) { in ixgbe_identify_sfp_module_generic()
1547 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_sfp_module_generic()
1548 return -ENOENT; in ixgbe_identify_sfp_module_generic()
1552 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_sfp_module_generic()
1554 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1562 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1563 return -EOPNOTSUPP; in ixgbe_identify_sfp_module_generic()
1565 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1572 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1578 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1584 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1595 * 3 SFP_DA_CORE0 - 82599-specific in ixgbe_identify_sfp_module_generic()
1596 * 4 SFP_DA_CORE1 - 82599-specific in ixgbe_identify_sfp_module_generic()
1597 * 5 SFP_SR/LR_CORE0 - 82599-specific in ixgbe_identify_sfp_module_generic()
1598 * 6 SFP_SR/LR_CORE1 - 82599-specific in ixgbe_identify_sfp_module_generic()
1599 * 7 SFP_act_lmt_DA_CORE0 - 82599-specific in ixgbe_identify_sfp_module_generic()
1600 * 8 SFP_act_lmt_DA_CORE1 - 82599-specific in ixgbe_identify_sfp_module_generic()
1601 * 9 SFP_1g_cu_CORE0 - 82599-specific in ixgbe_identify_sfp_module_generic()
1602 * 10 SFP_1g_cu_CORE1 - 82599-specific in ixgbe_identify_sfp_module_generic()
1603 * 11 SFP_1g_sx_CORE0 - 82599-specific in ixgbe_identify_sfp_module_generic()
1604 * 12 SFP_1g_sx_CORE1 - 82599-specific in ixgbe_identify_sfp_module_generic()
1606 if (hw->mac.type == ixgbe_mac_82598EB) { in ixgbe_identify_sfp_module_generic()
1608 hw->phy.sfp_type = ixgbe_sfp_type_da_cu; in ixgbe_identify_sfp_module_generic()
1610 hw->phy.sfp_type = ixgbe_sfp_type_sr; in ixgbe_identify_sfp_module_generic()
1612 hw->phy.sfp_type = ixgbe_sfp_type_lr; in ixgbe_identify_sfp_module_generic()
1614 hw->phy.sfp_type = ixgbe_sfp_type_unknown; in ixgbe_identify_sfp_module_generic()
1617 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1618 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1621 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1624 hw->phy.ops.read_i2c_eeprom( in ixgbe_identify_sfp_module_generic()
1629 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1630 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1633 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1636 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1642 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1643 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1646 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1649 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1650 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1653 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1656 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1657 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1660 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1663 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1664 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1667 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1669 /* Support only Ethernet 1000BASE-BX10, checking the Bit Rate in ixgbe_identify_sfp_module_generic()
1670 * Nominal Value as per SFF-8472 by convention 1.25 Gb/s should in ixgbe_identify_sfp_module_generic()
1671 * be rounded up to 0Dh (13 in units of 100 MBd) for 1000BASE-BX in ixgbe_identify_sfp_module_generic()
1675 if (hw->bus.lan_id == 0) in ixgbe_identify_sfp_module_generic()
1676 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1679 hw->phy.sfp_type = in ixgbe_identify_sfp_module_generic()
1682 hw->phy.sfp_type = ixgbe_sfp_type_unknown; in ixgbe_identify_sfp_module_generic()
1686 if (hw->phy.sfp_type != stored_sfp_type) in ixgbe_identify_sfp_module_generic()
1687 hw->phy.sfp_setup_needed = true; in ixgbe_identify_sfp_module_generic()
1689 /* Determine if the SFP+ PHY is dual speed or not. */ in ixgbe_identify_sfp_module_generic()
1690 hw->phy.multispeed_fiber = false; in ixgbe_identify_sfp_module_generic()
1695 hw->phy.multispeed_fiber = true; in ixgbe_identify_sfp_module_generic()
1697 /* Determine PHY vendor */ in ixgbe_identify_sfp_module_generic()
1698 if (hw->phy.type != ixgbe_phy_nl) { in ixgbe_identify_sfp_module_generic()
1699 hw->phy.id = identifier; in ixgbe_identify_sfp_module_generic()
1700 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1707 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1714 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_sfp_module_generic()
1729 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1734 hw->phy.type = ixgbe_phy_sfp_ftl_active; in ixgbe_identify_sfp_module_generic()
1736 hw->phy.type = ixgbe_phy_sfp_ftl; in ixgbe_identify_sfp_module_generic()
1739 hw->phy.type = ixgbe_phy_sfp_avago; in ixgbe_identify_sfp_module_generic()
1742 hw->phy.type = ixgbe_phy_sfp_intel; in ixgbe_identify_sfp_module_generic()
1746 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1749 hw->phy.type = in ixgbe_identify_sfp_module_generic()
1752 hw->phy.type = ixgbe_phy_sfp_unknown; in ixgbe_identify_sfp_module_generic()
1764 !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_identify_sfp_module_generic()
1765 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_identify_sfp_module_generic()
1766 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_identify_sfp_module_generic()
1767 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_identify_sfp_module_generic()
1768 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_identify_sfp_module_generic()
1769 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1 || in ixgbe_identify_sfp_module_generic()
1770 hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core0 || in ixgbe_identify_sfp_module_generic()
1771 hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core1)) { in ixgbe_identify_sfp_module_generic()
1772 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1773 return -EOPNOTSUPP; in ixgbe_identify_sfp_module_generic()
1776 /* Anything else 82598-based is supported */ in ixgbe_identify_sfp_module_generic()
1777 if (hw->mac.type == ixgbe_mac_82598EB) in ixgbe_identify_sfp_module_generic()
1780 hw->mac.ops.get_device_caps(hw, &enforce_sfp); in ixgbe_identify_sfp_module_generic()
1782 !(hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || in ixgbe_identify_sfp_module_generic()
1783 hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1 || in ixgbe_identify_sfp_module_generic()
1784 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core0 || in ixgbe_identify_sfp_module_generic()
1785 hw->phy.sfp_type == ixgbe_sfp_type_1g_lx_core1 || in ixgbe_identify_sfp_module_generic()
1786 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core0 || in ixgbe_identify_sfp_module_generic()
1787 hw->phy.sfp_type == ixgbe_sfp_type_1g_sx_core1 || in ixgbe_identify_sfp_module_generic()
1788 hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core0 || in ixgbe_identify_sfp_module_generic()
1789 hw->phy.sfp_type == ixgbe_sfp_type_1g_bx_core1)) { in ixgbe_identify_sfp_module_generic()
1790 /* Make sure we're a supported PHY type */ in ixgbe_identify_sfp_module_generic()
1791 if (hw->phy.type == ixgbe_phy_sfp_intel) in ixgbe_identify_sfp_module_generic()
1793 if (hw->allow_unsupported_sfp) { in ixgbe_identify_sfp_module_generic()
1798 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_sfp_module_generic()
1799 return -EOPNOTSUPP; in ixgbe_identify_sfp_module_generic()
1804 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_sfp_module_generic()
1805 if (hw->phy.type != ixgbe_phy_nl) { in ixgbe_identify_sfp_module_generic()
1806 hw->phy.id = 0; in ixgbe_identify_sfp_module_generic()
1807 hw->phy.type = ixgbe_phy_unknown; in ixgbe_identify_sfp_module_generic()
1809 return -ENOENT; in ixgbe_identify_sfp_module_generic()
1813 * ixgbe_identify_qsfp_module_generic - Identifies QSFP modules
1816 * Searches for and identifies the QSFP module and assigns appropriate PHY type
1820 struct ixgbe_adapter *adapter = hw->back; in ixgbe_identify_qsfp_module_generic()
1823 enum ixgbe_sfp_type stored_sfp_type = hw->phy.sfp_type; in ixgbe_identify_qsfp_module_generic()
1834 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_fiber_qsfp) { in ixgbe_identify_qsfp_module_generic()
1835 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_qsfp_module_generic()
1836 return -ENOENT; in ixgbe_identify_qsfp_module_generic()
1840 hw->mac.ops.set_lan_id(hw); in ixgbe_identify_qsfp_module_generic()
1842 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_IDENTIFIER, in ixgbe_identify_qsfp_module_generic()
1849 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1850 return -EOPNOTSUPP; in ixgbe_identify_qsfp_module_generic()
1853 hw->phy.id = identifier; in ixgbe_identify_qsfp_module_generic()
1855 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_10GBE_COMP, in ixgbe_identify_qsfp_module_generic()
1861 status = hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_QSFP_1GBE_COMP, in ixgbe_identify_qsfp_module_generic()
1868 hw->phy.type = ixgbe_phy_qsfp_passive_unknown; in ixgbe_identify_qsfp_module_generic()
1869 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1870 hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core0; in ixgbe_identify_qsfp_module_generic()
1872 hw->phy.sfp_type = ixgbe_sfp_type_da_cu_core1; in ixgbe_identify_qsfp_module_generic()
1875 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1876 hw->phy.sfp_type = ixgbe_sfp_type_srlr_core0; in ixgbe_identify_qsfp_module_generic()
1878 hw->phy.sfp_type = ixgbe_sfp_type_srlr_core1; in ixgbe_identify_qsfp_module_generic()
1884 /* check for active DA cables that pre-date in ixgbe_identify_qsfp_module_generic()
1885 * SFF-8436 v3.6 in ixgbe_identify_qsfp_module_generic()
1887 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1891 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1895 hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1908 hw->phy.type = ixgbe_phy_qsfp_active_unknown; in ixgbe_identify_qsfp_module_generic()
1909 if (hw->bus.lan_id == 0) in ixgbe_identify_qsfp_module_generic()
1910 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1913 hw->phy.sfp_type = in ixgbe_identify_qsfp_module_generic()
1917 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1918 return -EOPNOTSUPP; in ixgbe_identify_qsfp_module_generic()
1922 if (hw->phy.sfp_type != stored_sfp_type) in ixgbe_identify_qsfp_module_generic()
1923 hw->phy.sfp_setup_needed = true; in ixgbe_identify_qsfp_module_generic()
1925 /* Determine if the QSFP+ PHY is dual speed or not. */ in ixgbe_identify_qsfp_module_generic()
1926 hw->phy.multispeed_fiber = false; in ixgbe_identify_qsfp_module_generic()
1931 hw->phy.multispeed_fiber = true; in ixgbe_identify_qsfp_module_generic()
1933 /* Determine PHY vendor for optical modules */ in ixgbe_identify_qsfp_module_generic()
1936 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1943 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1950 status = hw->phy.ops.read_i2c_eeprom(hw, in ixgbe_identify_qsfp_module_generic()
1963 hw->phy.type = ixgbe_phy_qsfp_intel; in ixgbe_identify_qsfp_module_generic()
1965 hw->phy.type = ixgbe_phy_qsfp_unknown; in ixgbe_identify_qsfp_module_generic()
1967 hw->mac.ops.get_device_caps(hw, &enforce_sfp); in ixgbe_identify_qsfp_module_generic()
1969 /* Make sure we're a supported PHY type */ in ixgbe_identify_qsfp_module_generic()
1970 if (hw->phy.type == ixgbe_phy_qsfp_intel) in ixgbe_identify_qsfp_module_generic()
1972 if (hw->allow_unsupported_sfp) { in ixgbe_identify_qsfp_module_generic()
1977 hw->phy.type = ixgbe_phy_sfp_unsupported; in ixgbe_identify_qsfp_module_generic()
1978 return -EOPNOTSUPP; in ixgbe_identify_qsfp_module_generic()
1985 hw->phy.sfp_type = ixgbe_sfp_type_not_present; in ixgbe_identify_qsfp_module_generic()
1986 hw->phy.id = 0; in ixgbe_identify_qsfp_module_generic()
1987 hw->phy.type = ixgbe_phy_unknown; in ixgbe_identify_qsfp_module_generic()
1989 return -ENOENT; in ixgbe_identify_qsfp_module_generic()
1993 * ixgbe_get_sfp_init_sequence_offsets - Provides offset of PHY init sequence
1999 * so it returns the offsets to the phy init sequence block.
2006 u16 sfp_type = hw->phy.sfp_type; in ixgbe_get_sfp_init_sequence_offsets()
2008 if (hw->phy.sfp_type == ixgbe_sfp_type_unknown) in ixgbe_get_sfp_init_sequence_offsets()
2009 return -EOPNOTSUPP; in ixgbe_get_sfp_init_sequence_offsets()
2011 if (hw->phy.sfp_type == ixgbe_sfp_type_not_present) in ixgbe_get_sfp_init_sequence_offsets()
2012 return -ENOENT; in ixgbe_get_sfp_init_sequence_offsets()
2014 if ((hw->device_id == IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM) && in ixgbe_get_sfp_init_sequence_offsets()
2015 (hw->phy.sfp_type == ixgbe_sfp_type_da_cu)) in ixgbe_get_sfp_init_sequence_offsets()
2016 return -EOPNOTSUPP; in ixgbe_get_sfp_init_sequence_offsets()
2035 /* Read offset to PHY init contents */ in ixgbe_get_sfp_init_sequence_offsets()
2036 if (hw->eeprom.ops.read(hw, IXGBE_PHY_INIT_OFFSET_NL, list_offset)) { in ixgbe_get_sfp_init_sequence_offsets()
2039 return -EIO; in ixgbe_get_sfp_init_sequence_offsets()
2043 return -EIO; in ixgbe_get_sfp_init_sequence_offsets()
2052 if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) in ixgbe_get_sfp_init_sequence_offsets()
2058 if (hw->eeprom.ops.read(hw, *list_offset, data_offset)) in ixgbe_get_sfp_init_sequence_offsets()
2062 return -EOPNOTSUPP; in ixgbe_get_sfp_init_sequence_offsets()
2068 if (hw->eeprom.ops.read(hw, *list_offset, &sfp_id)) in ixgbe_get_sfp_init_sequence_offsets()
2075 return -EOPNOTSUPP; in ixgbe_get_sfp_init_sequence_offsets()
2082 return -EIO; in ixgbe_get_sfp_init_sequence_offsets()
2086 * ixgbe_read_i2c_eeprom_generic - Reads 8 bit EEPROM word over I2C interface
2091 * Performs byte read operation to SFP module's EEPROM over I2C interface.
2096 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_eeprom_generic()
2102 * ixgbe_read_i2c_sff8472_generic - Reads 8 bit word over I2C interface
2107 * Performs byte read operation to SFP module's SFF-8472 data over I2C
2112 return hw->phy.ops.read_i2c_byte(hw, byte_offset, in ixgbe_read_i2c_sff8472_generic()
2118 * ixgbe_write_i2c_eeprom_generic - Writes 8 bit EEPROM word over I2C interface
2123 * Performs byte write operation to SFP module's EEPROM over I2C interface.
2128 return hw->phy.ops.write_i2c_byte(hw, byte_offset, in ixgbe_write_i2c_eeprom_generic()
2134 * ixgbe_is_sfp_probe - Returns true if SFP is being detected
2137 * @addr: I2C address to be read
2143 hw->phy.sfp_type == ixgbe_sfp_type_not_present) in ixgbe_is_sfp_probe()
2149 * ixgbe_read_i2c_byte_generic_int - Reads 8 bit word over I2C
2156 * Performs byte read operation to SFP module's EEPROM over I2C interface at
2162 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_read_i2c_byte_generic_int()
2168 if (hw->mac.type >= ixgbe_mac_X550) in ixgbe_read_i2c_byte_generic_int()
2176 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_read_i2c_byte_generic_int()
2177 return -EBUSY; in ixgbe_read_i2c_byte_generic_int()
2219 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_byte_generic_int()
2225 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_read_i2c_byte_generic_int()
2230 hw_dbg(hw, "I2C byte read error - Retrying.\n"); in ixgbe_read_i2c_byte_generic_int()
2232 hw_dbg(hw, "I2C byte read error.\n"); in ixgbe_read_i2c_byte_generic_int()
2240 * ixgbe_read_i2c_byte_generic - Reads 8 bit word over I2C
2246 * Performs byte read operation to SFP module's EEPROM over I2C interface at
2257 * ixgbe_read_i2c_byte_generic_unlocked - Reads 8 bit word over I2C
2263 * Performs byte read operation to SFP module's EEPROM over I2C interface at
2274 * ixgbe_write_i2c_byte_generic_int - Writes 8 bit word over I2C
2281 * Performs byte write operation to SFP module's EEPROM over I2C interface at
2287 u32 swfw_mask = hw->phy.phy_semaphore_mask; in ixgbe_write_i2c_byte_generic_int()
2292 if (lock && hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)) in ixgbe_write_i2c_byte_generic_int()
2293 return -EBUSY; in ixgbe_write_i2c_byte_generic_int()
2324 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_byte_generic_int()
2331 hw_dbg(hw, "I2C byte write error - Retrying.\n"); in ixgbe_write_i2c_byte_generic_int()
2333 hw_dbg(hw, "I2C byte write error.\n"); in ixgbe_write_i2c_byte_generic_int()
2337 hw->mac.ops.release_swfw_sync(hw, swfw_mask); in ixgbe_write_i2c_byte_generic_int()
2343 * ixgbe_write_i2c_byte_generic - Writes 8 bit word over I2C
2349 * Performs byte write operation to SFP module's EEPROM over I2C interface at
2360 * ixgbe_write_i2c_byte_generic_unlocked - Writes 8 bit word over I2C
2366 * Performs byte write operation to SFP module's EEPROM over I2C interface at
2377 * ixgbe_i2c_start - Sets I2C start condition
2380 * Sets I2C start condition (High -> Low on SDA while SCL is High)
2381 * Set bit-bang mode on X550 hardware.
2409 * ixgbe_i2c_stop - Sets I2C stop condition
2412 * Sets I2C stop condition (Low -> High on SDA while SCL is High)
2413 * Disables bit-bang mode and negates data output enable on X550
2444 * ixgbe_clock_in_i2c_byte - Clocks in one byte via I2C
2448 * Clocks in one byte data via I2C data/clock
2456 for (i = 7; i >= 0; i--) { in ixgbe_clock_in_i2c_byte()
2465 * ixgbe_clock_out_i2c_byte - Clocks out one byte via I2C
2469 * Clocks out one byte data via I2C data/clock
2478 for (i = 7; i >= 0; i--) { in ixgbe_clock_out_i2c_byte()
2497 * ixgbe_get_i2c_ack - Polls for I2C ACK
2500 * Clocks in/out one bit via I2C data/clock
2522 /* Poll for ACK. Note that ACK in I2C spec is in ixgbe_get_i2c_ack()
2534 hw_dbg(hw, "I2C ack was not received.\n"); in ixgbe_get_i2c_ack()
2535 status = -EIO; in ixgbe_get_i2c_ack()
2547 * ixgbe_clock_in_i2c_bit - Clocks in one bit via I2C data/clock
2551 * Clocks in one bit via I2C data/clock
2581 * ixgbe_clock_out_i2c_bit - Clocks in/out one bit via I2C data/clock
2585 * Clocks out one bit via I2C data/clock
2606 hw_dbg(hw, "I2C data was not set to %X\n", data); in ixgbe_clock_out_i2c_bit()
2607 return -EIO; in ixgbe_clock_out_i2c_bit()
2613 * ixgbe_raise_i2c_clk - Raises the I2C SCL clock
2617 * Raises the I2C clock line '0'->'1'
2618 * Negates the I2C clock output enable on X550 hardware.
2646 * ixgbe_lower_i2c_clk - Lowers the I2C SCL clock
2650 * Lowers the I2C clock line '1'->'0'
2651 * Asserts the I2C clock output enable on X550 hardware.
2667 * ixgbe_set_i2c_data - Sets the I2C data bit
2670 * @data: I2C data value (0 or 1) to set
2672 * Sets the I2C data bit
2673 * Asserts the I2C data output enable on X550 hardware.
2688 /* Data rise/fall (1000ns/300ns) and set-up time (250ns) */ in ixgbe_set_i2c_data()
2702 hw_dbg(hw, "Error - I2C data was not set to %X.\n", data); in ixgbe_set_i2c_data()
2703 return -EIO; in ixgbe_set_i2c_data()
2710 * ixgbe_get_i2c_data - Reads the I2C SDA data bit
2714 * Returns the I2C data bit value
2715 * Negates the I2C data output enable on X550 hardware.
2734 * ixgbe_i2c_bus_clear - Clears the I2C bus
2737 * Clears the I2C bus by sending nine clock pulses.
2764 /* Put the i2c bus back to default state */ in ixgbe_i2c_bus_clear()
2769 * ixgbe_tn_check_overtemp - Checks if an overtemp occurred.
2781 if (hw->device_id != IXGBE_DEV_ID_82599_T3_LOM) in ixgbe_tn_check_overtemp()
2785 status = hw->phy.ops.read_reg(hw, IXGBE_TN_LASI_STATUS_REG, in ixgbe_tn_check_overtemp()
2793 /** ixgbe_set_copper_phy_power - Control power for copper phy
2802 /* Bail if we don't have copper phy */ in ixgbe_set_copper_phy_power()
2803 if (hw->mac.ops.get_media_type(hw) != ixgbe_media_type_copper) in ixgbe_set_copper_phy_power()
2809 status = hw->phy.ops.read_reg(hw, MDIO_CTRL1, MDIO_MMD_VEND1, ®); in ixgbe_set_copper_phy_power()
2821 status = hw->phy.ops.write_reg(hw, MDIO_CTRL1, MDIO_MMD_VEND1, reg); in ixgbe_set_copper_phy_power()