Lines Matching +full:0 +full:x00000040

8 #define IXGBE_RTTDCS_TDPAC      0x00000001 /* 0 Round Robin,
11 #define IXGBE_RTTDCS_VMPAC      0x00000002 /* 0 Round Robin,
14 #define IXGBE_RTTDCS_TDRM       0x00000010 /* Transmit Recycle Mode */
15 #define IXGBE_RTTDCS_ARBDIS     0x00000040 /* DCB arbiter disable */
16 #define IXGBE_RTTDCS_BDPM       0x00400000 /* Bypass Data Pipe - must clear! */
17 #define IXGBE_RTTDCS_BPBFSM     0x00800000 /* Bypass PB Free Space - must
20 #define IXGBE_RTTDCS_SPEED_CHG  0x80000000 /* Link speed change */
30 #define IXGBE_RTRPT4C_GSP       0x40000000 /* GSP enable bit */
31 #define IXGBE_RTRPT4C_LSP       0x80000000 /* LSP enable bit */
33 #define IXGBE_RDRXCTL_MPBEN     0x00000010 /* DMA config for multiple packet
36 #define IXGBE_RDRXCTL_MCEN      0x00000040 /* DMA config for multiple cores
41 #define IXGBE_RTRPCS_RRM        0x00000002 /* Receive Recycle Mode enable */
42 /* Receive Arbitration Control: 0 Round Robin, 1 DFP */
43 #define IXGBE_RTRPCS_RAC        0x00000004
44 #define IXGBE_RTRPCS_ARBDIS     0x00000040 /* Arbitration disable bit */
49 #define IXGBE_RTTDT2C_GSP       0x40000000
50 #define IXGBE_RTTDT2C_LSP       0x80000000
54 #define IXGBE_RTTPT2C_GSP       0x40000000
55 #define IXGBE_RTTPT2C_LSP       0x80000000
58 #define IXGBE_RTTPCS_TPPAC      0x00000020 /* 0 Round Robin,
61 #define IXGBE_RTTPCS_ARBDIS     0x00000040 /* Arbiter disable */
62 #define IXGBE_RTTPCS_TPRM       0x00000100 /* Transmit Recycle Mode enable */
64 #define IXGBE_RTTPCS_ARBD_DCB   0x4        /* Arbitration delay in DCB mode */
67 #define IXGBE_SECTX_DCB		0x00001F00 /* DCB TX Buffer IFG */