1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
26  *  ixgbe_set_pcie_completion_timeout - set pci-e completion timeout
31  *  than the 10ms recommended by the pci-e spec.  To address this we need to
40 	if (ixgbe_removed(hw->hw_addr))  in ixgbe_set_pcie_completion_timeout()
72 	struct ixgbe_mac_info *mac = &hw->mac;  in ixgbe_get_invariants_82598()  local
74 	/* Call PHY identify routine to get the phy type */  in ixgbe_get_invariants_82598()
77 	mac->mcft_size = IXGBE_82598_MC_TBL_SIZE;  in ixgbe_get_invariants_82598()
78 	mac->vft_size = IXGBE_82598_VFT_TBL_SIZE;  in ixgbe_get_invariants_82598()
79 	mac->num_rar_entries = IXGBE_82598_RAR_ENTRIES;  in ixgbe_get_invariants_82598()
80 	mac->rx_pb_size = IXGBE_82598_RX_PB_SIZE;  in ixgbe_get_invariants_82598()
81 	mac->max_rx_queues = IXGBE_82598_MAX_RX_QUEUES;  in ixgbe_get_invariants_82598()
82 	mac->max_tx_queues = IXGBE_82598_MAX_TX_QUEUES;  in ixgbe_get_invariants_82598()
83 	mac->max_msix_vectors = ixgbe_get_pcie_msix_count_generic(hw);  in ixgbe_get_invariants_82598()
89  *  ixgbe_init_phy_ops_82598 - PHY/SFP specific init
93  *  set during get_invariants because the PHY/SFP type was
99 	struct ixgbe_mac_info *mac = &hw->mac;  in ixgbe_init_phy_ops_82598()  local
100 	struct ixgbe_phy_info *phy = &hw->phy;  in ixgbe_init_phy_ops_82598()  local
104 	/* Identify the PHY */  in ixgbe_init_phy_ops_82598()
105 	phy->ops.identify(hw);  in ixgbe_init_phy_ops_82598()
107 	/* Overwrite the link function pointers if copper PHY */  in ixgbe_init_phy_ops_82598()
108 	if (mac->ops.get_media_type(hw) == ixgbe_media_type_copper) {  in ixgbe_init_phy_ops_82598()
109 		mac->ops.setup_link = &ixgbe_setup_copper_link_82598;  in ixgbe_init_phy_ops_82598()
110 		mac->ops.get_link_capabilities =  in ixgbe_init_phy_ops_82598()
114 	switch (hw->phy.type) {  in ixgbe_init_phy_ops_82598()
116 		phy->ops.setup_link = &ixgbe_setup_phy_link_tnx;  in ixgbe_init_phy_ops_82598()
117 		phy->ops.check_link = &ixgbe_check_phy_link_tnx;  in ixgbe_init_phy_ops_82598()
120 		phy->ops.reset = &ixgbe_reset_phy_nl;  in ixgbe_init_phy_ops_82598()
123 		ret_val = phy->ops.identify_sfp(hw);  in ixgbe_init_phy_ops_82598()
126 		if (hw->phy.sfp_type == ixgbe_sfp_type_unknown)  in ixgbe_init_phy_ops_82598()
127 			return -EOPNOTSUPP;  in ixgbe_init_phy_ops_82598()
134 			return -EOPNOTSUPP;  in ixgbe_init_phy_ops_82598()
144  *  ixgbe_start_hw_82598 - Prepare hardware for Tx/Rx
167  *  ixgbe_get_link_capabilities_82598 - Determines link capabilities
170  *  @autoneg: boolean auto-negotiation value
185 	if (hw->mac.orig_link_settings_stored)  in ixgbe_get_link_capabilities_82598()
186 		autoc = hw->mac.orig_autoc;  in ixgbe_get_link_capabilities_82598()
217 		return -EIO;  in ixgbe_get_link_capabilities_82598()
224  *  ixgbe_get_media_type_82598 - Determines media type
231 	/* Detect if there is a copper PHY attached. */  in ixgbe_get_media_type_82598()
232 	switch (hw->phy.type) {  in ixgbe_get_media_type_82598()
242 	switch (hw->device_id) {  in ixgbe_get_media_type_82598()
270  *  ixgbe_fc_enable_82598 - Enable flow control
286 	if (!hw->fc.pause_time)  in ixgbe_fc_enable_82598()
287 		return -EINVAL;  in ixgbe_fc_enable_82598()
291 		if ((hw->fc.current_mode & ixgbe_fc_tx_pause) &&  in ixgbe_fc_enable_82598()
292 		    hw->fc.high_water[i]) {  in ixgbe_fc_enable_82598()
293 			if (!hw->fc.low_water[i] ||  in ixgbe_fc_enable_82598()
294 			    hw->fc.low_water[i] >= hw->fc.high_water[i]) {  in ixgbe_fc_enable_82598()
296 				return -EINVAL;  in ixgbe_fc_enable_82598()
306 	hw->mac.ops.check_link(hw, &link_speed, &link_up, false);  in ixgbe_fc_enable_82598()
308 		switch (hw->fc.requested_mode) {  in ixgbe_fc_enable_82598()
310 			hw->fc.requested_mode = ixgbe_fc_tx_pause;  in ixgbe_fc_enable_82598()
313 			hw->fc.requested_mode = ixgbe_fc_none;  in ixgbe_fc_enable_82598()
322 	hw->mac.ops.fc_autoneg(hw);  in ixgbe_fc_enable_82598()
341 	switch (hw->fc.current_mode) {  in ixgbe_fc_enable_82598()
373 		return -EIO;  in ixgbe_fc_enable_82598()
383 		if ((hw->fc.current_mode & ixgbe_fc_tx_pause) &&  in ixgbe_fc_enable_82598()
384 		    hw->fc.high_water[i]) {  in ixgbe_fc_enable_82598()
385 			fcrtl = (hw->fc.low_water[i] << 10) | IXGBE_FCRTL_XONE;  in ixgbe_fc_enable_82598()
386 			fcrth = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN;  in ixgbe_fc_enable_82598()
397 	reg = hw->fc.pause_time * 0x00010001;  in ixgbe_fc_enable_82598()
402 	IXGBE_WRITE_REG(hw, IXGBE_FCRTV, hw->fc.pause_time / 2);  in ixgbe_fc_enable_82598()
408  *  ixgbe_start_mac_link_82598 - Configures MAC link settings
442 				status = -EIO;  in ixgbe_start_mac_link_82598()
455  *  ixgbe_validate_link_ready - Function looks for phy link
458  *  Function indicates success when phy link is available. If phy is not ready
459  *  within 5 seconds of MAC indicating link, the function returns error.
466 	if (hw->device_id != IXGBE_DEV_ID_82598AT2)  in ixgbe_validate_link_ready()
471 		hw->phy.ops.read_reg(hw, MDIO_STAT1, MDIO_MMD_AN, &an_reg);  in ixgbe_validate_link_ready()
482 		return -EIO;  in ixgbe_validate_link_ready()
489  *  ixgbe_check_mac_link_82598 - Get link/speed status
506 	 * SERDES PHY requires us to read link status from register 0xC79F.  in ixgbe_check_mac_link_82598()
511 	if (hw->phy.type == ixgbe_phy_nl) {  in ixgbe_check_mac_link_82598()
512 		hw->phy.ops.read_reg(hw, 0xC79F, MDIO_MMD_PMAPMD, &link_reg);  in ixgbe_check_mac_link_82598()
513 		hw->phy.ops.read_reg(hw, 0xC79F, MDIO_MMD_PMAPMD, &link_reg);  in ixgbe_check_mac_link_82598()
514 		hw->phy.ops.read_reg(hw, 0xC00C, MDIO_MMD_PMAPMD,  in ixgbe_check_mac_link_82598()
526 				hw->phy.ops.read_reg(hw, 0xC79F,  in ixgbe_check_mac_link_82598()
529 				hw->phy.ops.read_reg(hw, 0xC00C,  in ixgbe_check_mac_link_82598()
568 	if ((hw->device_id == IXGBE_DEV_ID_82598AT2) && *link_up &&  in ixgbe_check_mac_link_82598()
576  *  ixgbe_setup_mac_link_82598 - Set MAC link speed
598 		return -EINVAL;  in ixgbe_setup_mac_link_82598()
621  *  ixgbe_setup_copper_link_82598 - Set the PHY autoneg advertised field
626  *  Sets the link speed in the AUTOC register in the MAC and restarts link.
634 	/* Setup the PHY according to input speed */  in ixgbe_setup_copper_link_82598()
635 	status = hw->phy.ops.setup_link_speed(hw, speed,  in ixgbe_setup_copper_link_82598()
637 	/* Set up MAC */  in ixgbe_setup_copper_link_82598()
644  *  ixgbe_reset_hw_82598 - Performs hardware reset
648  *  clears all interrupts, performing a PHY reset, and performing a link (MAC)
662 	status = hw->mac.ops.stop_adapter(hw);  in ixgbe_reset_hw_82598()
668 	 * Atlas Tx lanes are powered down for MAC loopback tests, but  in ixgbe_reset_hw_82598()
671 	hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &analog_val);  in ixgbe_reset_hw_82598()
674 		hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK,  in ixgbe_reset_hw_82598()
677 		hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK,  in ixgbe_reset_hw_82598()
680 		hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G,  in ixgbe_reset_hw_82598()
683 		hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G,  in ixgbe_reset_hw_82598()
686 		hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G,  in ixgbe_reset_hw_82598()
689 		hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G,  in ixgbe_reset_hw_82598()
692 		hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN,  in ixgbe_reset_hw_82598()
695 		hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN,  in ixgbe_reset_hw_82598()
699 	/* Reset PHY */  in ixgbe_reset_hw_82598()
700 	if (hw->phy.reset_disable == false) {  in ixgbe_reset_hw_82598()
701 		/* PHY ops must be identified and initialized prior to reset */  in ixgbe_reset_hw_82598()
703 		/* Init PHY and function pointers, perform SFP setup */  in ixgbe_reset_hw_82598()
704 		phy_status = hw->phy.ops.init(hw);  in ixgbe_reset_hw_82598()
705 		if (phy_status == -EOPNOTSUPP)  in ixgbe_reset_hw_82598()
707 		if (phy_status == -ENOENT)  in ixgbe_reset_hw_82598()
710 		hw->phy.ops.reset(hw);  in ixgbe_reset_hw_82598()
715 	 * Issue global reset to the MAC.  This needs to be a SW reset.  in ixgbe_reset_hw_82598()
716 	 * If link reset is used, it might reset the MAC when mng is using it  in ixgbe_reset_hw_82598()
723 	/* Poll for reset bit to self-clear indicating reset is complete */  in ixgbe_reset_hw_82598()
731 		status = -EIO;  in ixgbe_reset_hw_82598()
742 	if (hw->mac.flags & IXGBE_FLAGS_DOUBLE_RESET_REQUIRED) {  in ixgbe_reset_hw_82598()
743 		hw->mac.flags &= ~IXGBE_FLAGS_DOUBLE_RESET_REQUIRED;  in ixgbe_reset_hw_82598()
757 	if (hw->mac.orig_link_settings_stored == false) {  in ixgbe_reset_hw_82598()
758 		hw->mac.orig_autoc = autoc;  in ixgbe_reset_hw_82598()
759 		hw->mac.orig_link_settings_stored = true;  in ixgbe_reset_hw_82598()
760 	} else if (autoc != hw->mac.orig_autoc) {  in ixgbe_reset_hw_82598()
761 		IXGBE_WRITE_REG(hw, IXGBE_AUTOC, hw->mac.orig_autoc);  in ixgbe_reset_hw_82598()
764 	/* Store the permanent mac address */  in ixgbe_reset_hw_82598()
765 	hw->mac.ops.get_mac_addr(hw, hw->mac.perm_addr);  in ixgbe_reset_hw_82598()
768 	 * Store MAC address from RAR0, clear receive address registers, and  in ixgbe_reset_hw_82598()
771 	hw->mac.ops.init_rx_addrs(hw);  in ixgbe_reset_hw_82598()
780  *  ixgbe_set_vmdq_82598 - Associate a VMDq set index with a rx address
788 	u32 rar_entries = hw->mac.num_rar_entries;  in ixgbe_set_vmdq_82598()
793 		return -EINVAL;  in ixgbe_set_vmdq_82598()
804  *  ixgbe_clear_vmdq_82598 - Disassociate a VMDq set index from an rx address
812 	u32 rar_entries = hw->mac.num_rar_entries;  in ixgbe_clear_vmdq_82598()
818 		return -EINVAL;  in ixgbe_clear_vmdq_82598()
831  *  ixgbe_set_vfta_82598 - Set VLAN filter table
836  *  @vlvf_bypass: boolean flag - unused
849 		return -EINVAL;  in ixgbe_set_vfta_82598()
851 	/* Determine 32-bit word position in array */  in ixgbe_set_vfta_82598()
880  *  ixgbe_clear_vfta_82598 - Clear VLAN filter table
890 	for (offset = 0; offset < hw->mac.vft_size; offset++)  in ixgbe_clear_vfta_82598()
894 		for (offset = 0; offset < hw->mac.vft_size; offset++)  in ixgbe_clear_vfta_82598()
902  *  ixgbe_read_analog_reg8_82598 - Reads 8 bit Atlas analog register
924  *  ixgbe_write_analog_reg8_82598 - Writes 8 bit Atlas analog register
944  *  ixgbe_read_i2c_phy_82598 - Reads 8 bit word over I2C interface.
967 	if (hw->mac.ops.acquire_swfw_sync(hw, gssr) != 0)  in ixgbe_read_i2c_phy_82598()
968 		return -EBUSY;  in ixgbe_read_i2c_phy_82598()
970 	if (hw->phy.type == ixgbe_phy_nl) {  in ixgbe_read_i2c_phy_82598()
972 		 * phy SDA/SCL registers are at addresses 0xC30A to  in ixgbe_read_i2c_phy_82598()
978 		hw->phy.ops.write_reg_mdi(hw,  in ixgbe_read_i2c_phy_82598()
985 			hw->phy.ops.read_reg_mdi(hw,  in ixgbe_read_i2c_phy_82598()
997 			status = -ENOENT;  in ixgbe_read_i2c_phy_82598()
1002 		hw->phy.ops.read_reg_mdi(hw, IXGBE_MDIO_PMA_PMD_SDA_SCL_DATA,  in ixgbe_read_i2c_phy_82598()
1007 		status = -EIO;  in ixgbe_read_i2c_phy_82598()
1011 	hw->mac.ops.release_swfw_sync(hw, gssr);  in ixgbe_read_i2c_phy_82598()
1016  *  ixgbe_read_i2c_eeprom_82598 - Reads 8 bit word over I2C interface.
1031  *  ixgbe_read_i2c_sff8472_82598 - Reads 8 bit word over I2C interface.
1036  *  Performs 8 byte read operation to SFP module's SFF-8472 data over I2C
1046  *  ixgbe_set_lan_id_multi_port_pcie_82598 - Set LAN id for PCIe multiple
1055 	struct ixgbe_bus_info *bus = &hw->bus;  in ixgbe_set_lan_id_multi_port_pcie_82598()
1062 	hw->eeprom.ops.read(hw, IXGBE_PCIE_GENERAL_PTR, &pci_gen);  in ixgbe_set_lan_id_multi_port_pcie_82598()
1065 		hw->eeprom.ops.read(hw, pci_gen + IXGBE_PCIE_CTRL2, &pci_ctrl2);  in ixgbe_set_lan_id_multi_port_pcie_82598()
1072 			bus->func = 0;  in ixgbe_set_lan_id_multi_port_pcie_82598()
1078  * ixgbe_set_rxpba_82598 - Initialize RX packet buffer
1100 		/* Setup the last four at 48KB...don't re-init i */  in ixgbe_set_rxpba_82598()
1191 	.mac			= ixgbe_mac_82598EB,