1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2018 Intel Corporation. */
17  * igb_get_hw_semaphore_i210 - Acquire hardware semaphore
25 	s32 timeout = hw->nvm.word_size + 1;  in igb_get_hw_semaphore_i210()
42 		if (hw->dev_spec._82575.clear_semaphore_once) {  in igb_get_hw_semaphore_i210()
43 			hw->dev_spec._82575.clear_semaphore_once = false;  in igb_get_hw_semaphore_i210()
56 			hw_dbg("Driver can't access device - SMBI bit is set.\n");  in igb_get_hw_semaphore_i210()
57 			return -E1000_ERR_NVM;  in igb_get_hw_semaphore_i210()
77 		return -E1000_ERR_NVM;  in igb_get_hw_semaphore_i210()
84  *  igb_acquire_nvm_i210 - Request for access to EEPROM
87  *  Acquire the necessary semaphores for exclusive access to the EEPROM.
88  *  Set the EEPROM access request bit and wait for EEPROM access grant bit.
90  *  EEPROM access and return -E1000_ERR_NVM (-1).
98  *  igb_release_nvm_i210 - Release exclusive access to EEPROM
101  *  Stop any current commands to the EEPROM and clear the EEPROM request bit,
110  *  igb_acquire_swfw_sync_i210 - Acquire SW/FW semaphore
127 			ret_val = -E1000_ERR_SWFW_SYNC;  in igb_acquire_swfw_sync_i210()
143 		ret_val = -E1000_ERR_SWFW_SYNC;  in igb_acquire_swfw_sync_i210()
156  *  igb_release_swfw_sync_i210 - Release SW/FW semaphore
178  *  igb_read_nvm_srrd_i210 - Reads Shadow Ram using EERD register
182  *  @data: word read from the Shadow Ram
188 				  u16 *data)  in igb_read_nvm_srrd_i210()  argument
198 		count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ?  in igb_read_nvm_srrd_i210()
199 			E1000_EERD_EEWR_MAX_COUNT : (words - i);  in igb_read_nvm_srrd_i210()
200 		if (!(hw->nvm.ops.acquire(hw))) {  in igb_read_nvm_srrd_i210()
202 						     data + i);  in igb_read_nvm_srrd_i210()
203 			hw->nvm.ops.release(hw);  in igb_read_nvm_srrd_i210()
216  *  igb_write_nvm_srwr - Write to Shadow Ram using EEWR
220  *  @data: 16 bit word(s) to be written to the Shadow Ram
222  *  Writes data to Shadow Ram at offset using EEWR register.
228 				u16 *data)  in igb_write_nvm_srwr()  argument
230 	struct e1000_nvm_info *nvm = &hw->nvm;  in igb_write_nvm_srwr()
238 	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||  in igb_write_nvm_srwr()
241 		ret_val = -E1000_ERR_NVM;  in igb_write_nvm_srwr()
247 			(data[i] << E1000_NVM_RW_REG_DATA) |  in igb_write_nvm_srwr()
272  *  igb_write_nvm_srwr_i210 - Write to Shadow RAM using EEWR
276  *  @data: 16 bit word(s) to be written to the Shadow RAM
278  *  Writes data to Shadow RAM at offset using EEWR register.
281  *  data will not be committed to FLASH and also Shadow RAM will most likely
284  *  If error code is returned, data and Shadow RAM may be inconsistent - buffer
288 				   u16 *data)  in igb_write_nvm_srwr_i210()  argument
298 		count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ?  in igb_write_nvm_srwr_i210()
299 			E1000_EERD_EEWR_MAX_COUNT : (words - i);  in igb_write_nvm_srwr_i210()
300 		if (!(hw->nvm.ops.acquire(hw))) {  in igb_write_nvm_srwr_i210()
302 						      data + i);  in igb_write_nvm_srwr_i210()
303 			hw->nvm.ops.release(hw);  in igb_write_nvm_srwr_i210()
316  *  igb_read_invm_word_i210 - Reads OTP
318  *  @address: the word address (aka eeprom offset) to read
319  *  @data: pointer to the data read
321  *  Reads 16-bit words from the OTP. Return error when the word is not
324 static s32 igb_read_invm_word_i210(struct e1000_hw *hw, u8 address, u16 *data)  in igb_read_invm_word_i210()  argument
326 	s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND;  in igb_read_invm_word_i210()
344 				*data = INVM_DWORD_TO_WORD_DATA(invm_dword);  in igb_read_invm_word_i210()
346 					  address, *data);  in igb_read_invm_word_i210()
358  * igb_read_invm_i210 - Read invm wrapper function for I210/I211
362  *  @data: pointer to the data read
364  *  Wrapper function to return data formerly found in the NVM.
367 				u16 __always_unused words, u16 *data)  in igb_read_invm_i210()  argument
374 		ret_val = igb_read_invm_word_i210(hw, (u8)offset, &data[0]);  in igb_read_invm_i210()
376 						     &data[1]);  in igb_read_invm_i210()
378 						     &data[2]);  in igb_read_invm_i210()
383 		ret_val = igb_read_invm_word_i210(hw, (u8)offset, data);  in igb_read_invm_i210()
385 			*data = NVM_INIT_CTRL_2_DEFAULT_I211;  in igb_read_invm_i210()
390 		ret_val = igb_read_invm_word_i210(hw, (u8)offset, data);  in igb_read_invm_i210()
392 			*data = NVM_INIT_CTRL_4_DEFAULT_I211;  in igb_read_invm_i210()
397 		ret_val = igb_read_invm_word_i210(hw, (u8)offset, data);  in igb_read_invm_i210()
399 			*data = NVM_LED_1_CFG_DEFAULT_I211;  in igb_read_invm_i210()
404 		ret_val = igb_read_invm_word_i210(hw, (u8)offset, data);  in igb_read_invm_i210()
406 			*data = NVM_LED_0_2_CFG_DEFAULT_I211;  in igb_read_invm_i210()
411 		ret_val = igb_read_invm_word_i210(hw, (u8)offset, data);  in igb_read_invm_i210()
413 			*data = ID_LED_RESERVED_FFFF;  in igb_read_invm_i210()
418 		*data = hw->subsystem_device_id;  in igb_read_invm_i210()
421 		*data = hw->subsystem_vendor_id;  in igb_read_invm_i210()
424 		*data = hw->device_id;  in igb_read_invm_i210()
427 		*data = hw->vendor_id;  in igb_read_invm_i210()
431 		*data = NVM_RESERVED_WORD;  in igb_read_invm_i210()
438  *  igb_read_invm_version - Reads iNVM version and image type
450 	u32 invm_blocks = E1000_INVM_SIZE - (E1000_INVM_ULT_BYTES_SIZE /  in igb_read_invm_version()
453 	s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND;  in igb_read_invm_version()
464 		record = &buffer[invm_blocks - i];  in igb_read_invm_version()
465 		next_record = &buffer[invm_blocks - i + 1];  in igb_read_invm_version()
503 		invm_ver->invm_major = FIELD_GET(E1000_INVM_MAJOR_MASK,  in igb_read_invm_version()
505 		invm_ver->invm_minor = version & E1000_INVM_MINOR_MASK;  in igb_read_invm_version()
509 		record = &buffer[invm_blocks - i];  in igb_read_invm_version()
510 		next_record = &buffer[invm_blocks - i + 1];  in igb_read_invm_version()
514 			invm_ver->invm_img_type = 0;  in igb_read_invm_version()
522 			invm_ver->invm_img_type =  in igb_read_invm_version()
533  *  igb_validate_nvm_checksum_i210 - Validate EEPROM checksum
536  *  Calculates the EEPROM checksum by reading/adding each word of the EEPROM
537  *  and then verifies that the sum of the EEPROM is equal to 0xBABA.
544 	if (!(hw->nvm.ops.acquire(hw))) {  in igb_validate_nvm_checksum_i210()
550 		read_op_ptr = hw->nvm.ops.read;  in igb_validate_nvm_checksum_i210()
551 		hw->nvm.ops.read = igb_read_nvm_eerd;  in igb_validate_nvm_checksum_i210()
556 		hw->nvm.ops.read = read_op_ptr;  in igb_validate_nvm_checksum_i210()
558 		hw->nvm.ops.release(hw);  in igb_validate_nvm_checksum_i210()
567  *  igb_update_nvm_checksum_i210 - Update EEPROM checksum
570  *  Updates the EEPROM checksum by reading/adding each word of the EEPROM
571  *  up to the checksum.  Then calculates the EEPROM checksum and writes the
572  *  value to the EEPROM. Next commit EEPROM data onto the Flash.
580 	/* Read the first word from the EEPROM. If this times out or fails, do  in igb_update_nvm_checksum_i210()
582 	 * EEPROM read fails  in igb_update_nvm_checksum_i210()
586 		hw_dbg("EEPROM read failed\n");  in igb_update_nvm_checksum_i210()
590 	if (!(hw->nvm.ops.acquire(hw))) {  in igb_update_nvm_checksum_i210()
591 		/* Do not use hw->nvm.ops.write, hw->nvm.ops.read  in igb_update_nvm_checksum_i210()
599 				hw->nvm.ops.release(hw);  in igb_update_nvm_checksum_i210()
605 		checksum = (u16) NVM_SUM - checksum;  in igb_update_nvm_checksum_i210()
609 			hw->nvm.ops.release(hw);  in igb_update_nvm_checksum_i210()
614 		hw->nvm.ops.release(hw);  in igb_update_nvm_checksum_i210()
618 		ret_val = -E1000_ERR_SWFW_SYNC;  in igb_update_nvm_checksum_i210()
625  *  igb_pool_flash_update_done_i210 - Pool FLUDONE status.
631 	s32 ret_val = -E1000_ERR_NVM;  in igb_pool_flash_update_done_i210()
647  *  igb_get_flash_presence_i210 - Check if flash device is detected.
664  *  igb_update_flash_i210 - Commit EEPROM to the flash
674 	if (ret_val == -E1000_ERR_NVM) {  in igb_update_flash_i210()
693  *  igb_valid_led_default_i210 - Verify a valid default LED config
695  *  @data: pointer to the NVM (EEPROM)
697  *  Read the EEPROM for the current default LED configuration.  If the
700 s32 igb_valid_led_default_i210(struct e1000_hw *hw, u16 *data)  in igb_valid_led_default_i210()  argument
704 	ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);  in igb_valid_led_default_i210()
710 	if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF) {  in igb_valid_led_default_i210()
711 		switch (hw->phy.media_type) {  in igb_valid_led_default_i210()
713 			*data = ID_LED_DEFAULT_I210_SERDES;  in igb_valid_led_default_i210()
717 			*data = ID_LED_DEFAULT_I210;  in igb_valid_led_default_i210()
726  *  __igb_access_xmdio_reg - Read/write XMDIO register
730  *  @data: pointer to value to read/write from/to the XMDIO address
734 				  u8 dev_addr, u16 *data, bool read)  in __igb_access_xmdio_reg()  argument
738 	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr);  in __igb_access_xmdio_reg()
742 	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, address);  in __igb_access_xmdio_reg()
746 	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, E1000_MMDAC_FUNC_DATA |  in __igb_access_xmdio_reg()
752 		ret_val = hw->phy.ops.read_reg(hw, E1000_MMDAAD, data);  in __igb_access_xmdio_reg()
754 		ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, *data);  in __igb_access_xmdio_reg()
759 	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, 0);  in __igb_access_xmdio_reg()
767  *  igb_read_xmdio_reg - Read XMDIO register
771  *  @data: value to be read from the EMI address
773 s32 igb_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data)  in igb_read_xmdio_reg()  argument
775 	return __igb_access_xmdio_reg(hw, addr, dev_addr, data, true);  in igb_read_xmdio_reg()
779  *  igb_write_xmdio_reg - Write XMDIO register
783  *  @data: value to be written to the XMDIO address
785 s32 igb_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data)  in igb_write_xmdio_reg()  argument
787 	return __igb_access_xmdio_reg(hw, addr, dev_addr, &data, false);  in igb_write_xmdio_reg()
791  *  igb_init_nvm_params_i210 - Init NVM func ptrs.
796 	struct e1000_nvm_info *nvm = &hw->nvm;  in igb_init_nvm_params_i210()
798 	nvm->ops.acquire = igb_acquire_nvm_i210;  in igb_init_nvm_params_i210()
799 	nvm->ops.release = igb_release_nvm_i210;  in igb_init_nvm_params_i210()
800 	nvm->ops.valid_led_default = igb_valid_led_default_i210;  in igb_init_nvm_params_i210()
804 		hw->nvm.type = e1000_nvm_flash_hw;  in igb_init_nvm_params_i210()
805 		nvm->ops.read    = igb_read_nvm_srrd_i210;  in igb_init_nvm_params_i210()
806 		nvm->ops.write   = igb_write_nvm_srwr_i210;  in igb_init_nvm_params_i210()
807 		nvm->ops.validate = igb_validate_nvm_checksum_i210;  in igb_init_nvm_params_i210()
808 		nvm->ops.update   = igb_update_nvm_checksum_i210;  in igb_init_nvm_params_i210()
810 		hw->nvm.type = e1000_nvm_invm;  in igb_init_nvm_params_i210()
811 		nvm->ops.read     = igb_read_invm_i210;  in igb_init_nvm_params_i210()
812 		nvm->ops.write    = NULL;  in igb_init_nvm_params_i210()
813 		nvm->ops.validate = NULL;  in igb_init_nvm_params_i210()
814 		nvm->ops.update   = NULL;  in igb_init_nvm_params_i210()
839 	/* Get data from NVM, or set default */  in igb_pll_workaround_i210()
855 			ret_val = -E1000_ERR_PHY;  in igb_pll_workaround_i210()
888  *  igb_get_cfg_done_i210 - Read config done bit
892  *  completion status.  NOTE: silicon which is EEPROM-less will fail trying
894  *  0.  If we were to return with error, EEPROM-less silicon
906 		timeout--;  in igb_get_cfg_done_i210()