Lines Matching +full:ptp +full:- +full:timer
1 // SPDX-License-Identifier: GPL-2.0
20 { TIME_SYNC, { 4, -1 }, { 0, 0 }},
21 { ONE_PPS, { -1, 5 }, { 0, 11 }},
30 { TIME_SYNC, { 4, -1 }, { 11, 0 }},
31 { ONE_PPS, { -1, 5 }, { 0, 9 }},
40 { ONE_PPS, { -1, 5 }, { 0, 1 }},
53 { GNSS, { 1, -1 }, { 0, 0 }},
55 { UFL1, { -1, 0 }, { 0, 1 }},
57 { UFL2, { 3, -1 }, { 0, 0 }},
62 return !pf->adapter ? NULL : pf->adapter->ctrl_pf; in ice_get_ctrl_pf()
69 return !ctrl_pf ? NULL : &ctrl_pf->ptp; in ice_get_ctrl_ptp()
73 * ice_ptp_find_pin_idx - Find pin index in ptp_pin_desc
78 * Return: positive pin number when pin is present, -1 otherwise
83 const struct ptp_clock_info *info = &pf->ptp.info; in ice_ptp_find_pin_idx()
86 for (i = 0; i < info->n_pins; i++) { in ice_ptp_find_pin_idx()
87 if (info->pin_config[i].func == func && in ice_ptp_find_pin_idx()
88 info->pin_config[i].chan == chan) in ice_ptp_find_pin_idx()
92 return -1; in ice_ptp_find_pin_idx()
96 * ice_ptp_update_sma_data - update SMA pins data according to pins setup
110 if (!sma_pins[UFL1 - 1]) { in ice_ptp_update_sma_data()
111 if (sma_pins[SMA1 - 1] == PTP_PF_EXTTS) { in ice_ptp_update_sma_data()
114 } else if (sma_pins[SMA1 - 1] == PTP_PF_PEROUT) { in ice_ptp_update_sma_data()
126 if (!sma_pins[UFL2 - 1]) { in ice_ptp_update_sma_data()
127 if (sma_pins[SMA2 - 1] == PTP_PF_EXTTS) { in ice_ptp_update_sma_data()
130 } else if (sma_pins[SMA2 - 1] == PTP_PF_PEROUT) { in ice_ptp_update_sma_data()
138 if (!sma_pins[SMA2 - 1]) { in ice_ptp_update_sma_data()
151 * ice_ptp_set_sma_cfg - set the configuration of the SMA control logic
158 const struct ice_ptp_pin_desc *ice_pins = pf->ptp.ice_pin_desc; in ice_ptp_set_sma_cfg()
159 struct ptp_pin_desc *pins = pf->ptp.pin_desc; in ice_ptp_set_sma_cfg()
165 err = ice_read_sma_ctrl(&pf->hw, &data); in ice_ptp_set_sma_cfg()
170 for (int i = 0; i < pf->ptp.info.n_pins; i++) in ice_ptp_set_sma_cfg()
179 sma_pins[name_idx - 1] = pins[i].func; in ice_ptp_set_sma_cfg()
187 return ice_write_sma_ctrl(&pf->hw, data); in ice_ptp_set_sma_cfg()
191 * ice_ptp_cfg_tx_interrupt - Configure Tx timestamp interrupt for the device
199 struct ice_hw *hw = &pf->hw; in ice_ptp_cfg_tx_interrupt()
203 switch (pf->ptp.tx_interrupt_mode) { in ice_ptp_cfg_tx_interrupt()
206 wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x1f); in ice_ptp_cfg_tx_interrupt()
211 wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x0); in ice_ptp_cfg_tx_interrupt()
216 enable = pf->ptp.tstamp_config.tx_type == HWTSTAMP_TX_ON; in ice_ptp_cfg_tx_interrupt()
230 * ice_set_rx_tstamp - Enable or disable Rx timestamping
240 if (!vsi || !vsi->rx_rings) in ice_set_rx_tstamp()
245 if (!vsi->rx_rings[i]) in ice_set_rx_tstamp()
247 vsi->rx_rings[i]->ptp_rx = on; in ice_set_rx_tstamp()
252 * ice_ptp_disable_timestamp_mode - Disable current timestamp mode
261 struct ice_hw *hw = &pf->hw; in ice_ptp_disable_timestamp_mode()
272 * ice_ptp_restore_timestamp_mode - Restore timestamp configuration
280 struct ice_hw *hw = &pf->hw; in ice_ptp_restore_timestamp_mode()
285 enable_rx = pf->ptp.tstamp_config.rx_filter == HWTSTAMP_FILTER_ALL; in ice_ptp_restore_timestamp_mode()
296 * ice_ptp_read_src_clk_reg - Read the source clock register
304 struct ice_hw *hw = &pf->hw; in ice_ptp_read_src_clk_reg()
309 guard(spinlock)(&pf->adapter->ptp_gltsyn_time_lock); in ice_ptp_read_src_clk_reg()
335 * ice_ptp_extend_32b_ts - Convert a 32b nanoseconds timestamp to 64b
342 * 8 bits are sub-nanoseconds and generally discarded.
383 delta = (in_tstamp - phc_time_lo); in ice_ptp_extend_32b_ts()
392 delta = (phc_time_lo - in_tstamp); in ice_ptp_extend_32b_ts()
393 ns = cached_phc_time - delta; in ice_ptp_extend_32b_ts()
402 * ice_ptp_extend_40b_ts - Convert a 40b timestamp to 64b nanoseconds
407 * nanoseconds, 7 bits of sub-nanoseconds, and a valid bit.
409 * *--------------------------------------------------------------*
411 * *--------------------------------------------------------------*
414 * 7 bits are a capture of the upper 7 bits of the sub-nanosecond underflow,
415 * and the remaining 32 bits are the lower 32 bits of the PHC timer.
421 * time stored in the device private PTP structure as the basis for timestamp
433 discard_time = pf->ptp.cached_phc_jiffies + msecs_to_jiffies(2000); in ice_ptp_extend_40b_ts()
435 pf->ptp.tx_hwtstamp_discarded++; in ice_ptp_extend_40b_ts()
439 return ice_ptp_extend_32b_ts(pf->ptp.cached_phc_time, in ice_ptp_extend_40b_ts()
444 * ice_ptp_is_tx_tracker_up - Check if Tx tracker is ready for new timestamps
445 * @tx: the PTP Tx timestamp tracker to check
447 * Check that a given PTP Tx timestamp tracker is up, i.e. that it is ready
450 * Assumes the tx->lock spinlock is already held.
455 lockdep_assert_held(&tx->lock); in ice_ptp_is_tx_tracker_up()
457 return tx->init && !tx->calibrating; in ice_ptp_is_tx_tracker_up()
461 * ice_ptp_req_tx_single_tstamp - Request Tx timestamp for a port from FW
462 * @tx: the PTP Tx timestamp tracker
473 if (!tx->init) in ice_ptp_req_tx_single_tstamp()
478 params = &pf->hw.ptp.phy.e810; in ice_ptp_req_tx_single_tstamp()
481 if (time_is_before_jiffies(tx->tstamps[idx].start + 2 * HZ)) { in ice_ptp_req_tx_single_tstamp()
483 pf->ptp.tx_hwtstamp_timeouts++; in ice_ptp_req_tx_single_tstamp()
485 skb = tx->tstamps[idx].skb; in ice_ptp_req_tx_single_tstamp()
486 tx->tstamps[idx].skb = NULL; in ice_ptp_req_tx_single_tstamp()
487 clear_bit(idx, tx->in_use); in ice_ptp_req_tx_single_tstamp()
493 ice_trace(tx_tstamp_fw_req, tx->tstamps[idx].skb, idx); in ice_ptp_req_tx_single_tstamp()
495 spin_lock_irqsave(¶ms->atqbal_wq.lock, flags); in ice_ptp_req_tx_single_tstamp()
497 params->atqbal_flags |= ATQBAL_FLAGS_INTR_IN_PROGRESS; in ice_ptp_req_tx_single_tstamp()
500 wr32(&pf->hw, REG_LL_PROXY_H, in ice_ptp_req_tx_single_tstamp()
503 tx->last_ll_ts_idx_read = idx; in ice_ptp_req_tx_single_tstamp()
505 spin_unlock_irqrestore(¶ms->atqbal_wq.lock, flags); in ice_ptp_req_tx_single_tstamp()
509 * ice_ptp_complete_tx_single_tstamp - Complete Tx timestamp for a port
510 * @tx: the PTP Tx timestamp tracker
515 u8 idx = tx->last_ll_ts_idx_read; in ice_ptp_complete_tx_single_tstamp()
526 if (!tx->init || tx->last_ll_ts_idx_read < 0) in ice_ptp_complete_tx_single_tstamp()
532 params = &pf->hw.ptp.phy.e810; in ice_ptp_complete_tx_single_tstamp()
534 ice_trace(tx_tstamp_fw_done, tx->tstamps[idx].skb, idx); in ice_ptp_complete_tx_single_tstamp()
536 spin_lock_irqsave(¶ms->atqbal_wq.lock, flags); in ice_ptp_complete_tx_single_tstamp()
538 if (!(params->atqbal_flags & ATQBAL_FLAGS_INTR_IN_PROGRESS)) in ice_ptp_complete_tx_single_tstamp()
543 raw_tstamp = rd32(&pf->hw, REG_LL_PROXY_L); in ice_ptp_complete_tx_single_tstamp()
545 reg_ll_high = rd32(&pf->hw, REG_LL_PROXY_H); in ice_ptp_complete_tx_single_tstamp()
548 params->atqbal_flags &= ~ATQBAL_FLAGS_INTR_IN_PROGRESS; in ice_ptp_complete_tx_single_tstamp()
550 wake_up_locked(¶ms->atqbal_wq); in ice_ptp_complete_tx_single_tstamp()
552 spin_unlock_irqrestore(¶ms->atqbal_wq.lock, flags); in ice_ptp_complete_tx_single_tstamp()
556 dev_err(ice_pf_to_dev(pf), "Failed to get the Tx tstamp - FW not ready"); in ice_ptp_complete_tx_single_tstamp()
566 if (raw_tstamp == tx->tstamps[idx].cached_tstamp) in ice_ptp_complete_tx_single_tstamp()
569 tx->tstamps[idx].cached_tstamp = raw_tstamp; in ice_ptp_complete_tx_single_tstamp()
570 clear_bit(idx, tx->in_use); in ice_ptp_complete_tx_single_tstamp()
571 skb = tx->tstamps[idx].skb; in ice_ptp_complete_tx_single_tstamp()
572 tx->tstamps[idx].skb = NULL; in ice_ptp_complete_tx_single_tstamp()
573 if (test_and_clear_bit(idx, tx->stale)) in ice_ptp_complete_tx_single_tstamp()
596 * ice_ptp_process_tx_tstamp - Process Tx timestamps for a port
597 * @tx: the PTP Tx timestamp tracker
620 * removed. A timestamp index will never be re-used until the in_use bit for
624 * right away but we will notice it at the end when we re-queue the task.
627 * interrupt for that timestamp should re-trigger this function once
630 * In cases where the PTP hardware clock was directly adjusted, some
656 hw = &pf->hw; in ice_ptp_process_tx_tstamp()
659 if (tx->has_ready_bitmap) { in ice_ptp_process_tx_tstamp()
660 err = ice_get_phy_tx_tstamp_ready(hw, tx->block, &tstamp_ready); in ice_ptp_process_tx_tstamp()
666 link_up = ptp_port->link_up; in ice_ptp_process_tx_tstamp()
668 for_each_set_bit(idx, tx->in_use, tx->len) { in ice_ptp_process_tx_tstamp()
670 u8 phy_idx = idx + tx->offset; in ice_ptp_process_tx_tstamp()
676 if (time_is_before_jiffies(tx->tstamps[idx].start + 2 * HZ)) { in ice_ptp_process_tx_tstamp()
680 pf->ptp.tx_hwtstamp_timeouts++; in ice_ptp_process_tx_tstamp()
691 if (tx->has_ready_bitmap && in ice_ptp_process_tx_tstamp()
699 ice_trace(tx_tstamp_fw_req, tx->tstamps[idx].skb, idx); in ice_ptp_process_tx_tstamp()
701 err = ice_read_phy_tstamp(hw, tx->block, phy_idx, &raw_tstamp); in ice_ptp_process_tx_tstamp()
705 ice_trace(tx_tstamp_fw_done, tx->tstamps[idx].skb, idx); in ice_ptp_process_tx_tstamp()
712 if (!drop_ts && !tx->has_ready_bitmap && in ice_ptp_process_tx_tstamp()
713 raw_tstamp == tx->tstamps[idx].cached_tstamp) in ice_ptp_process_tx_tstamp()
721 spin_lock_irqsave(&tx->lock, flags); in ice_ptp_process_tx_tstamp()
722 if (!tx->has_ready_bitmap && raw_tstamp) in ice_ptp_process_tx_tstamp()
723 tx->tstamps[idx].cached_tstamp = raw_tstamp; in ice_ptp_process_tx_tstamp()
724 clear_bit(idx, tx->in_use); in ice_ptp_process_tx_tstamp()
725 skb = tx->tstamps[idx].skb; in ice_ptp_process_tx_tstamp()
726 tx->tstamps[idx].skb = NULL; in ice_ptp_process_tx_tstamp()
727 if (test_and_clear_bit(idx, tx->stale)) in ice_ptp_process_tx_tstamp()
729 spin_unlock_irqrestore(&tx->lock, flags); in ice_ptp_process_tx_tstamp()
755 * ice_ptp_tx_tstamp_owner - Process Tx timestamps for all ports on the device
763 mutex_lock(&pf->adapter->ports.lock); in ice_ptp_tx_tstamp_owner()
764 list_for_each_entry(port, &pf->adapter->ports.ports, list_node) { in ice_ptp_tx_tstamp_owner()
765 struct ice_ptp_tx *tx = &port->tx; in ice_ptp_tx_tstamp_owner()
767 if (!tx || !tx->init) in ice_ptp_tx_tstamp_owner()
772 mutex_unlock(&pf->adapter->ports.lock); in ice_ptp_tx_tstamp_owner()
774 for (i = 0; i < ICE_GET_QUAD_NUM(pf->hw.ptp.num_lports); i++) { in ice_ptp_tx_tstamp_owner()
779 err = ice_get_phy_tx_tstamp_ready(&pf->hw, i, &tstamp_ready); in ice_ptp_tx_tstamp_owner()
790 * ice_ptp_tx_tstamp - Process Tx timestamps for this function.
801 if (!tx->init) in ice_ptp_tx_tstamp()
808 spin_lock_irqsave(&tx->lock, flags); in ice_ptp_tx_tstamp()
809 more_timestamps = tx->init && !bitmap_empty(tx->in_use, tx->len); in ice_ptp_tx_tstamp()
810 spin_unlock_irqrestore(&tx->lock, flags); in ice_ptp_tx_tstamp()
819 * ice_ptp_alloc_tx_tracker - Initialize tracking for Tx timestamps
831 tstamps = kcalloc(tx->len, sizeof(*tstamps), GFP_KERNEL); in ice_ptp_alloc_tx_tracker()
832 in_use = bitmap_zalloc(tx->len, GFP_KERNEL); in ice_ptp_alloc_tx_tracker()
833 stale = bitmap_zalloc(tx->len, GFP_KERNEL); in ice_ptp_alloc_tx_tracker()
840 return -ENOMEM; in ice_ptp_alloc_tx_tracker()
843 tx->tstamps = tstamps; in ice_ptp_alloc_tx_tracker()
844 tx->in_use = in_use; in ice_ptp_alloc_tx_tracker()
845 tx->stale = stale; in ice_ptp_alloc_tx_tracker()
846 tx->init = 1; in ice_ptp_alloc_tx_tracker()
847 tx->last_ll_ts_idx_read = -1; in ice_ptp_alloc_tx_tracker()
849 spin_lock_init(&tx->lock); in ice_ptp_alloc_tx_tracker()
855 * ice_ptp_flush_tx_tracker - Flush any remaining timestamps from the tracker
864 struct ice_hw *hw = &pf->hw; in ice_ptp_flush_tx_tracker()
870 err = ice_get_phy_tx_tstamp_ready(hw, tx->block, &tstamp_ready); in ice_ptp_flush_tx_tracker()
873 tx->block, err); in ice_ptp_flush_tx_tracker()
881 for_each_set_bit(idx, tx->in_use, tx->len) { in ice_ptp_flush_tx_tracker()
882 u8 phy_idx = idx + tx->offset; in ice_ptp_flush_tx_tracker()
886 if (!hw->reset_ongoing && (tstamp_ready & BIT_ULL(phy_idx))) in ice_ptp_flush_tx_tracker()
887 ice_clear_phy_tstamp(hw, tx->block, phy_idx); in ice_ptp_flush_tx_tracker()
889 spin_lock_irqsave(&tx->lock, flags); in ice_ptp_flush_tx_tracker()
890 skb = tx->tstamps[idx].skb; in ice_ptp_flush_tx_tracker()
891 tx->tstamps[idx].skb = NULL; in ice_ptp_flush_tx_tracker()
892 clear_bit(idx, tx->in_use); in ice_ptp_flush_tx_tracker()
893 clear_bit(idx, tx->stale); in ice_ptp_flush_tx_tracker()
894 spin_unlock_irqrestore(&tx->lock, flags); in ice_ptp_flush_tx_tracker()
897 pf->ptp.tx_hwtstamp_flushed++; in ice_ptp_flush_tx_tracker()
905 * ice_ptp_mark_tx_tracker_stale - Mark unfinished timestamps as stale
912 * This should be called when the PTP clock is modified such as after a set
920 spin_lock_irqsave(&tx->lock, flags); in ice_ptp_mark_tx_tracker_stale()
921 bitmap_or(tx->stale, tx->stale, tx->in_use, tx->len); in ice_ptp_mark_tx_tracker_stale()
922 spin_unlock_irqrestore(&tx->lock, flags); in ice_ptp_mark_tx_tracker_stale()
926 * ice_ptp_flush_all_tx_tracker - Flush all timestamp trackers on this clock
937 list_for_each_entry(port, &pf->adapter->ports.ports, list_node) in ice_ptp_flush_all_tx_tracker()
938 ice_ptp_flush_tx_tracker(ptp_port_to_pf(port), &port->tx); in ice_ptp_flush_all_tx_tracker()
942 * ice_ptp_release_tx_tracker - Release allocated memory for Tx tracker
953 spin_lock_irqsave(&tx->lock, flags); in ice_ptp_release_tx_tracker()
954 tx->init = 0; in ice_ptp_release_tx_tracker()
955 spin_unlock_irqrestore(&tx->lock, flags); in ice_ptp_release_tx_tracker()
958 synchronize_irq(pf->oicr_irq.virq); in ice_ptp_release_tx_tracker()
962 kfree(tx->tstamps); in ice_ptp_release_tx_tracker()
963 tx->tstamps = NULL; in ice_ptp_release_tx_tracker()
965 bitmap_free(tx->in_use); in ice_ptp_release_tx_tracker()
966 tx->in_use = NULL; in ice_ptp_release_tx_tracker()
968 bitmap_free(tx->stale); in ice_ptp_release_tx_tracker()
969 tx->stale = NULL; in ice_ptp_release_tx_tracker()
971 tx->len = 0; in ice_ptp_release_tx_tracker()
975 * ice_ptp_init_tx_eth56g - Initialize tracking for Tx timestamps
983 * Return: 0 for success, -ENOMEM when failed to allocate Tx tracker
988 tx->block = port; in ice_ptp_init_tx_eth56g()
989 tx->offset = 0; in ice_ptp_init_tx_eth56g()
990 tx->len = INDEX_PER_PORT_ETH56G; in ice_ptp_init_tx_eth56g()
991 tx->has_ready_bitmap = 1; in ice_ptp_init_tx_eth56g()
997 * ice_ptp_init_tx_e82x - Initialize tracking for Tx timestamps
1010 tx->block = ICE_GET_QUAD_NUM(port); in ice_ptp_init_tx_e82x()
1011 tx->offset = (port % ICE_PORTS_PER_QUAD) * INDEX_PER_PORT_E82X; in ice_ptp_init_tx_e82x()
1012 tx->len = INDEX_PER_PORT_E82X; in ice_ptp_init_tx_e82x()
1013 tx->has_ready_bitmap = 1; in ice_ptp_init_tx_e82x()
1019 * ice_ptp_init_tx_e810 - Initialize tracking for Tx timestamps
1029 tx->block = pf->hw.port_info->lport; in ice_ptp_init_tx_e810()
1030 tx->offset = 0; in ice_ptp_init_tx_e810()
1031 tx->len = INDEX_PER_PORT_E810; in ice_ptp_init_tx_e810()
1036 tx->has_ready_bitmap = 0; in ice_ptp_init_tx_e810()
1042 * ice_ptp_update_cached_phctime - Update the cached PHC time values
1051 * Note that the cached copy in the PF PTP structure is always updated, even
1055 * * 0 - OK, successfully updated
1056 * * -EAGAIN - PF was busy, need to reschedule the update
1065 update_before = pf->ptp.cached_phc_jiffies + msecs_to_jiffies(2000); in ice_ptp_update_cached_phctime()
1066 if (pf->ptp.cached_phc_time && in ice_ptp_update_cached_phctime()
1068 unsigned long time_taken = jiffies - pf->ptp.cached_phc_jiffies; in ice_ptp_update_cached_phctime()
1072 pf->ptp.late_cached_phc_updates++; in ice_ptp_update_cached_phctime()
1079 WRITE_ONCE(pf->ptp.cached_phc_time, systime); in ice_ptp_update_cached_phctime()
1080 WRITE_ONCE(pf->ptp.cached_phc_jiffies, jiffies); in ice_ptp_update_cached_phctime()
1082 if (test_and_set_bit(ICE_CFG_BUSY, pf->state)) in ice_ptp_update_cached_phctime()
1083 return -EAGAIN; in ice_ptp_update_cached_phctime()
1086 struct ice_vsi *vsi = pf->vsi[i]; in ice_ptp_update_cached_phctime()
1092 if (vsi->type != ICE_VSI_PF) in ice_ptp_update_cached_phctime()
1096 if (!vsi->rx_rings[j]) in ice_ptp_update_cached_phctime()
1098 WRITE_ONCE(vsi->rx_rings[j]->cached_phctime, systime); in ice_ptp_update_cached_phctime()
1101 clear_bit(ICE_CFG_BUSY, pf->state); in ice_ptp_update_cached_phctime()
1107 * ice_ptp_reset_cached_phctime - Reset cached PHC time after an update
1137 kthread_queue_delayed_work(pf->ptp.kworker, &pf->ptp.work, in ice_ptp_reset_cached_phctime()
1146 ice_ptp_mark_tx_tracker_stale(&pf->ptp.port.tx); in ice_ptp_reset_cached_phctime()
1150 * ice_ptp_write_init - Set PHC time to provided value
1159 struct ice_hw *hw = &pf->hw; in ice_ptp_write_init()
1165 * ice_ptp_write_adj - Adjust PHC clock time atomically
1174 struct ice_hw *hw = &pf->hw; in ice_ptp_write_adj()
1180 * ice_base_incval - Get base timer increment value
1183 * Look up the base timer increment value for this device. The base increment
1190 struct ice_hw *hw = &pf->hw; in ice_base_incval()
1195 dev_dbg(ice_pf_to_dev(pf), "PTP: using base increment value of 0x%016llx\n", in ice_base_incval()
1202 * ice_ptp_check_tx_fifo - Check whether Tx FIFO is in an OK state
1203 * @port: PTP port for which Tx FIFO is checked
1207 int offs = port->port_num % ICE_PORTS_PER_QUAD; in ice_ptp_check_tx_fifo()
1208 int quad = ICE_GET_QUAD_NUM(port->port_num); in ice_ptp_check_tx_fifo()
1215 hw = &pf->hw; in ice_ptp_check_tx_fifo()
1217 if (port->tx_fifo_busy_cnt == FIFO_OK) in ice_ptp_check_tx_fifo()
1229 dev_err(ice_pf_to_dev(pf), "PTP failed to check port %d Tx FIFO, err %d\n", in ice_ptp_check_tx_fifo()
1230 port->port_num, err); in ice_ptp_check_tx_fifo()
1240 port->tx_fifo_busy_cnt = FIFO_OK; in ice_ptp_check_tx_fifo()
1244 port->tx_fifo_busy_cnt++; in ice_ptp_check_tx_fifo()
1247 port->tx_fifo_busy_cnt, port->port_num); in ice_ptp_check_tx_fifo()
1249 if (port->tx_fifo_busy_cnt == ICE_PTP_FIFO_NUM_CHECKS) { in ice_ptp_check_tx_fifo()
1252 port->port_num, quad); in ice_ptp_check_tx_fifo()
1254 port->tx_fifo_busy_cnt = FIFO_OK; in ice_ptp_check_tx_fifo()
1258 return -EAGAIN; in ice_ptp_check_tx_fifo()
1262 * ice_ptp_wait_for_offsets - Check for valid Tx and Rx offsets
1286 hw = &pf->hw; in ice_ptp_wait_for_offsets()
1288 if (ice_is_reset_in_progress(pf->state)) { in ice_ptp_wait_for_offsets()
1290 kthread_queue_delayed_work(pf->ptp.kworker, in ice_ptp_wait_for_offsets()
1291 &port->ov_work, in ice_ptp_wait_for_offsets()
1298 tx_err = ice_phy_cfg_tx_offset_e82x(hw, port->port_num); in ice_ptp_wait_for_offsets()
1299 rx_err = ice_phy_cfg_rx_offset_e82x(hw, port->port_num); in ice_ptp_wait_for_offsets()
1302 kthread_queue_delayed_work(pf->ptp.kworker, in ice_ptp_wait_for_offsets()
1303 &port->ov_work, in ice_ptp_wait_for_offsets()
1310 * ice_ptp_port_phy_stop - Stop timestamping for a PHY port
1311 * @ptp_port: PTP port to stop
1317 u8 port = ptp_port->port_num; in ice_ptp_port_phy_stop()
1318 struct ice_hw *hw = &pf->hw; in ice_ptp_port_phy_stop()
1324 mutex_lock(&ptp_port->ps_lock); in ice_ptp_port_phy_stop()
1331 kthread_cancel_delayed_work_sync(&ptp_port->ov_work); in ice_ptp_port_phy_stop()
1336 err = -ENODEV; in ice_ptp_port_phy_stop()
1338 if (err && err != -EBUSY) in ice_ptp_port_phy_stop()
1339 dev_err(ice_pf_to_dev(pf), "PTP failed to set PHY port %d down, err %d\n", in ice_ptp_port_phy_stop()
1342 mutex_unlock(&ptp_port->ps_lock); in ice_ptp_port_phy_stop()
1348 * ice_ptp_port_phy_restart - (Re)start and calibrate PHY timestamping
1349 * @ptp_port: PTP port for which the PHY start is set
1359 u8 port = ptp_port->port_num; in ice_ptp_port_phy_restart()
1360 struct ice_hw *hw = &pf->hw; in ice_ptp_port_phy_restart()
1367 if (!ptp_port->link_up) in ice_ptp_port_phy_restart()
1370 mutex_lock(&ptp_port->ps_lock); in ice_ptp_port_phy_restart()
1377 /* Start the PHY timer in Vernier mode */ in ice_ptp_port_phy_restart()
1378 kthread_cancel_delayed_work_sync(&ptp_port->ov_work); in ice_ptp_port_phy_restart()
1383 spin_lock_irqsave(&ptp_port->tx.lock, flags); in ice_ptp_port_phy_restart()
1384 ptp_port->tx.calibrating = true; in ice_ptp_port_phy_restart()
1385 spin_unlock_irqrestore(&ptp_port->tx.lock, flags); in ice_ptp_port_phy_restart()
1386 ptp_port->tx_fifo_busy_cnt = 0; in ice_ptp_port_phy_restart()
1388 /* Start the PHY timer in Vernier mode */ in ice_ptp_port_phy_restart()
1394 spin_lock_irqsave(&ptp_port->tx.lock, flags); in ice_ptp_port_phy_restart()
1395 ptp_port->tx.calibrating = false; in ice_ptp_port_phy_restart()
1396 spin_unlock_irqrestore(&ptp_port->tx.lock, flags); in ice_ptp_port_phy_restart()
1398 kthread_queue_delayed_work(pf->ptp.kworker, &ptp_port->ov_work, in ice_ptp_port_phy_restart()
1402 err = -ENODEV; in ice_ptp_port_phy_restart()
1406 dev_err(ice_pf_to_dev(pf), "PTP failed to set PHY port %d up, err %d\n", in ice_ptp_port_phy_restart()
1409 mutex_unlock(&ptp_port->ps_lock); in ice_ptp_port_phy_restart()
1415 * ice_ptp_link_change - Reconfigure PTP after link status change
1422 struct ice_hw *hw = &pf->hw; in ice_ptp_link_change()
1424 if (pf->ptp.state != ICE_PTP_READY) in ice_ptp_link_change()
1427 ptp_port = &pf->ptp.port; in ice_ptp_link_change()
1430 ptp_port->link_up = linkup; in ice_ptp_link_change()
1433 if (pf->hw.reset_ongoing) in ice_ptp_link_change()
1449 * ice_ptp_cfg_phy_interrupt - Configure PHY interrupt settings
1458 * Return: 0 on success, -EOPNOTSUPP when PHY model incorrect, other error codes
1464 struct ice_hw *hw = &pf->hw; in ice_ptp_cfg_phy_interrupt()
1472 for (port = 0; port < hw->ptp.num_lports; port++) { in ice_ptp_cfg_phy_interrupt()
1488 for (quad = 0; quad < ICE_GET_QUAD_NUM(hw->ptp.num_lports); in ice_ptp_cfg_phy_interrupt()
1508 return -EOPNOTSUPP; in ice_ptp_cfg_phy_interrupt()
1513 * ice_ptp_reset_phy_timestamping - Reset PHY timestamping block
1518 ice_ptp_port_phy_restart(&pf->ptp.port); in ice_ptp_reset_phy_timestamping()
1522 * ice_ptp_restart_all_phy - Restart all PHYs to recalibrate timestamping
1529 list_for_each(entry, &pf->adapter->ports.ports) { in ice_ptp_restart_all_phy()
1534 if (port->link_up) in ice_ptp_restart_all_phy()
1540 * ice_ptp_adjfine - Adjust clock increment rate
1541 * @info: the driver's PTP info structure
1542 * @scaled_ppm: Parts per million with 16-bit fractional field
1550 struct ice_hw *hw = &pf->hw; in ice_ptp_adjfine()
1557 dev_err(ice_pf_to_dev(pf), "PTP failed to set incval, err %d\n", in ice_ptp_adjfine()
1559 return -EIO; in ice_ptp_adjfine()
1566 * ice_ptp_extts_event - Process PTP external clock event
1572 struct ice_hw *hw = &pf->hw; in ice_ptp_extts_event()
1576 /* Don't process timestamp events if PTP is not ready */ in ice_ptp_extts_event()
1577 if (pf->ptp.state != ICE_PTP_READY) in ice_ptp_extts_event()
1580 tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; in ice_ptp_extts_event()
1590 if (!(pf->ptp.ext_ts_irq & (1 << chan))) in ice_ptp_extts_event()
1602 desc = &pf->ptp.ice_pin_desc[pin_desc_idx]; in ice_ptp_extts_event()
1603 event.timestamp -= desc->delay[0]; in ice_ptp_extts_event()
1608 pf->ptp.ext_ts_irq &= ~(1 << chan); in ice_ptp_extts_event()
1609 ptp_clock_event(pf->ptp.clock, &event); in ice_ptp_extts_event()
1614 * ice_ptp_cfg_extts - Configure EXTTS pin and channel
1627 struct ice_hw *hw = &pf->hw; in ice_ptp_cfg_extts()
1634 if (rq->flags & ~(PTP_ENABLE_FEATURE | in ice_ptp_cfg_extts()
1638 return -EOPNOTSUPP; in ice_ptp_cfg_extts()
1640 tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; in ice_ptp_cfg_extts()
1641 chan = rq->index; in ice_ptp_cfg_extts()
1645 return -EIO; in ice_ptp_cfg_extts()
1647 gpio_pin = pf->ptp.ice_pin_desc[pin_desc_idx].gpio[0]; in ice_ptp_cfg_extts()
1659 if (rq->flags & PTP_FALLING_EDGE) in ice_ptp_cfg_extts()
1661 if (rq->flags & PTP_RISING_EDGE) in ice_ptp_cfg_extts()
1677 for (unsigned int i = 0; i < pf->ptp.info.n_ext_ts; i++) in ice_ptp_cfg_extts()
1678 if ((pf->ptp.extts_rqs[i].flags & in ice_ptp_cfg_extts()
1696 * ice_ptp_disable_all_extts - Disable all EXTTS channels
1701 for (unsigned int i = 0; i < pf->ptp.info.n_ext_ts ; i++) in ice_ptp_disable_all_extts()
1702 if (pf->ptp.extts_rqs[i].flags & PTP_ENABLE_FEATURE) in ice_ptp_disable_all_extts()
1703 ice_ptp_cfg_extts(pf, &pf->ptp.extts_rqs[i], in ice_ptp_disable_all_extts()
1706 synchronize_irq(pf->oicr_irq.virq); in ice_ptp_disable_all_extts()
1710 * ice_ptp_enable_all_extts - Enable all EXTTS channels
1717 for (unsigned int i = 0; i < pf->ptp.info.n_ext_ts ; i++) in ice_ptp_enable_all_extts()
1718 if (pf->ptp.extts_rqs[i].flags & PTP_ENABLE_FEATURE) in ice_ptp_enable_all_extts()
1719 ice_ptp_cfg_extts(pf, &pf->ptp.extts_rqs[i], in ice_ptp_enable_all_extts()
1724 * ice_ptp_write_perout - Write periodic wave parameters to HW
1737 u8 tmr_idx = hw->func_caps.ts_func_info.tmr_index_owned; in ice_ptp_write_perout()
1765 return -EIO; in ice_ptp_write_perout()
1792 * ice_ptp_cfg_perout - Configure clock to generate periodic wave
1807 struct ice_hw *hw = &pf->hw; in ice_ptp_cfg_perout()
1810 if (rq->flags & ~PTP_PEROUT_PHASE) in ice_ptp_cfg_perout()
1811 return -EOPNOTSUPP; in ice_ptp_cfg_perout()
1813 pin_desc_idx = ice_ptp_find_pin_idx(pf, PTP_PF_PEROUT, rq->index); in ice_ptp_cfg_perout()
1815 return -EIO; in ice_ptp_cfg_perout()
1817 gpio_pin = pf->ptp.ice_pin_desc[pin_desc_idx].gpio[1]; in ice_ptp_cfg_perout()
1818 prop_delay_ns = pf->ptp.ice_pin_desc[pin_desc_idx].delay[1]; in ice_ptp_cfg_perout()
1819 period = rq->period.sec * NSEC_PER_SEC + rq->period.nsec; in ice_ptp_cfg_perout()
1825 return ice_ptp_write_perout(hw, rq->index, gpio_pin, 0, 0); in ice_ptp_cfg_perout()
1827 if (strncmp(pf->ptp.pin_desc[pin_desc_idx].name, "1PPS", 64) == 0 && in ice_ptp_cfg_perout()
1828 period != NSEC_PER_SEC && hw->ptp.phy_model == ICE_PHY_E82X) { in ice_ptp_cfg_perout()
1830 return -EOPNOTSUPP; in ice_ptp_cfg_perout()
1835 return -EIO; in ice_ptp_cfg_perout()
1838 start = rq->start.sec * NSEC_PER_SEC + rq->start.nsec; in ice_ptp_cfg_perout()
1841 if (rq->flags & PTP_PEROUT_PHASE) in ice_ptp_cfg_perout()
1846 /* If we have only phase or start time is in the past, start the timer in ice_ptp_cfg_perout()
1851 if (rq->flags & PTP_PEROUT_PHASE || start <= clk - prop_delay_ns) in ice_ptp_cfg_perout()
1852 start = div64_u64(clk + period - 1, period) * period + phase; in ice_ptp_cfg_perout()
1855 start -= prop_delay_ns; in ice_ptp_cfg_perout()
1857 return ice_ptp_write_perout(hw, rq->index, gpio_pin, start, period); in ice_ptp_cfg_perout()
1861 * ice_ptp_disable_all_perout - Disable all currently configured outputs
1865 * certain changes to the PTP hardware clock. Use ice_ptp_enable_all_perout to
1866 * re-enable the clocks again.
1870 for (unsigned int i = 0; i < pf->ptp.info.n_per_out; i++) in ice_ptp_disable_all_perout()
1871 if (pf->ptp.perout_rqs[i].period.sec || in ice_ptp_disable_all_perout()
1872 pf->ptp.perout_rqs[i].period.nsec) in ice_ptp_disable_all_perout()
1873 ice_ptp_cfg_perout(pf, &pf->ptp.perout_rqs[i], in ice_ptp_disable_all_perout()
1878 * ice_ptp_enable_all_perout - Enable all configured periodic clock outputs
1887 for (unsigned int i = 0; i < pf->ptp.info.n_per_out; i++) in ice_ptp_enable_all_perout()
1888 if (pf->ptp.perout_rqs[i].period.sec || in ice_ptp_enable_all_perout()
1889 pf->ptp.perout_rqs[i].period.nsec) in ice_ptp_enable_all_perout()
1890 ice_ptp_cfg_perout(pf, &pf->ptp.perout_rqs[i], in ice_ptp_enable_all_perout()
1895 * ice_ptp_disable_shared_pin - Disable enabled pin that shares GPIO
1909 gpio_pin = pf->ptp.ice_pin_desc[pin].gpio[1]; in ice_ptp_disable_shared_pin()
1912 gpio_pin = pf->ptp.ice_pin_desc[pin].gpio[0]; in ice_ptp_disable_shared_pin()
1915 return -EOPNOTSUPP; in ice_ptp_disable_shared_pin()
1918 for (unsigned int i = 0; i < pf->ptp.info.n_pins; i++) { in ice_ptp_disable_shared_pin()
1919 struct ptp_pin_desc *pin_desc = &pf->ptp.pin_desc[i]; in ice_ptp_disable_shared_pin()
1920 unsigned int chan = pin_desc->chan; in ice_ptp_disable_shared_pin()
1926 if (pin_desc->func == PTP_PF_PEROUT && in ice_ptp_disable_shared_pin()
1927 pf->ptp.ice_pin_desc[i].gpio[1] == gpio_pin) { in ice_ptp_disable_shared_pin()
1928 pf->ptp.perout_rqs[chan].period.sec = 0; in ice_ptp_disable_shared_pin()
1929 pf->ptp.perout_rqs[chan].period.nsec = 0; in ice_ptp_disable_shared_pin()
1930 pin_desc->func = PTP_PF_NONE; in ice_ptp_disable_shared_pin()
1931 pin_desc->chan = 0; in ice_ptp_disable_shared_pin()
1934 return ice_ptp_cfg_perout(pf, &pf->ptp.perout_rqs[chan], in ice_ptp_disable_shared_pin()
1936 } else if (pf->ptp.pin_desc->func == PTP_PF_EXTTS && in ice_ptp_disable_shared_pin()
1937 pf->ptp.ice_pin_desc[i].gpio[0] == gpio_pin) { in ice_ptp_disable_shared_pin()
1938 pf->ptp.extts_rqs[chan].flags &= ~PTP_ENABLE_FEATURE; in ice_ptp_disable_shared_pin()
1939 pin_desc->func = PTP_PF_NONE; in ice_ptp_disable_shared_pin()
1940 pin_desc->chan = 0; in ice_ptp_disable_shared_pin()
1943 return ice_ptp_cfg_extts(pf, &pf->ptp.extts_rqs[chan], in ice_ptp_disable_shared_pin()
1952 * ice_verify_pin - verify if pin supports requested pin function
1953 * @info: the driver's PTP info structure
1958 * Return: 0 on success, -EOPNOTSUPP when function is not supported.
1966 pin_desc = &pf->ptp.ice_pin_desc[pin]; in ice_verify_pin()
1971 if (pin_desc->gpio[0] < 0) in ice_verify_pin()
1972 return -EOPNOTSUPP; in ice_verify_pin()
1975 if (pin_desc->gpio[1] < 0) in ice_verify_pin()
1976 return -EOPNOTSUPP; in ice_verify_pin()
1982 return -EOPNOTSUPP; in ice_verify_pin()
1988 pf->ptp.pin_desc[pin].func = func; in ice_verify_pin()
1989 pf->ptp.pin_desc[pin].chan = chan; in ice_verify_pin()
1997 * ice_ptp_gpio_enable - Enable/disable ancillary features of PHC
1998 * @info: The driver's PTP info structure
2010 switch (rq->type) { in ice_ptp_gpio_enable()
2014 &pf->ptp.perout_rqs[rq->perout.index]; in ice_ptp_gpio_enable()
2016 err = ice_ptp_cfg_perout(pf, &rq->perout, on); in ice_ptp_gpio_enable()
2018 *cached = rq->perout; in ice_ptp_gpio_enable()
2020 cached->period.sec = 0; in ice_ptp_gpio_enable()
2021 cached->period.nsec = 0; in ice_ptp_gpio_enable()
2028 &pf->ptp.extts_rqs[rq->extts.index]; in ice_ptp_gpio_enable()
2030 err = ice_ptp_cfg_extts(pf, &rq->extts, on); in ice_ptp_gpio_enable()
2032 *cached = rq->extts; in ice_ptp_gpio_enable()
2034 cached->flags &= ~PTP_ENABLE_FEATURE; in ice_ptp_gpio_enable()
2038 return -EOPNOTSUPP; in ice_ptp_gpio_enable()
2043 * ice_ptp_gettimex64 - Get the time of the clock
2044 * @info: the driver's PTP info structure
2065 * ice_ptp_settime64 - Set the time of the clock
2066 * @info: the driver's PTP info structure
2077 struct ice_hw *hw = &pf->hw; in ice_ptp_settime64()
2090 err = -EBUSY; in ice_ptp_settime64()
2106 /* Recalibrate and re-enable timestamp blocks for E822/E823 */ in ice_ptp_settime64()
2111 dev_err(ice_pf_to_dev(pf), "PTP failed to set time %d\n", err); in ice_ptp_settime64()
2119 * ice_ptp_adjtime_nonatomic - Do a non-atomic clock adjustment
2120 * @info: the driver's PTP info structure
2138 * ice_ptp_adjtime - Adjust the time of the clock by the indicated delta
2139 * @info: the driver's PTP info structure
2145 struct ice_hw *hw = &pf->hw; in ice_ptp_adjtime()
2151 /* Hardware only supports atomic adjustments using signed 32-bit in ice_ptp_adjtime()
2153 * a non-atomic get->adjust->set flow. in ice_ptp_adjtime()
2156 dev_dbg(dev, "delta = %lld, adjtime non-atomic\n", delta); in ice_ptp_adjtime()
2161 dev_err(dev, "PTP failed to acquire semaphore in adjtime\n"); in ice_ptp_adjtime()
2162 return -EBUSY; in ice_ptp_adjtime()
2176 dev_err(dev, "PTP failed to adjust time, err %d\n", err); in ice_ptp_adjtime()
2187 * ice_ptp_get_syncdevicetime - Get the cross time stamp info
2201 struct ice_hw *hw = &pf->hw; in ice_ptp_get_syncdevicetime()
2210 hh_lock = rd32(hw, PFHH_SEM + (PFTSYN_SEM_BYTES * hw->pf_id)); in ice_ptp_get_syncdevicetime()
2218 dev_err(ice_pf_to_dev(pf), "PTP failed to get hh lock\n"); in ice_ptp_get_syncdevicetime()
2219 return -EBUSY; in ice_ptp_get_syncdevicetime()
2222 /* Program cmd to master timer */ in ice_ptp_get_syncdevicetime()
2240 tmr_idx = hw->func_caps.ts_func_info.tmr_index_assoc; in ice_ptp_get_syncdevicetime()
2245 system->cycles = hh_ts; in ice_ptp_get_syncdevicetime()
2246 system->cs_id = CSID_X86_ART; in ice_ptp_get_syncdevicetime()
2256 /* Clear the master timer */ in ice_ptp_get_syncdevicetime()
2260 hh_lock = rd32(hw, PFHH_SEM + (PFTSYN_SEM_BYTES * hw->pf_id)); in ice_ptp_get_syncdevicetime()
2262 wr32(hw, PFHH_SEM + (PFTSYN_SEM_BYTES * hw->pf_id), hh_lock); in ice_ptp_get_syncdevicetime()
2265 return -ETIMEDOUT; in ice_ptp_get_syncdevicetime()
2271 * ice_ptp_getcrosststamp_e82x - Capture a device cross timestamp
2272 * @info: the driver's PTP info structure
2275 * Capture a cross timestamp between the ART and the device PTP hardware
2297 * ice_ptp_get_ts_config - ioctl interface to read the timestamping config
2307 if (pf->ptp.state != ICE_PTP_READY) in ice_ptp_get_ts_config()
2308 return -EIO; in ice_ptp_get_ts_config()
2310 config = &pf->ptp.tstamp_config; in ice_ptp_get_ts_config()
2312 return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ? in ice_ptp_get_ts_config()
2313 -EFAULT : 0; in ice_ptp_get_ts_config()
2317 * ice_ptp_set_timestamp_mode - Setup driver for requested timestamp mode
2324 switch (config->tx_type) { in ice_ptp_set_timestamp_mode()
2326 pf->ptp.tstamp_config.tx_type = HWTSTAMP_TX_OFF; in ice_ptp_set_timestamp_mode()
2329 pf->ptp.tstamp_config.tx_type = HWTSTAMP_TX_ON; in ice_ptp_set_timestamp_mode()
2332 return -ERANGE; in ice_ptp_set_timestamp_mode()
2335 switch (config->rx_filter) { in ice_ptp_set_timestamp_mode()
2337 pf->ptp.tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE; in ice_ptp_set_timestamp_mode()
2353 pf->ptp.tstamp_config.rx_filter = HWTSTAMP_FILTER_ALL; in ice_ptp_set_timestamp_mode()
2356 return -ERANGE; in ice_ptp_set_timestamp_mode()
2366 * ice_ptp_set_ts_config - ioctl interface to control the timestamping
2377 if (pf->ptp.state != ICE_PTP_READY) in ice_ptp_set_ts_config()
2378 return -EAGAIN; in ice_ptp_set_ts_config()
2380 if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) in ice_ptp_set_ts_config()
2381 return -EFAULT; in ice_ptp_set_ts_config()
2388 config = pf->ptp.tstamp_config; in ice_ptp_set_ts_config()
2390 return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ? in ice_ptp_set_ts_config()
2391 -EFAULT : 0; in ice_ptp_set_ts_config()
2395 * ice_ptp_get_rx_hwts - Get packet Rx timestamp in ns
2407 if (!(rx_desc->wb.time_stamp_low & ICE_PTP_TS_VALID)) in ice_ptp_get_rx_hwts()
2410 cached_time = READ_ONCE(pkt_ctx->cached_phctime); in ice_ptp_get_rx_hwts()
2416 /* Use ice_ptp_extend_32b_ts directly, using the ring-specific cached in ice_ptp_get_rx_hwts()
2422 ts_high = le32_to_cpu(rx_desc->wb.flex_ts.ts_high); in ice_ptp_get_rx_hwts()
2429 * ice_ptp_setup_pin_cfg - setup PTP pin_config structure
2434 for (unsigned int i = 0; i < pf->ptp.info.n_pins; i++) { in ice_ptp_setup_pin_cfg()
2435 const struct ice_ptp_pin_desc *desc = &pf->ptp.ice_pin_desc[i]; in ice_ptp_setup_pin_cfg()
2436 struct ptp_pin_desc *pin = &pf->ptp.pin_desc[i]; in ice_ptp_setup_pin_cfg()
2440 name = ice_pin_names[desc->name_idx]; in ice_ptp_setup_pin_cfg()
2441 else if (desc->name_idx != GPIO_NA) in ice_ptp_setup_pin_cfg()
2442 name = ice_pin_names_nvm[desc->name_idx]; in ice_ptp_setup_pin_cfg()
2444 strscpy(pin->name, name, sizeof(pin->name)); in ice_ptp_setup_pin_cfg()
2446 pin->index = i; in ice_ptp_setup_pin_cfg()
2449 pf->ptp.info.pin_config = pf->ptp.pin_desc; in ice_ptp_setup_pin_cfg()
2453 * ice_ptp_disable_pins - Disable PTP pins
2461 struct ptp_clock_info *info = &pf->ptp.info; in ice_ptp_disable_pins()
2463 dev_warn(ice_pf_to_dev(pf), "Failed to configure PTP pin control\n"); in ice_ptp_disable_pins()
2465 info->enable = NULL; in ice_ptp_disable_pins()
2466 info->verify = NULL; in ice_ptp_disable_pins()
2467 info->n_pins = 0; in ice_ptp_disable_pins()
2468 info->n_ext_ts = 0; in ice_ptp_disable_pins()
2469 info->n_per_out = 0; in ice_ptp_disable_pins()
2473 * ice_ptp_parse_sdp_entries - update ice_ptp_pin_desc structure from NVM
2477 * @pins: PTP pins array to update
2490 pins[i].name_idx = -1; in ice_ptp_parse_sdp_entries()
2491 pins[i].gpio[0] = -1; in ice_ptp_parse_sdp_entries()
2492 pins[i].gpio[1] = -1; in ice_ptp_parse_sdp_entries()
2523 strscpy(pf->ptp.pin_desc[idx].name, in ice_ptp_parse_sdp_entries()
2525 sizeof(pf->ptp.pin_desc[idx] in ice_ptp_parse_sdp_entries()
2540 pf->ptp.info.n_pins = n_pins; in ice_ptp_parse_sdp_entries()
2545 * ice_ptp_set_funcs_e82x - Set specialized functions for E82X support
2548 * Assign functions to the PTP capabilities structure for E82X devices.
2558 pf->ptp.info.getcrosststamp = ice_ptp_getcrosststamp_e82x; in ice_ptp_set_funcs_e82x()
2561 if (ice_is_e825c(&pf->hw)) { in ice_ptp_set_funcs_e82x()
2562 pf->ptp.ice_pin_desc = ice_pin_desc_e825c; in ice_ptp_set_funcs_e82x()
2563 pf->ptp.info.n_pins = ICE_PIN_DESC_ARR_LEN(ice_pin_desc_e825c); in ice_ptp_set_funcs_e82x()
2565 pf->ptp.ice_pin_desc = ice_pin_desc_e82x; in ice_ptp_set_funcs_e82x()
2566 pf->ptp.info.n_pins = ICE_PIN_DESC_ARR_LEN(ice_pin_desc_e82x); in ice_ptp_set_funcs_e82x()
2572 * ice_ptp_set_funcs_e810 - Set specialized functions for E810 support
2575 * Assign functions to the PTP capabiltiies structure for E810 devices.
2584 struct ice_ptp *ptp = &pf->ptp; in ice_ptp_set_funcs_e810() local
2588 err = ice_ptp_read_sdp_ac(&pf->hw, entries, &num_entries); in ice_ptp_set_funcs_e810()
2592 ptp->ice_pin_desc = ice_pin_desc_e810_sma; in ice_ptp_set_funcs_e810()
2593 ptp->info.n_pins = in ice_ptp_set_funcs_e810()
2596 pf->ptp.ice_pin_desc = ice_pin_desc_e810; in ice_ptp_set_funcs_e810()
2597 pf->ptp.info.n_pins = in ice_ptp_set_funcs_e810()
2612 ptp->ice_pin_desc = (const struct ice_ptp_pin_desc *)desc; in ice_ptp_set_funcs_e810()
2615 ptp->info.pin_config = ptp->pin_desc; in ice_ptp_set_funcs_e810()
2628 * ice_ptp_set_caps - Set PTP capabilities
2633 struct ptp_clock_info *info = &pf->ptp.info; in ice_ptp_set_caps()
2636 snprintf(info->name, sizeof(info->name) - 1, "%s-%s-clk", in ice_ptp_set_caps()
2638 info->owner = THIS_MODULE; in ice_ptp_set_caps()
2639 info->max_adj = 100000000; in ice_ptp_set_caps()
2640 info->adjtime = ice_ptp_adjtime; in ice_ptp_set_caps()
2641 info->adjfine = ice_ptp_adjfine; in ice_ptp_set_caps()
2642 info->gettimex64 = ice_ptp_gettimex64; in ice_ptp_set_caps()
2643 info->settime64 = ice_ptp_settime64; in ice_ptp_set_caps()
2644 info->n_per_out = GLTSYN_TGT_H_IDX_MAX; in ice_ptp_set_caps()
2645 info->n_ext_ts = GLTSYN_EVNT_H_IDX_MAX; in ice_ptp_set_caps()
2646 info->enable = ice_ptp_gpio_enable; in ice_ptp_set_caps()
2647 info->verify = ice_verify_pin; in ice_ptp_set_caps()
2649 if (ice_is_e810(&pf->hw)) in ice_ptp_set_caps()
2656 * ice_ptp_create_clock - Create PTP clock device for userspace
2659 * This function creates a new PTP clock device. It only creates one if we
2670 if (pf->ptp.clock) in ice_ptp_create_clock()
2675 info = &pf->ptp.info; in ice_ptp_create_clock()
2679 pf->ptp.clock = ptp_clock_register(info, dev); in ice_ptp_create_clock()
2680 if (IS_ERR(pf->ptp.clock)) { in ice_ptp_create_clock()
2681 dev_err(ice_pf_to_dev(pf), "Failed to register PTP clock device"); in ice_ptp_create_clock()
2682 return PTR_ERR(pf->ptp.clock); in ice_ptp_create_clock()
2689 * ice_ptp_request_ts - Request an available Tx timestamp index
2690 * @tx: the PTP Tx timestamp tracker to request from
2698 spin_lock_irqsave(&tx->lock, flags); in ice_ptp_request_ts()
2702 spin_unlock_irqrestore(&tx->lock, flags); in ice_ptp_request_ts()
2703 return -1; in ice_ptp_request_ts()
2707 idx = find_next_zero_bit(tx->in_use, tx->len, in ice_ptp_request_ts()
2708 tx->last_ll_ts_idx_read + 1); in ice_ptp_request_ts()
2709 if (idx == tx->len) in ice_ptp_request_ts()
2710 idx = find_first_zero_bit(tx->in_use, tx->len); in ice_ptp_request_ts()
2712 if (idx < tx->len) { in ice_ptp_request_ts()
2717 set_bit(idx, tx->in_use); in ice_ptp_request_ts()
2718 clear_bit(idx, tx->stale); in ice_ptp_request_ts()
2719 tx->tstamps[idx].start = jiffies; in ice_ptp_request_ts()
2720 tx->tstamps[idx].skb = skb_get(skb); in ice_ptp_request_ts()
2721 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; in ice_ptp_request_ts()
2725 spin_unlock_irqrestore(&tx->lock, flags); in ice_ptp_request_ts()
2727 /* return the appropriate PHY timestamp register index, -1 if no in ice_ptp_request_ts()
2730 if (idx >= tx->len) in ice_ptp_request_ts()
2731 return -1; in ice_ptp_request_ts()
2733 return idx + tx->offset; in ice_ptp_request_ts()
2737 * ice_ptp_process_ts - Process the PTP Tx timestamps
2745 switch (pf->ptp.tx_interrupt_mode) { in ice_ptp_process_ts()
2751 return ice_ptp_tx_tstamp(&pf->ptp.port.tx); in ice_ptp_process_ts()
2757 pf->ptp.tx_interrupt_mode); in ice_ptp_process_ts()
2763 * ice_ptp_maybe_trigger_tx_interrupt - Trigger Tx timstamp interrupt
2778 struct ice_hw *hw = &pf->hw; in ice_ptp_maybe_trigger_tx_interrupt()
2788 for (i = 0; i < ICE_GET_QUAD_NUM(hw->ptp.num_lports); i++) { in ice_ptp_maybe_trigger_tx_interrupt()
2792 err = ice_get_phy_tx_tstamp_ready(&pf->hw, i, &tstamp_ready); in ice_ptp_maybe_trigger_tx_interrupt()
2803 …dev_dbg(dev, "PTP periodic task detected waiting timestamps. Triggering Tx timestamp interrupt now… in ice_ptp_maybe_trigger_tx_interrupt()
2812 struct ice_ptp *ptp = container_of(work, struct ice_ptp, work.work); in ice_ptp_periodic_work() local
2813 struct ice_pf *pf = container_of(ptp, struct ice_pf, ptp); in ice_ptp_periodic_work()
2816 if (pf->ptp.state != ICE_PTP_READY) in ice_ptp_periodic_work()
2824 kthread_queue_delayed_work(ptp->kworker, &ptp->work, in ice_ptp_periodic_work()
2829 * ice_ptp_prepare_for_reset - Prepare PTP for reset
2835 struct ice_ptp *ptp = &pf->ptp; in ice_ptp_prepare_for_reset() local
2838 if (ptp->state != ICE_PTP_READY) in ice_ptp_prepare_for_reset()
2841 ptp->state = ICE_PTP_RESETTING; in ice_ptp_prepare_for_reset()
2846 kthread_cancel_delayed_work_sync(&ptp->work); in ice_ptp_prepare_for_reset()
2851 ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); in ice_ptp_prepare_for_reset()
2856 src_tmr = ice_get_ptp_src_clock_index(&pf->hw); in ice_ptp_prepare_for_reset()
2859 wr32(&pf->hw, GLTSYN_ENA(src_tmr), (u32)~GLTSYN_ENA_TSYN_ENA_M); in ice_ptp_prepare_for_reset()
2861 /* Acquire PHC and system timer to restore after reset */ in ice_ptp_prepare_for_reset()
2862 ptp->reset_time = ktime_get_real_ns(); in ice_ptp_prepare_for_reset()
2866 * ice_ptp_rebuild_owner - Initialize PTP clock owner after reset
2870 * PTP clock owner instance should perform.
2874 struct ice_ptp *ptp = &pf->ptp; in ice_ptp_rebuild_owner() local
2875 struct ice_hw *hw = &pf->hw; in ice_ptp_rebuild_owner()
2886 err = -EBUSY; in ice_ptp_rebuild_owner()
2899 if (ptp->cached_phc_time) { in ice_ptp_rebuild_owner()
2900 time_diff = ktime_get_real_ns() - ptp->reset_time; in ice_ptp_rebuild_owner()
2901 ts = ns_to_timespec64(ptp->cached_phc_time + time_diff); in ice_ptp_rebuild_owner()
2926 /* Re-enable all periodic outputs and external timestamp events */ in ice_ptp_rebuild_owner()
2938 * ice_ptp_rebuild - Initialize PTP hardware clock support after reset
2944 struct ice_ptp *ptp = &pf->ptp; in ice_ptp_rebuild() local
2947 if (ptp->state == ICE_PTP_READY) { in ice_ptp_rebuild()
2949 } else if (ptp->state != ICE_PTP_RESETTING) { in ice_ptp_rebuild()
2950 err = -EINVAL; in ice_ptp_rebuild()
2951 dev_err(ice_pf_to_dev(pf), "PTP was not initialized\n"); in ice_ptp_rebuild()
2961 ptp->state = ICE_PTP_READY; in ice_ptp_rebuild()
2964 kthread_queue_delayed_work(ptp->kworker, &ptp->work, 0); in ice_ptp_rebuild()
2966 dev_info(ice_pf_to_dev(pf), "PTP reset successful\n"); in ice_ptp_rebuild()
2970 ptp->state = ICE_PTP_ERROR; in ice_ptp_rebuild()
2971 dev_err(ice_pf_to_dev(pf), "PTP reset failed %d\n", err); in ice_ptp_rebuild()
2977 !!(hw->dev_caps.nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M) : true; in ice_is_primary()
2982 if (!ice_pf_src_tmr_owned(pf) || !ice_is_primary(&pf->hw)) in ice_ptp_setup_adapter()
2983 return -EPERM; in ice_ptp_setup_adapter()
2985 pf->adapter->ctrl_pf = pf; in ice_ptp_setup_adapter()
2993 struct ice_ptp *ptp = &pf->ptp; in ice_ptp_setup_pf() local
2995 if (WARN_ON(!ctrl_ptp) || ice_get_phy_model(&pf->hw) == ICE_PHY_UNSUP) in ice_ptp_setup_pf()
2996 return -ENODEV; in ice_ptp_setup_pf()
2998 INIT_LIST_HEAD(&ptp->port.list_node); in ice_ptp_setup_pf()
2999 mutex_lock(&pf->adapter->ports.lock); in ice_ptp_setup_pf()
3001 list_add(&ptp->port.list_node, in ice_ptp_setup_pf()
3002 &pf->adapter->ports.ports); in ice_ptp_setup_pf()
3003 mutex_unlock(&pf->adapter->ports.lock); in ice_ptp_setup_pf()
3010 struct ice_ptp *ptp = &pf->ptp; in ice_ptp_cleanup_pf() local
3012 if (ice_get_phy_model(&pf->hw) != ICE_PHY_UNSUP) { in ice_ptp_cleanup_pf()
3013 mutex_lock(&pf->adapter->ports.lock); in ice_ptp_cleanup_pf()
3014 list_del(&ptp->port.list_node); in ice_ptp_cleanup_pf()
3015 mutex_unlock(&pf->adapter->ports.lock); in ice_ptp_cleanup_pf()
3020 * ice_ptp_clock_index - Get the PTP clock index for this device
3023 * Returns: the PTP clock index associated with this PF, or -1 if no PTP clock
3032 return -1; in ice_ptp_clock_index()
3033 clock = ctrl_ptp->clock; in ice_ptp_clock_index()
3035 return clock ? ptp_clock_index(clock) : -1; in ice_ptp_clock_index()
3039 * ice_ptp_init_owner - Initialize PTP_1588_CLOCK device
3042 * Setup and initialize a PTP clock device that represents the device hardware
3048 struct ice_hw *hw = &pf->hw; in ice_ptp_init_owner()
3061 err = -EBUSY; in ice_ptp_init_owner()
3091 pf->ptp.clock = NULL; in ice_ptp_init_owner()
3101 * ice_ptp_init_work - Initialize PTP work threads
3103 * @ptp: PF PTP structure
3105 static int ice_ptp_init_work(struct ice_pf *pf, struct ice_ptp *ptp) in ice_ptp_init_work() argument
3110 kthread_init_delayed_work(&ptp->work, ice_ptp_periodic_work); in ice_ptp_init_work()
3113 * connected to the PTP hardware clock. in ice_ptp_init_work()
3115 kworker = kthread_run_worker(0, "ice-ptp-%s", in ice_ptp_init_work()
3120 ptp->kworker = kworker; in ice_ptp_init_work()
3123 kthread_queue_delayed_work(ptp->kworker, &ptp->work, 0); in ice_ptp_init_work()
3129 * ice_ptp_init_port - Initialize PTP port structure
3131 * @ptp_port: PTP port structure
3135 struct ice_hw *hw = &pf->hw; in ice_ptp_init_port()
3137 mutex_init(&ptp_port->ps_lock); in ice_ptp_init_port()
3141 return ice_ptp_init_tx_eth56g(pf, &ptp_port->tx, in ice_ptp_init_port()
3142 ptp_port->port_num); in ice_ptp_init_port()
3144 return ice_ptp_init_tx_e810(pf, &ptp_port->tx); in ice_ptp_init_port()
3146 kthread_init_delayed_work(&ptp_port->ov_work, in ice_ptp_init_port()
3149 return ice_ptp_init_tx_e82x(pf, &ptp_port->tx, in ice_ptp_init_port()
3150 ptp_port->port_num); in ice_ptp_init_port()
3152 return -ENODEV; in ice_ptp_init_port()
3157 * ice_ptp_init_tx_interrupt_mode - Initialize device Tx interrupt mode
3162 * E822-based devices, only the clock owner processes the timestamps. Other
3167 switch (ice_get_phy_model(&pf->hw)) { in ice_ptp_init_tx_interrupt_mode()
3173 pf->ptp.tx_interrupt_mode = ICE_PTP_TX_INTERRUPT_ALL; in ice_ptp_init_tx_interrupt_mode()
3175 pf->ptp.tx_interrupt_mode = ICE_PTP_TX_INTERRUPT_NONE; in ice_ptp_init_tx_interrupt_mode()
3179 pf->ptp.tx_interrupt_mode = ICE_PTP_TX_INTERRUPT_SELF; in ice_ptp_init_tx_interrupt_mode()
3184 * ice_ptp_init - Initialize PTP hardware clock support
3187 * Set up the device for interacting with the PTP hardware clock for all
3197 struct ice_ptp *ptp = &pf->ptp; in ice_ptp_init() local
3198 struct ice_hw *hw = &pf->hw; in ice_ptp_init()
3201 ptp->state = ICE_PTP_INITIALIZING; in ice_ptp_init()
3209 ptp->port.port_num = (u8)lane_num; in ice_ptp_init()
3215 * configure the PTP clock device to represent it. in ice_ptp_init()
3230 err = ice_ptp_init_port(pf, &ptp->port); in ice_ptp_init()
3240 ptp->state = ICE_PTP_READY; in ice_ptp_init()
3242 err = ice_ptp_init_work(pf, ptp); in ice_ptp_init()
3246 dev_info(ice_pf_to_dev(pf), "PTP init successful\n"); in ice_ptp_init()
3250 /* If we registered a PTP clock, release it */ in ice_ptp_init()
3251 if (pf->ptp.clock) { in ice_ptp_init()
3252 ptp_clock_unregister(ptp->clock); in ice_ptp_init()
3253 pf->ptp.clock = NULL; in ice_ptp_init()
3255 ptp->state = ICE_PTP_ERROR; in ice_ptp_init()
3256 dev_err(ice_pf_to_dev(pf), "PTP failed %d\n", err); in ice_ptp_init()
3260 * ice_ptp_release - Disable the driver/HW support and unregister the clock
3268 if (pf->ptp.state != ICE_PTP_READY) in ice_ptp_release()
3271 pf->ptp.state = ICE_PTP_UNINIT; in ice_ptp_release()
3278 ice_ptp_release_tx_tracker(pf, &pf->ptp.port.tx); in ice_ptp_release()
3282 kthread_cancel_delayed_work_sync(&pf->ptp.work); in ice_ptp_release()
3284 ice_ptp_port_phy_stop(&pf->ptp.port); in ice_ptp_release()
3285 mutex_destroy(&pf->ptp.port.ps_lock); in ice_ptp_release()
3286 if (pf->ptp.kworker) { in ice_ptp_release()
3287 kthread_destroy_worker(pf->ptp.kworker); in ice_ptp_release()
3288 pf->ptp.kworker = NULL; in ice_ptp_release()
3291 if (!pf->ptp.clock) in ice_ptp_release()
3297 ptp_clock_unregister(pf->ptp.clock); in ice_ptp_release()
3298 pf->ptp.clock = NULL; in ice_ptp_release()
3300 dev_info(ice_pf_to_dev(pf), "Removed PTP clock\n"); in ice_ptp_release()