Lines Matching +full:quad +full:- +full:sgmii
1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018-2023, Intel Corporation. */
90 * ice_dump_phy_type - helper function to dump phy_type
117 * ice_set_mac_type - Sets MAC type
125 if (hw->vendor_id != PCI_VENDOR_ID_INTEL) in ice_set_mac_type()
126 return -ENODEV; in ice_set_mac_type()
128 switch (hw->device_id) { in ice_set_mac_type()
135 hw->mac_type = ICE_MAC_E810; in ice_set_mac_type()
156 hw->mac_type = ICE_MAC_GENERIC; in ice_set_mac_type()
162 hw->mac_type = ICE_MAC_GENERIC_3K_E825; in ice_set_mac_type()
174 hw->mac_type = ICE_MAC_E830; in ice_set_mac_type()
177 hw->mac_type = ICE_MAC_UNKNOWN; in ice_set_mac_type()
181 ice_debug(hw, ICE_DBG_INIT, "mac_type: %d\n", hw->mac_type); in ice_set_mac_type()
186 * ice_is_generic_mac - check if device's mac_type is generic
193 return (hw->mac_type == ICE_MAC_GENERIC || in ice_is_generic_mac()
194 hw->mac_type == ICE_MAC_GENERIC_3K_E825); in ice_is_generic_mac()
205 return hw->mac_type == ICE_MAC_E810; in ice_is_e810()
216 switch (hw->device_id) { in ice_is_e810t()
218 switch (hw->subsystem_device_id) { in ice_is_e810t()
229 switch (hw->subsystem_device_id) { in ice_is_e810t()
244 * ice_is_e822 - Check if a device is E822 family device
251 switch (hw->device_id) { in ice_is_e822()
271 * returns true if the device is E823-L or E823-C based, false if not.
275 switch (hw->device_id) { in ice_is_e823()
293 * ice_is_e825c - Check if a device is E825C family device
296 * Return: true if the device is E825-C based, false if not.
300 switch (hw->device_id) { in ice_is_e825c()
312 * ice_is_pf_c827 - check if pf contains c827 phy
324 if (hw->mac_type != ICE_MAC_E810) in ice_is_pf_c827()
327 if (hw->device_id != ICE_DEV_ID_E810C_QSFP) in ice_is_pf_c827()
348 * ice_clear_pf_cfg - Clear PF configuration
364 * ice_aq_manage_mac_read - manage MAC address read command
392 return -EINVAL; in ice_aq_manage_mac_read()
401 flags = le16_to_cpu(cmd->flags) & ICE_AQC_MAN_MAC_READ_M; in ice_aq_manage_mac_read()
405 return -EIO; in ice_aq_manage_mac_read()
409 for (i = 0; i < cmd->num_addr; i++) in ice_aq_manage_mac_read()
411 ether_addr_copy(hw->port_info->mac.lan_addr, in ice_aq_manage_mac_read()
413 ether_addr_copy(hw->port_info->mac.perm_addr, in ice_aq_manage_mac_read()
422 * ice_aq_get_phy_caps - returns PHY capabilities
446 return -EINVAL; in ice_aq_get_phy_caps()
447 hw = pi->hw; in ice_aq_get_phy_caps()
451 return -EINVAL; in ice_aq_get_phy_caps()
456 cmd->param0 |= cpu_to_le16(ICE_AQC_GET_PHY_RQM); in ice_aq_get_phy_caps()
458 cmd->param0 |= cpu_to_le16(report_mode); in ice_aq_get_phy_caps()
480 ice_dump_phy_type(hw, le64_to_cpu(pcaps->phy_type_low), in ice_aq_get_phy_caps()
481 le64_to_cpu(pcaps->phy_type_high), prefix); in ice_aq_get_phy_caps()
485 ice_debug(hw, ICE_DBG_LINK, "%s: caps = 0x%x\n", prefix, pcaps->caps); in ice_aq_get_phy_caps()
487 pcaps->low_power_ctrl_an); in ice_aq_get_phy_caps()
489 pcaps->eee_cap); in ice_aq_get_phy_caps()
491 pcaps->eeer_value); in ice_aq_get_phy_caps()
493 pcaps->link_fec_options); in ice_aq_get_phy_caps()
495 prefix, pcaps->module_compliance_enforcement); in ice_aq_get_phy_caps()
497 prefix, pcaps->extended_compliance_code); in ice_aq_get_phy_caps()
499 pcaps->module_type[0]); in ice_aq_get_phy_caps()
501 pcaps->module_type[1]); in ice_aq_get_phy_caps()
503 pcaps->module_type[2]); in ice_aq_get_phy_caps()
506 pi->phy.phy_type_low = le64_to_cpu(pcaps->phy_type_low); in ice_aq_get_phy_caps()
507 pi->phy.phy_type_high = le64_to_cpu(pcaps->phy_type_high); in ice_aq_get_phy_caps()
508 memcpy(pi->phy.link_info.module_type, &pcaps->module_type, in ice_aq_get_phy_caps()
509 sizeof(pi->phy.link_info.module_type)); in ice_aq_get_phy_caps()
516 * ice_aq_get_link_topo_handle - get link topology node return status
525 * connection type is backplane or BASE-T.
538 cmd->addr.topo_params.node_type_ctx = in ice_aq_get_link_topo_handle()
543 cmd->addr.topo_params.node_type_ctx |= in ice_aq_get_link_topo_handle()
546 return ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd); in ice_aq_get_link_topo_handle()
568 return -EINTR; in ice_aq_get_netlist_node()
585 * @node_handle: output parameter if node found - optional
589 * If node_handle is non-NULL it will be modified on function exit. It is only
590 * valid if the function returns zero, and should be ignored on any non-zero
595 * * -ENOENT if no handle was found,
623 return -ENOENT; in ice_find_netlist_node()
631 * media type is backplane or BASE-T.
637 * connection type is backplane or BASE-T. in ice_is_media_cage_present()
645 * ice_get_media_type - Gets media type
655 hw_link_info = &pi->phy.link_info; in ice_get_media_type()
656 if (hw_link_info->phy_type_low && hw_link_info->phy_type_high) in ice_get_media_type()
660 if (hw_link_info->phy_type_low) { in ice_get_media_type()
661 /* 1G SGMII is a special case where some DA cable PHYs in ice_get_media_type()
663 * be since SGMII is meant to be between a MAC and a PHY in ice_get_media_type()
666 if (hw_link_info->phy_type_low == ICE_PHY_TYPE_LOW_1G_SGMII && in ice_get_media_type()
667 (hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] == in ice_get_media_type()
669 hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] == in ice_get_media_type()
673 switch (hw_link_info->phy_type_low) { in ice_get_media_type()
745 switch (hw_link_info->phy_type_high) { in ice_get_media_type()
770 switch (hw->mac_type) { in ice_get_link_status_datalen()
783 * @link: pointer to link status structure - optional
804 return -EINVAL; in ice_aq_get_link_info()
805 hw = pi->hw; in ice_aq_get_link_info()
806 li_old = &pi->phy.link_info_old; in ice_aq_get_link_info()
807 hw_media_type = &pi->phy.media_type; in ice_aq_get_link_info()
808 li = &pi->phy.link_info; in ice_aq_get_link_info()
809 hw_fc_info = &pi->fc; in ice_aq_get_link_info()
814 resp->cmd_flags = cpu_to_le16(cmd_flags); in ice_aq_get_link_info()
815 resp->lport_num = pi->lport; in ice_aq_get_link_info()
826 li->link_speed = le16_to_cpu(link_data.link_speed); in ice_aq_get_link_info()
827 li->phy_type_low = le64_to_cpu(link_data.phy_type_low); in ice_aq_get_link_info()
828 li->phy_type_high = le64_to_cpu(link_data.phy_type_high); in ice_aq_get_link_info()
830 li->link_info = link_data.link_info; in ice_aq_get_link_info()
831 li->link_cfg_err = link_data.link_cfg_err; in ice_aq_get_link_info()
832 li->an_info = link_data.an_info; in ice_aq_get_link_info()
833 li->ext_info = link_data.ext_info; in ice_aq_get_link_info()
834 li->max_frame_size = le16_to_cpu(link_data.max_frame_size); in ice_aq_get_link_info()
835 li->fec_info = link_data.cfg & ICE_AQ_FEC_MASK; in ice_aq_get_link_info()
836 li->topo_media_conflict = link_data.topo_media_conflict; in ice_aq_get_link_info()
837 li->pacing = link_data.cfg & (ICE_AQ_CFG_PACING_M | in ice_aq_get_link_info()
844 hw_fc_info->current_mode = ICE_FC_FULL; in ice_aq_get_link_info()
846 hw_fc_info->current_mode = ICE_FC_TX_PAUSE; in ice_aq_get_link_info()
848 hw_fc_info->current_mode = ICE_FC_RX_PAUSE; in ice_aq_get_link_info()
850 hw_fc_info->current_mode = ICE_FC_NONE; in ice_aq_get_link_info()
852 li->lse_ena = !!(resp->cmd_flags & cpu_to_le16(ICE_AQ_LSE_IS_ENABLED)); in ice_aq_get_link_info()
855 ice_debug(hw, ICE_DBG_LINK, " link_speed = 0x%x\n", li->link_speed); in ice_aq_get_link_info()
857 (unsigned long long)li->phy_type_low); in ice_aq_get_link_info()
859 (unsigned long long)li->phy_type_high); in ice_aq_get_link_info()
861 ice_debug(hw, ICE_DBG_LINK, " link_info = 0x%x\n", li->link_info); in ice_aq_get_link_info()
862 ice_debug(hw, ICE_DBG_LINK, " link_cfg_err = 0x%x\n", li->link_cfg_err); in ice_aq_get_link_info()
863 ice_debug(hw, ICE_DBG_LINK, " an_info = 0x%x\n", li->an_info); in ice_aq_get_link_info()
864 ice_debug(hw, ICE_DBG_LINK, " ext_info = 0x%x\n", li->ext_info); in ice_aq_get_link_info()
865 ice_debug(hw, ICE_DBG_LINK, " fec_info = 0x%x\n", li->fec_info); in ice_aq_get_link_info()
866 ice_debug(hw, ICE_DBG_LINK, " lse_ena = 0x%x\n", li->lse_ena); in ice_aq_get_link_info()
868 li->max_frame_size); in ice_aq_get_link_info()
869 ice_debug(hw, ICE_DBG_LINK, " pacing = 0x%x\n", li->pacing); in ice_aq_get_link_info()
876 pi->phy.get_link_info = false; in ice_aq_get_link_info()
905 if (hw->mac_type == ICE_MAC_E830) { in ice_fill_tx_timer_and_fc_thresh()
908 cmd->tx_tmr_value = in ice_fill_tx_timer_and_fc_thresh()
918 cmd->tx_tmr_value = in ice_fill_tx_timer_and_fc_thresh()
927 cmd->fc_refresh_threshold = le16_encode_bits(val, fc_thres_m); in ice_fill_tx_timer_and_fc_thresh()
947 return -EINVAL; in ice_aq_set_mac_cfg()
951 cmd->max_frame_size = cpu_to_le16(max_frame_size); in ice_aq_set_mac_cfg()
959 * ice_init_fltr_mgmt_struct - initializes filter management list and locks
967 hw->switch_info = devm_kzalloc(ice_hw_to_dev(hw), in ice_init_fltr_mgmt_struct()
968 sizeof(*hw->switch_info), GFP_KERNEL); in ice_init_fltr_mgmt_struct()
969 sw = hw->switch_info; in ice_init_fltr_mgmt_struct()
972 return -ENOMEM; in ice_init_fltr_mgmt_struct()
974 INIT_LIST_HEAD(&sw->vsi_list_map_head); in ice_init_fltr_mgmt_struct()
975 sw->prof_res_bm_init = 0; in ice_init_fltr_mgmt_struct()
978 sw->recp_cnt = ICE_SW_LKUP_LAST; in ice_init_fltr_mgmt_struct()
982 devm_kfree(ice_hw_to_dev(hw), hw->switch_info); in ice_init_fltr_mgmt_struct()
989 * ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks
994 struct ice_switch_info *sw = hw->switch_info; in ice_cleanup_fltr_mgmt_struct()
1000 list_for_each_entry_safe(v_pos_map, v_tmp_map, &sw->vsi_list_map_head, in ice_cleanup_fltr_mgmt_struct()
1002 list_del(&v_pos_map->list_entry); in ice_cleanup_fltr_mgmt_struct()
1005 recps = sw->recp_list; in ice_cleanup_fltr_mgmt_struct()
1017 list_del(&lst_itr->list_entry); in ice_cleanup_fltr_mgmt_struct()
1018 devm_kfree(ice_hw_to_dev(hw), lst_itr->lkups); in ice_cleanup_fltr_mgmt_struct()
1028 list_del(&lst_itr->list_entry); in ice_cleanup_fltr_mgmt_struct()
1034 devm_kfree(ice_hw_to_dev(hw), sw->recp_list); in ice_cleanup_fltr_mgmt_struct()
1043 * bandwidth according to the device's configuration during power-on.
1054 hw->itr_gran = ICE_ITR_GRAN_ABOVE_25; in ice_get_itr_intrl_gran()
1055 hw->intrl_gran = ICE_INTRL_GRAN_ABOVE_25; in ice_get_itr_intrl_gran()
1058 hw->itr_gran = ICE_ITR_GRAN_MAX_25; in ice_get_itr_intrl_gran()
1059 hw->intrl_gran = ICE_INTRL_GRAN_MAX_25; in ice_get_itr_intrl_gran()
1065 * ice_wait_for_fw - wait for full FW readiness
1069 * Return: 0 on success, -ETIMEDOUT on timeout.
1088 return -ETIMEDOUT; in ice_wait_for_fw()
1092 * ice_init_hw - main hardware initialization routine
1107 hw->pf_id = FIELD_GET(PF_FUNC_RID_FUNC_NUM_M, rd32(hw, PF_FUNC_RID)); in ice_init_hw()
1130 INIT_LIST_HEAD(&hw->fdir_list_head); in ice_init_hw()
1142 if (!hw->port_info) in ice_init_hw()
1143 hw->port_info = devm_kzalloc(ice_hw_to_dev(hw), in ice_init_hw()
1144 sizeof(*hw->port_info), in ice_init_hw()
1146 if (!hw->port_info) { in ice_init_hw()
1147 status = -ENOMEM; in ice_init_hw()
1151 hw->port_info->local_fwd_mode = ICE_LOCAL_FWD_MODE_ENABLED; in ice_init_hw()
1153 hw->port_info->hw = hw; in ice_init_hw()
1160 hw->evb_veb = true; in ice_init_hw()
1163 xa_init_flags(&hw->port_info->sched_node_ids, XA_FLAGS_ALLOC); in ice_init_hw()
1174 status = ice_sched_init_port(hw->port_info); in ice_init_hw()
1180 status = -ENOMEM; in ice_init_hw()
1185 status = ice_aq_get_phy_caps(hw->port_info, false, in ice_init_hw()
1193 status = ice_aq_get_link_info(hw->port_info, false, NULL, NULL); in ice_init_hw()
1198 if (!hw->sw_entry_point_layer) { in ice_init_hw()
1200 status = -EIO; in ice_init_hw()
1203 INIT_LIST_HEAD(&hw->agg_list); in ice_init_hw()
1205 if (!hw->max_burst_size) in ice_init_hw()
1217 status = -ENOMEM; in ice_init_hw()
1231 status = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base); in ice_init_hw()
1237 mutex_init(&hw->tnl_lock); in ice_init_hw()
1258 devm_kfree(ice_hw_to_dev(hw), hw->port_info); in ice_init_hw()
1265 * ice_deinit_hw - unroll initialization operations done by ice_init_hw
1274 ice_free_fd_res_cntr(hw, hw->fd_ctr_base); in ice_deinit_hw()
1281 mutex_destroy(&hw->tnl_lock); in ice_deinit_hw()
1291 * ice_check_reset - Check to see if a global reset is complete
1314 return -EIO; in ice_check_reset()
1325 uld_mask = ICE_RESET_DONE_MASK | (hw->func_caps.common_cap.rdma ? in ice_check_reset()
1341 return -EIO; in ice_check_reset()
1348 * ice_pf_reset - Reset the PF
1367 return -EIO; in ice_pf_reset()
1392 return -EIO; in ice_pf_reset()
1399 * ice_reset - Perform different types of reset
1426 return -EINVAL; in ice_reset()
1438 * ice_copy_rxq_ctx_to_hw - Copy packed Rx queue context to HW registers
1458 PACKED_FIELD((lsb) + (width) - 1, (lsb), struct struct_name, struct_field)
1486 * ice_pack_rxq_ctx - Pack Rx queue context into a HW buffer
1490 * Pack the Rx queue context from the CPU-friendly unpacked buffer into its
1491 * bit-packed HW layout.
1501 * ice_write_rxq_ctx - Write Rx Queue context to hardware
1509 * Return: 0 on success, or -EINVAL if the Rx queue index is invalid.
1517 return -EINVAL; in ice_write_rxq_ctx()
1558 * ice_pack_txq_ctx - Pack Tx queue context into a HW buffer
1562 * Pack the Tx queue context from the CPU-friendly unpacked buffer into its
1563 * bit-packed HW layout.
1574 * ice_sbq_send_cmd - send Sideband Queue command to Sideband Queue
1590 * ice_sbq_rw_reg - Fill Sideband Queue command
1604 msg.dest_dev = in->dest_dev; in ice_sbq_rw_reg()
1605 msg.opcode = in->opcode; in ice_sbq_rw_reg()
1608 msg.msg_addr_low = cpu_to_le16(in->msg_addr_low); in ice_sbq_rw_reg()
1609 msg.msg_addr_high = cpu_to_le32(in->msg_addr_high); in ice_sbq_rw_reg()
1611 if (in->opcode) in ice_sbq_rw_reg()
1612 msg.data = cpu_to_le32(in->data); in ice_sbq_rw_reg()
1617 msg_len -= sizeof(msg.data); in ice_sbq_rw_reg()
1623 if (!status && !in->opcode) in ice_sbq_rw_reg()
1624 in->data = le32_to_cpu in ice_sbq_rw_reg()
1625 (((struct ice_sbq_msg_cmpl *)&msg)->data); in ice_sbq_rw_reg()
1658 * ice_sq_send_cmd_retry - send command to Control Queue (ATQ)
1680 opcode = le16_to_cpu(desc->opcode); in ice_sq_send_cmd_retry()
1695 hw->adminq.sq_last_status != ICE_AQ_RC_EBUSY) in ice_sq_send_cmd_retry()
1708 * ice_aq_send_cmd - send FW Admin Queue command to FW Admin Queue
1721 struct ice_aqc_req_res *cmd = &desc->params.res_owner; in ice_aq_send_cmd()
1735 switch (le16_to_cpu(desc->opcode)) { in ice_aq_send_cmd()
1752 if (le16_to_cpu(cmd->res_id) == ICE_AQC_RES_ID_GLBL_LOCK) in ice_aq_send_cmd()
1761 status = ice_sq_send_cmd_retry(hw, &hw->adminq, desc, buf, buf_size, cd); in ice_aq_send_cmd()
1788 hw->fw_branch = resp->fw_branch; in ice_aq_get_fw_ver()
1789 hw->fw_maj_ver = resp->fw_major; in ice_aq_get_fw_ver()
1790 hw->fw_min_ver = resp->fw_minor; in ice_aq_get_fw_ver()
1791 hw->fw_patch = resp->fw_patch; in ice_aq_get_fw_ver()
1792 hw->fw_build = le32_to_cpu(resp->fw_build); in ice_aq_get_fw_ver()
1793 hw->api_branch = resp->api_branch; in ice_aq_get_fw_ver()
1794 hw->api_maj_ver = resp->api_major; in ice_aq_get_fw_ver()
1795 hw->api_min_ver = resp->api_minor; in ice_aq_get_fw_ver()
1796 hw->api_patch = resp->api_patch; in ice_aq_get_fw_ver()
1821 return -EINVAL; in ice_aq_send_driver_ver()
1826 cmd->major_ver = dv->major_ver; in ice_aq_send_driver_ver()
1827 cmd->minor_ver = dv->minor_ver; in ice_aq_send_driver_ver()
1828 cmd->build_ver = dv->build_ver; in ice_aq_send_driver_ver()
1829 cmd->subbuild_ver = dv->subbuild_ver; in ice_aq_send_driver_ver()
1832 while (len < sizeof(dv->driver_string) && in ice_aq_send_driver_ver()
1833 isascii(dv->driver_string[len]) && dv->driver_string[len]) in ice_aq_send_driver_ver()
1836 return ice_aq_send_cmd(hw, &desc, dv->driver_string, len, cd); in ice_aq_send_driver_ver()
1857 cmd->driver_unloading = ICE_AQC_DRIVER_UNLOADING; in ice_aq_q_shutdown()
1874 * 1) 0 - acquired lock, and can perform download package
1875 * 2) -EIO - did not get lock, driver should fail to load
1876 * 3) -EALREADY - did not get lock, but another driver has
1901 cmd_resp->res_id = cpu_to_le16(res); in ice_aq_req_res()
1902 cmd_resp->access_type = cpu_to_le16(access); in ice_aq_req_res()
1903 cmd_resp->res_number = cpu_to_le32(sdp_number); in ice_aq_req_res()
1904 cmd_resp->timeout = cpu_to_le32(*timeout); in ice_aq_req_res()
1921 if (le16_to_cpu(cmd_resp->status) == ICE_AQ_RES_GLBL_SUCCESS) { in ice_aq_req_res()
1922 *timeout = le32_to_cpu(cmd_resp->timeout); in ice_aq_req_res()
1924 } else if (le16_to_cpu(cmd_resp->status) == in ice_aq_req_res()
1926 *timeout = le32_to_cpu(cmd_resp->timeout); in ice_aq_req_res()
1927 return -EIO; in ice_aq_req_res()
1928 } else if (le16_to_cpu(cmd_resp->status) == in ice_aq_req_res()
1930 return -EALREADY; in ice_aq_req_res()
1935 return -EIO; in ice_aq_req_res()
1942 if (!status || hw->adminq.sq_last_status == ICE_AQ_RC_EBUSY) in ice_aq_req_res()
1943 *timeout = le32_to_cpu(cmd_resp->timeout); in ice_aq_req_res()
1968 cmd->res_id = cpu_to_le16(res); in ice_aq_release_res()
1969 cmd->res_number = cpu_to_le32(sdp_number); in ice_aq_release_res()
1994 /* A return code of -EALREADY means that another driver has in ice_acquire_res()
1999 if (status == -EALREADY) in ice_acquire_res()
2009 timeout = (timeout > delay) ? timeout - delay : 0; in ice_acquire_res()
2012 if (status == -EALREADY) in ice_acquire_res()
2020 if (status && status != -EALREADY) in ice_acquire_res()
2024 if (status == -EALREADY) { in ice_acquire_res()
2028 ice_debug(hw, ICE_DBG_RES, "Warning: -EALREADY not expected\n"); in ice_acquire_res()
2051 if (status != -EIO) in ice_release_res()
2058 * ice_aq_alloc_free_res - command to allocate/free resources
2076 return -EINVAL; in ice_aq_alloc_free_res()
2082 cmd->num_entries = cpu_to_le16(1); in ice_aq_alloc_free_res()
2088 * ice_alloc_hw_res - allocate resource
2105 return -ENOMEM; in ice_alloc_hw_res()
2108 buf->num_elems = cpu_to_le16(num); in ice_alloc_hw_res()
2109 buf->res_type = cpu_to_le16(type | ICE_AQC_RES_TYPE_FLAG_DEDICATED | in ice_alloc_hw_res()
2112 buf->res_type |= cpu_to_le16(ICE_AQC_RES_TYPE_FLAG_SCAN_BOTTOM); in ice_alloc_hw_res()
2118 memcpy(res, buf->elem, sizeof(*buf->elem) * num); in ice_alloc_hw_res()
2126 * ice_free_hw_res - free allocated HW resource
2141 return -ENOMEM; in ice_free_hw_res()
2144 buf->num_elems = cpu_to_le16(num); in ice_free_hw_res()
2145 buf->res_type = cpu_to_le16(type); in ice_free_hw_res()
2146 memcpy(buf->elem, res, sizeof(*buf->elem) * num); in ice_free_hw_res()
2157 * ice_get_num_per_func - determine number of resources per PF
2170 funcs = hweight8(hw->dev_caps.common_cap.valid_functions & in ice_get_num_per_func()
2180 * ice_parse_common_caps - parse common device/function capabilities
2196 u32 logical_id = le32_to_cpu(elem->logical_id); in ice_parse_common_caps()
2197 u32 phys_id = le32_to_cpu(elem->phys_id); in ice_parse_common_caps()
2198 u32 number = le32_to_cpu(elem->number); in ice_parse_common_caps()
2199 u16 cap = le16_to_cpu(elem->cap); in ice_parse_common_caps()
2204 caps->valid_functions = number; in ice_parse_common_caps()
2206 caps->valid_functions); in ice_parse_common_caps()
2209 caps->sr_iov_1_1 = (number == 1); in ice_parse_common_caps()
2211 caps->sr_iov_1_1); in ice_parse_common_caps()
2214 caps->dcb = (number == 1); in ice_parse_common_caps()
2215 caps->active_tc_bitmap = logical_id; in ice_parse_common_caps()
2216 caps->maxtc = phys_id; in ice_parse_common_caps()
2217 ice_debug(hw, ICE_DBG_INIT, "%s: dcb = %d\n", prefix, caps->dcb); in ice_parse_common_caps()
2219 caps->active_tc_bitmap); in ice_parse_common_caps()
2220 ice_debug(hw, ICE_DBG_INIT, "%s: maxtc = %d\n", prefix, caps->maxtc); in ice_parse_common_caps()
2223 caps->rss_table_size = number; in ice_parse_common_caps()
2224 caps->rss_table_entry_width = logical_id; in ice_parse_common_caps()
2226 caps->rss_table_size); in ice_parse_common_caps()
2228 caps->rss_table_entry_width); in ice_parse_common_caps()
2231 caps->num_rxq = number; in ice_parse_common_caps()
2232 caps->rxq_first_id = phys_id; in ice_parse_common_caps()
2234 caps->num_rxq); in ice_parse_common_caps()
2236 caps->rxq_first_id); in ice_parse_common_caps()
2239 caps->num_txq = number; in ice_parse_common_caps()
2240 caps->txq_first_id = phys_id; in ice_parse_common_caps()
2242 caps->num_txq); in ice_parse_common_caps()
2244 caps->txq_first_id); in ice_parse_common_caps()
2247 caps->num_msix_vectors = number; in ice_parse_common_caps()
2248 caps->msix_vector_first_id = phys_id; in ice_parse_common_caps()
2250 caps->num_msix_vectors); in ice_parse_common_caps()
2252 caps->msix_vector_first_id); in ice_parse_common_caps()
2255 caps->nvm_update_pending_nvm = true; in ice_parse_common_caps()
2259 caps->nvm_update_pending_orom = true; in ice_parse_common_caps()
2263 caps->nvm_update_pending_netlist = true; in ice_parse_common_caps()
2267 caps->nvm_unified_update = in ice_parse_common_caps()
2271 caps->nvm_unified_update); in ice_parse_common_caps()
2275 caps->rdma = (number == 1); in ice_parse_common_caps()
2276 ice_debug(hw, ICE_DBG_INIT, "%s: rdma = %d\n", prefix, caps->rdma); in ice_parse_common_caps()
2279 caps->max_mtu = number; in ice_parse_common_caps()
2281 prefix, caps->max_mtu); in ice_parse_common_caps()
2284 caps->pcie_reset_avoidance = (number > 0); in ice_parse_common_caps()
2287 caps->pcie_reset_avoidance); in ice_parse_common_caps()
2290 caps->reset_restrict_support = (number == 1); in ice_parse_common_caps()
2293 caps->reset_restrict_support); in ice_parse_common_caps()
2296 caps->roce_lag = !!(number & ICE_AQC_BIT_ROCEV2_LAG); in ice_parse_common_caps()
2298 prefix, caps->roce_lag); in ice_parse_common_caps()
2299 caps->sriov_lag = !!(number & ICE_AQC_BIT_SRIOV_LAG); in ice_parse_common_caps()
2301 prefix, caps->sriov_lag); in ice_parse_common_caps()
2304 caps->tx_sched_topo_comp_mode_en = (number == 1); in ice_parse_common_caps()
2315 * ice_recalc_port_limited_caps - Recalculate port limited capabilities
2319 * Re-calculate the capabilities that are dependent on the number of physical
2329 if (hw->dev_caps.num_funcs > 4) { in ice_recalc_port_limited_caps()
2331 caps->maxtc = 4; in ice_recalc_port_limited_caps()
2333 caps->maxtc); in ice_recalc_port_limited_caps()
2334 if (caps->rdma) { in ice_recalc_port_limited_caps()
2336 caps->rdma = 0; in ice_recalc_port_limited_caps()
2342 if (caps == &hw->dev_caps.common_cap) in ice_recalc_port_limited_caps()
2348 * ice_parse_vf_func_caps - Parse ICE_AQC_CAPS_VF function caps
2359 u32 logical_id = le32_to_cpu(cap->logical_id); in ice_parse_vf_func_caps()
2360 u32 number = le32_to_cpu(cap->number); in ice_parse_vf_func_caps()
2362 func_p->num_allocd_vfs = number; in ice_parse_vf_func_caps()
2363 func_p->vf_base_id = logical_id; in ice_parse_vf_func_caps()
2365 func_p->num_allocd_vfs); in ice_parse_vf_func_caps()
2367 func_p->vf_base_id); in ice_parse_vf_func_caps()
2371 * ice_parse_vsi_func_caps - Parse ICE_AQC_CAPS_VSI function caps
2382 func_p->guar_num_vsi = ice_get_num_per_func(hw, ICE_MAX_VSI); in ice_parse_vsi_func_caps()
2384 le32_to_cpu(cap->number)); in ice_parse_vsi_func_caps()
2386 func_p->guar_num_vsi); in ice_parse_vsi_func_caps()
2390 * ice_parse_1588_func_caps - Parse ICE_AQC_CAPS_1588 function caps
2401 struct ice_ts_func_info *info = &func_p->ts_func_info; in ice_parse_1588_func_caps()
2402 u32 number = le32_to_cpu(cap->number); in ice_parse_1588_func_caps()
2404 info->ena = ((number & ICE_TS_FUNC_ENA_M) != 0); in ice_parse_1588_func_caps()
2405 func_p->common_cap.ieee_1588 = info->ena; in ice_parse_1588_func_caps()
2407 info->src_tmr_owned = ((number & ICE_TS_SRC_TMR_OWND_M) != 0); in ice_parse_1588_func_caps()
2408 info->tmr_ena = ((number & ICE_TS_TMR_ENA_M) != 0); in ice_parse_1588_func_caps()
2409 info->tmr_index_owned = ((number & ICE_TS_TMR_IDX_OWND_M) != 0); in ice_parse_1588_func_caps()
2410 info->tmr_index_assoc = ((number & ICE_TS_TMR_IDX_ASSOC_M) != 0); in ice_parse_1588_func_caps()
2413 info->clk_freq = FIELD_GET(ICE_TS_CLK_FREQ_M, number); in ice_parse_1588_func_caps()
2414 info->clk_src = ((number & ICE_TS_CLK_SRC_M) != 0); in ice_parse_1588_func_caps()
2416 info->clk_freq = ICE_TIME_REF_FREQ_156_250; in ice_parse_1588_func_caps()
2417 info->clk_src = ICE_CLK_SRC_TCXO; in ice_parse_1588_func_caps()
2420 if (info->clk_freq < NUM_ICE_TIME_REF_FREQ) { in ice_parse_1588_func_caps()
2421 info->time_ref = (enum ice_time_ref_freq)info->clk_freq; in ice_parse_1588_func_caps()
2424 * default to avoid out-of-bounds look ups of frequency in ice_parse_1588_func_caps()
2428 info->clk_freq); in ice_parse_1588_func_caps()
2429 info->time_ref = ICE_TIME_REF_FREQ_25_000; in ice_parse_1588_func_caps()
2433 func_p->common_cap.ieee_1588); in ice_parse_1588_func_caps()
2435 info->src_tmr_owned); in ice_parse_1588_func_caps()
2437 info->tmr_ena); in ice_parse_1588_func_caps()
2439 info->tmr_index_owned); in ice_parse_1588_func_caps()
2441 info->tmr_index_assoc); in ice_parse_1588_func_caps()
2443 info->clk_freq); in ice_parse_1588_func_caps()
2445 info->clk_src); in ice_parse_1588_func_caps()
2449 * ice_parse_fdir_func_caps - Parse ICE_AQC_CAPS_FD function caps
2461 switch (hw->mac_type) { in ice_parse_fdir_func_caps()
2471 func_p->fd_fltr_guar = ice_get_num_per_func(hw, gsize); in ice_parse_fdir_func_caps()
2472 func_p->fd_fltr_best_effort = bsize; in ice_parse_fdir_func_caps()
2475 func_p->fd_fltr_guar); in ice_parse_fdir_func_caps()
2477 func_p->fd_fltr_best_effort); in ice_parse_fdir_func_caps()
2481 * ice_parse_func_caps - Parse function capabilities
2509 found = ice_parse_common_caps(hw, &func_p->common_cap, in ice_parse_func_caps()
2534 ice_recalc_port_limited_caps(hw, &func_p->common_cap); in ice_parse_func_caps()
2538 * ice_func_id_to_logical_id - map from function id to logical pf id
2557 * ice_parse_valid_functions_cap - Parse ICE_AQC_CAPS_VALID_FUNCTIONS caps
2568 u32 number = le32_to_cpu(cap->number); in ice_parse_valid_functions_cap()
2570 dev_p->num_funcs = hweight32(number); in ice_parse_valid_functions_cap()
2572 dev_p->num_funcs); in ice_parse_valid_functions_cap()
2574 hw->logical_pf_id = ice_func_id_to_logical_id(number, hw->pf_id); in ice_parse_valid_functions_cap()
2578 * ice_parse_vf_dev_caps - Parse ICE_AQC_CAPS_VF device caps
2589 u32 number = le32_to_cpu(cap->number); in ice_parse_vf_dev_caps()
2591 dev_p->num_vfs_exposed = number; in ice_parse_vf_dev_caps()
2593 dev_p->num_vfs_exposed); in ice_parse_vf_dev_caps()
2597 * ice_parse_vsi_dev_caps - Parse ICE_AQC_CAPS_VSI device caps
2608 u32 number = le32_to_cpu(cap->number); in ice_parse_vsi_dev_caps()
2610 dev_p->num_vsi_allocd_to_host = number; in ice_parse_vsi_dev_caps()
2612 dev_p->num_vsi_allocd_to_host); in ice_parse_vsi_dev_caps()
2616 * ice_parse_1588_dev_caps - Parse ICE_AQC_CAPS_1588 device caps
2627 struct ice_ts_dev_info *info = &dev_p->ts_dev_info; in ice_parse_1588_dev_caps()
2628 u32 logical_id = le32_to_cpu(cap->logical_id); in ice_parse_1588_dev_caps()
2629 u32 phys_id = le32_to_cpu(cap->phys_id); in ice_parse_1588_dev_caps()
2630 u32 number = le32_to_cpu(cap->number); in ice_parse_1588_dev_caps()
2632 info->ena = ((number & ICE_TS_DEV_ENA_M) != 0); in ice_parse_1588_dev_caps()
2633 dev_p->common_cap.ieee_1588 = info->ena; in ice_parse_1588_dev_caps()
2635 info->tmr0_owner = number & ICE_TS_TMR0_OWNR_M; in ice_parse_1588_dev_caps()
2636 info->tmr0_owned = ((number & ICE_TS_TMR0_OWND_M) != 0); in ice_parse_1588_dev_caps()
2637 info->tmr0_ena = ((number & ICE_TS_TMR0_ENA_M) != 0); in ice_parse_1588_dev_caps()
2639 info->tmr1_owner = FIELD_GET(ICE_TS_TMR1_OWNR_M, number); in ice_parse_1588_dev_caps()
2640 info->tmr1_owned = ((number & ICE_TS_TMR1_OWND_M) != 0); in ice_parse_1588_dev_caps()
2641 info->tmr1_ena = ((number & ICE_TS_TMR1_ENA_M) != 0); in ice_parse_1588_dev_caps()
2643 info->ts_ll_read = ((number & ICE_TS_LL_TX_TS_READ_M) != 0); in ice_parse_1588_dev_caps()
2644 info->ts_ll_int_read = ((number & ICE_TS_LL_TX_TS_INT_READ_M) != 0); in ice_parse_1588_dev_caps()
2645 info->ll_phy_tmr_update = ((number & ICE_TS_LL_PHY_TMR_UPDATE_M) != 0); in ice_parse_1588_dev_caps()
2647 info->ena_ports = logical_id; in ice_parse_1588_dev_caps()
2648 info->tmr_own_map = phys_id; in ice_parse_1588_dev_caps()
2651 dev_p->common_cap.ieee_1588); in ice_parse_1588_dev_caps()
2653 info->tmr0_owner); in ice_parse_1588_dev_caps()
2655 info->tmr0_owned); in ice_parse_1588_dev_caps()
2657 info->tmr0_ena); in ice_parse_1588_dev_caps()
2659 info->tmr1_owner); in ice_parse_1588_dev_caps()
2661 info->tmr1_owned); in ice_parse_1588_dev_caps()
2663 info->tmr1_ena); in ice_parse_1588_dev_caps()
2665 info->ts_ll_read); in ice_parse_1588_dev_caps()
2667 info->ts_ll_int_read); in ice_parse_1588_dev_caps()
2669 info->ll_phy_tmr_update); in ice_parse_1588_dev_caps()
2671 info->ena_ports); in ice_parse_1588_dev_caps()
2673 info->tmr_own_map); in ice_parse_1588_dev_caps()
2677 * ice_parse_fdir_dev_caps - Parse ICE_AQC_CAPS_FD device caps
2688 u32 number = le32_to_cpu(cap->number); in ice_parse_fdir_dev_caps()
2690 dev_p->num_flow_director_fltr = number; in ice_parse_fdir_dev_caps()
2692 dev_p->num_flow_director_fltr); in ice_parse_fdir_dev_caps()
2696 * ice_parse_sensor_reading_cap - Parse ICE_AQC_CAPS_SENSOR_READING cap
2708 dev_p->supported_sensors = le32_to_cpu(cap->number); in ice_parse_sensor_reading_cap()
2712 dev_p->supported_sensors); in ice_parse_sensor_reading_cap()
2716 * ice_parse_nac_topo_dev_caps - Parse ICE_AQC_CAPS_NAC_TOPOLOGY cap
2727 dev_p->nac_topo.mode = le32_to_cpu(cap->number); in ice_parse_nac_topo_dev_caps()
2728 dev_p->nac_topo.id = le32_to_cpu(cap->phys_id) & ICE_NAC_TOPO_ID_M; in ice_parse_nac_topo_dev_caps()
2732 (dev_p->nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M) ? in ice_parse_nac_topo_dev_caps()
2733 "primary" : "secondary", dev_p->nac_topo.id); in ice_parse_nac_topo_dev_caps()
2736 !!(dev_p->nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M)); in ice_parse_nac_topo_dev_caps()
2738 !!(dev_p->nac_topo.mode & ICE_NAC_TOPO_DUAL_M)); in ice_parse_nac_topo_dev_caps()
2740 dev_p->nac_topo.id); in ice_parse_nac_topo_dev_caps()
2744 * ice_parse_dev_caps - Parse device capabilities
2772 found = ice_parse_common_caps(hw, &dev_p->common_cap, in ice_parse_dev_caps()
2806 ice_recalc_port_limited_caps(hw, &dev_p->common_cap); in ice_parse_dev_caps()
2846 * ice_is_cgu_in_netlist - check for CGU presence
2852 * * true - cgu is present
2853 * * false - cgu is not present
2861 hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032; in ice_is_cgu_in_netlist()
2868 hw->cgu_part_number = ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384; in ice_is_cgu_in_netlist()
2892 * ice_aq_list_caps - query function/device capabilities
2922 return -EINVAL; in ice_aq_list_caps()
2928 *cap_count = le32_to_cpu(cmd->count); in ice_aq_list_caps()
2934 * ice_discover_dev_caps - Read and extract device capabilities
2950 return -ENOMEM; in ice_discover_dev_caps()
2968 * ice_discover_func_caps - Read and extract function capabilities
2984 return -ENOMEM; in ice_discover_func_caps()
3002 * ice_set_safe_mode_caps - Override dev/func capabilities when in safe mode
3007 struct ice_hw_func_caps *func_caps = &hw->func_caps; in ice_set_safe_mode_caps()
3008 struct ice_hw_dev_caps *dev_caps = &hw->dev_caps; in ice_set_safe_mode_caps()
3013 cached_caps = func_caps->common_cap; in ice_set_safe_mode_caps()
3019 func_caps->common_cap.name = cached_caps.name in ice_set_safe_mode_caps()
3033 func_caps->common_cap.num_rxq = 1; in ice_set_safe_mode_caps()
3034 func_caps->common_cap.num_txq = 1; in ice_set_safe_mode_caps()
3037 func_caps->common_cap.num_msix_vectors = 2; in ice_set_safe_mode_caps()
3038 func_caps->guar_num_vsi = 1; in ice_set_safe_mode_caps()
3041 cached_caps = dev_caps->common_cap; in ice_set_safe_mode_caps()
3042 num_funcs = dev_caps->num_funcs; in ice_set_safe_mode_caps()
3048 dev_caps->common_cap.name = cached_caps.name in ice_set_safe_mode_caps()
3060 dev_caps->num_funcs = num_funcs; in ice_set_safe_mode_caps()
3063 dev_caps->common_cap.num_rxq = num_funcs; in ice_set_safe_mode_caps()
3064 dev_caps->common_cap.num_txq = num_funcs; in ice_set_safe_mode_caps()
3067 dev_caps->common_cap.num_msix_vectors = 2 * num_funcs; in ice_set_safe_mode_caps()
3071 * ice_get_caps - get info about the HW
3078 status = ice_discover_dev_caps(hw, &hw->dev_caps); in ice_get_caps()
3082 return ice_discover_func_caps(hw, &hw->func_caps); in ice_get_caps()
3086 * ice_aq_manage_mac_write - manage MAC address write command
3104 cmd->flags = flags; in ice_aq_manage_mac_write()
3105 ether_addr_copy(cmd->mac_addr, mac_addr); in ice_aq_manage_mac_write()
3127 * ice_clear_pxe_mode - clear pxe operations mode
3131 * like descriptor fetch/write-back mode.
3135 if (ice_check_sq_alive(hw, &hw->adminq)) in ice_clear_pxe_mode()
3140 * ice_aq_set_port_params - set physical port parameters.
3153 struct ice_hw *hw = pi->hw; in ice_aq_set_port_params()
3162 cmd->cmd_flags = cpu_to_le16(cmd_flags); in ice_aq_set_port_params()
3164 cmd->local_fwd_mode = pi->local_fwd_mode | in ice_aq_set_port_params()
3179 switch (hw->device_id) { in ice_is_100m_speed_supported()
3191 * ice_get_link_speed_based_on_phy_type - returns link speed
3342 * [ice_aqc_get_link_status->link_speed]. Caller can pass in
3398 return -EINVAL; in ice_aq_set_phy_cfg()
3400 /* Ensure that only valid bits of cfg->caps can be turned on. */ in ice_aq_set_phy_cfg()
3401 if (cfg->caps & ~ICE_AQ_PHY_ENA_VALID_MASK) { in ice_aq_set_phy_cfg()
3402 ice_debug(hw, ICE_DBG_PHY, "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n", in ice_aq_set_phy_cfg()
3403 cfg->caps); in ice_aq_set_phy_cfg()
3405 cfg->caps &= ICE_AQ_PHY_ENA_VALID_MASK; in ice_aq_set_phy_cfg()
3409 desc.params.set_phy.lport_num = pi->lport; in ice_aq_set_phy_cfg()
3414 (unsigned long long)le64_to_cpu(cfg->phy_type_low)); in ice_aq_set_phy_cfg()
3416 (unsigned long long)le64_to_cpu(cfg->phy_type_high)); in ice_aq_set_phy_cfg()
3417 ice_debug(hw, ICE_DBG_LINK, " caps = 0x%x\n", cfg->caps); in ice_aq_set_phy_cfg()
3419 cfg->low_power_ctrl_an); in ice_aq_set_phy_cfg()
3420 ice_debug(hw, ICE_DBG_LINK, " eee_cap = 0x%x\n", cfg->eee_cap); in ice_aq_set_phy_cfg()
3421 ice_debug(hw, ICE_DBG_LINK, " eeer_value = 0x%x\n", cfg->eeer_value); in ice_aq_set_phy_cfg()
3423 cfg->link_fec_opt); in ice_aq_set_phy_cfg()
3426 if (hw->adminq.sq_last_status == ICE_AQ_RC_EMODE) in ice_aq_set_phy_cfg()
3430 pi->phy.curr_user_phy_cfg = *cfg; in ice_aq_set_phy_cfg()
3436 * ice_update_link_info - update status of the HW network link
3445 return -EINVAL; in ice_update_link_info()
3447 li = &pi->phy.link_info; in ice_update_link_info()
3453 if (li->link_info & ICE_AQ_MEDIA_AVAILABLE) { in ice_update_link_info()
3458 return -ENOMEM; in ice_update_link_info()
3468 * ice_aq_get_phy_equalization - function to read serdes equaliser
3474 * @output: pointer to the caller-supplied buffer to return serdes equaliser
3476 * Return: non-zero status on error and 0 on success.
3495 cmd->activity_id = cpu_to_le16(ICE_AQC_ACT_ID_DNL); in ice_aq_get_phy_equalization()
3519 * ice_aq_get_fec_stats - reads fec stats from phy
3522 * @pcs_port: represents the pcs port number part of above pcs quad
3524 * @output: pointer to the caller-supplied buffer to return requested fec stats
3526 * Return: non-zero status on error and 0 on success.
3537 return -EINVAL; in ice_aq_get_fec_stats()
3546 return -EINVAL; in ice_aq_get_fec_stats()
3579 pi->phy.curr_user_fc_req = cache_data.data.curr_user_fc_req; in ice_cache_phy_user_req()
3582 pi->phy.curr_user_speed_req = in ice_cache_phy_user_req()
3586 pi->phy.curr_user_fec_req = cache_data.data.curr_user_fec_req; in ice_cache_phy_user_req()
3641 * ice_cfg_phy_fc - Configure PHY FC data based on FC mode
3654 return -EINVAL; in ice_cfg_phy_fc()
3672 cfg->caps &= ~(ICE_AQC_PHY_EN_TX_LINK_PAUSE | in ice_cfg_phy_fc()
3676 cfg->caps |= pause_mask; in ice_cfg_phy_fc()
3702 return -EINVAL; in ice_set_fc()
3705 hw = pi->hw; in ice_set_fc()
3709 return -ENOMEM; in ice_set_fc()
3722 status = ice_cfg_phy_fc(pi, &cfg, pi->fc.req_mode); in ice_set_fc()
3727 if (cfg.caps != pcaps->caps) { in ice_set_fc()
3786 if (phy_caps->phy_type_low != phy_cfg->phy_type_low || in ice_phy_caps_equals_cfg()
3787 phy_caps->phy_type_high != phy_cfg->phy_type_high || in ice_phy_caps_equals_cfg()
3788 ((phy_caps->caps & caps_mask) != (phy_cfg->caps & cfg_mask)) || in ice_phy_caps_equals_cfg()
3789 phy_caps->low_power_ctrl_an != phy_cfg->low_power_ctrl_an || in ice_phy_caps_equals_cfg()
3790 phy_caps->eee_cap != phy_cfg->eee_cap || in ice_phy_caps_equals_cfg()
3791 phy_caps->eeer_value != phy_cfg->eeer_value || in ice_phy_caps_equals_cfg()
3792 phy_caps->link_fec_options != phy_cfg->link_fec_opt) in ice_phy_caps_equals_cfg()
3799 * ice_copy_phy_caps_to_cfg - Copy PHY ability data to configuration data
3816 cfg->phy_type_low = caps->phy_type_low; in ice_copy_phy_caps_to_cfg()
3817 cfg->phy_type_high = caps->phy_type_high; in ice_copy_phy_caps_to_cfg()
3818 cfg->caps = caps->caps; in ice_copy_phy_caps_to_cfg()
3819 cfg->low_power_ctrl_an = caps->low_power_ctrl_an; in ice_copy_phy_caps_to_cfg()
3820 cfg->eee_cap = caps->eee_cap; in ice_copy_phy_caps_to_cfg()
3821 cfg->eeer_value = caps->eeer_value; in ice_copy_phy_caps_to_cfg()
3822 cfg->link_fec_opt = caps->link_fec_options; in ice_copy_phy_caps_to_cfg()
3823 cfg->module_compliance_enforcement = in ice_copy_phy_caps_to_cfg()
3824 caps->module_compliance_enforcement; in ice_copy_phy_caps_to_cfg()
3828 * ice_cfg_phy_fec - Configure PHY FEC data based on FEC mode
3842 return -EINVAL; in ice_cfg_phy_fec()
3844 hw = pi->hw; in ice_cfg_phy_fec()
3848 return -ENOMEM; in ice_cfg_phy_fec()
3857 cfg->caps |= pcaps->caps & ICE_AQC_PHY_EN_AUTO_FEC; in ice_cfg_phy_fec()
3858 cfg->link_fec_opt = pcaps->link_fec_options; in ice_cfg_phy_fec()
3862 /* Clear RS bits, and AND BASE-R ability in ice_cfg_phy_fec()
3865 cfg->link_fec_opt &= ICE_AQC_PHY_FEC_10G_KR_40G_KR4_EN | in ice_cfg_phy_fec()
3867 cfg->link_fec_opt |= ICE_AQC_PHY_FEC_10G_KR_40G_KR4_REQ | in ice_cfg_phy_fec()
3871 /* Clear BASE-R bits, and AND RS ability in ice_cfg_phy_fec()
3874 cfg->link_fec_opt &= ICE_AQC_PHY_FEC_25G_RS_CLAUSE91_EN; in ice_cfg_phy_fec()
3875 cfg->link_fec_opt |= ICE_AQC_PHY_FEC_25G_RS_528_REQ | in ice_cfg_phy_fec()
3880 cfg->link_fec_opt &= ~ICE_AQC_PHY_FEC_MASK; in ice_cfg_phy_fec()
3884 cfg->caps &= ICE_AQC_PHY_CAPS_MASK; in ice_cfg_phy_fec()
3885 cfg->link_fec_opt |= pcaps->link_fec_options; in ice_cfg_phy_fec()
3888 status = -EINVAL; in ice_cfg_phy_fec()
3902 cfg->link_fec_opt = tlv.fec_options; in ice_cfg_phy_fec()
3910 * ice_get_link_status - get status of the HW network link
3924 return -EINVAL; in ice_get_link_status()
3926 phy_info = &pi->phy; in ice_get_link_status()
3928 if (phy_info->get_link_info) { in ice_get_link_status()
3932 ice_debug(pi->hw, ICE_DBG_LINK, "get link status error, status = %d\n", in ice_get_link_status()
3936 *link_up = phy_info->link_info.link_info & ICE_AQ_LINK_UP; in ice_get_link_status()
3947 * Sets up the link and restarts the Auto-Negotiation over the link.
3960 cmd->cmd_flags = ICE_AQC_RESTART_AN_LINK_RESTART; in ice_aq_set_link_restart_an()
3961 cmd->lport_num = pi->lport; in ice_aq_set_link_restart_an()
3963 cmd->cmd_flags |= ICE_AQC_RESTART_AN_LINK_ENABLE; in ice_aq_set_link_restart_an()
3965 cmd->cmd_flags &= ~ICE_AQC_RESTART_AN_LINK_ENABLE; in ice_aq_set_link_restart_an()
3967 return ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd); in ice_aq_set_link_restart_an()
3990 cmd->lport_num = port_num; in ice_aq_set_event_mask()
3992 cmd->event_mask = cpu_to_le16(mask); in ice_aq_set_event_mask()
4014 cmd->lb_mode = ICE_AQ_MAC_LB_EN; in ice_aq_set_mac_loopback()
4022 * @is_orig_mode: is this LED set to original mode (by the net-list)
4032 struct ice_hw *hw = pi->hw; in ice_aq_set_port_id_led()
4040 cmd->ident_mode = ICE_AQC_PORT_IDENT_LED_ORIG; in ice_aq_set_port_id_led()
4042 cmd->ident_mode = ICE_AQC_PORT_IDENT_LED_BLINK; in ice_aq_set_port_id_led()
4051 * @option_count: input - size of the buffer in port options structures,
4052 * output - number of returned port options
4077 return -EINVAL; in ice_aq_get_port_options()
4083 cmd->lport_num = lport; in ice_aq_get_port_options()
4084 cmd->lport_num_valid = lport_valid; in ice_aq_get_port_options()
4093 cmd->port_options_count); in ice_aq_get_port_options()
4096 cmd->port_options); in ice_aq_get_port_options()
4099 cmd->port_options); in ice_aq_get_port_options()
4100 if (*active_option_idx > (*option_count - 1)) in ice_aq_get_port_options()
4101 return -EIO; in ice_aq_get_port_options()
4107 cmd->pending_port_option_status); in ice_aq_get_port_options()
4110 cmd->pending_port_option_status); in ice_aq_get_port_options()
4111 if (*pending_option_idx > (*option_count - 1)) in ice_aq_get_port_options()
4112 return -EIO; in ice_aq_get_port_options()
4148 return -EINVAL; in ice_aq_set_port_option()
4154 cmd->lport_num = lport; in ice_aq_set_port_option()
4156 cmd->lport_num_valid = lport_valid; in ice_aq_set_port_option()
4157 cmd->selected_port_option = new_option; in ice_aq_set_port_option()
4163 * ice_get_phy_lane_number - Get PHY lane number for current adapter
4177 return -ENOMEM; in ice_get_phy_lane_number()
4198 if (hw->pf_id == lport) { in ice_get_phy_lane_number()
4207 err = -ENXIO; in ice_get_phy_lane_number()
4222 * @length: 1-16 for read, 1 for write.
4239 return -EINVAL; in ice_aq_sff_eeprom()
4244 cmd->lport_num = (u8)(lport & 0xff); in ice_aq_sff_eeprom()
4245 cmd->lport_num_valid = (u8)((lport >> 8) & 0x01); in ice_aq_sff_eeprom()
4250 cmd->i2c_bus_addr = cpu_to_le16(i2c_bus_addr); in ice_aq_sff_eeprom()
4251 cmd->i2c_mem_addr = cpu_to_le16(mem_addr & 0xff); in ice_aq_sff_eeprom()
4252 cmd->eeprom_page = le16_encode_bits(page, ICE_AQC_SFF_EEPROM_PAGE_M); in ice_aq_sff_eeprom()
4298 u16 opcode, vsi_id, vsi_handle = params->vsi_handle, glob_lut_idx = 0; in __ice_aq_get_set_rss_lut()
4299 enum ice_lut_type lut_type = params->lut_type; in __ice_aq_get_set_rss_lut()
4304 u8 *lut = params->lut; in __ice_aq_get_set_rss_lut()
4308 return -EINVAL; in __ice_aq_get_set_rss_lut()
4311 if (lut_size > params->lut_size) in __ice_aq_get_set_rss_lut()
4312 return -EINVAL; in __ice_aq_get_set_rss_lut()
4313 else if (set && lut_size != params->lut_size) in __ice_aq_get_set_rss_lut()
4314 return -EINVAL; in __ice_aq_get_set_rss_lut()
4323 desc_params->vsi_id = cpu_to_le16(vsi_id | ICE_AQC_RSS_VSI_VALID); in __ice_aq_get_set_rss_lut()
4327 params->global_lut_id); in __ice_aq_get_set_rss_lut()
4330 desc_params->flags = cpu_to_le16(flags); in __ice_aq_get_set_rss_lut()
4386 desc_params->vsi_id = cpu_to_le16(vsi_id | ICE_AQC_RSS_VSI_VALID); in __ice_aq_get_set_rss_key()
4404 return -EINVAL; in ice_aq_get_rss_key()
4423 return -EINVAL; in ice_aq_set_rss_key()
4465 return -EINVAL; in ice_aq_add_lan_txq()
4468 return -EINVAL; in ice_aq_add_lan_txq()
4471 sum_size += struct_size(list, txqs, list->num_txqs); in ice_aq_add_lan_txq()
4472 list = (struct ice_aqc_add_tx_qgrp *)(list->txqs + in ice_aq_add_lan_txq()
4473 list->num_txqs); in ice_aq_add_lan_txq()
4477 return -EINVAL; in ice_aq_add_lan_txq()
4481 cmd->num_qgrps = num_qgrps; in ice_aq_add_lan_txq()
4516 return -EINVAL; in ice_aq_dis_lan_txq()
4519 return -EINVAL; in ice_aq_dis_lan_txq()
4521 cmd->num_entries = num_qgrps; in ice_aq_dis_lan_txq()
4527 cmd->cmd_type = ICE_AQC_Q_DIS_CMD_VM_RESET; in ice_aq_dis_lan_txq()
4531 cmd->cmd_type = ICE_AQC_Q_DIS_CMD_VF_RESET; in ice_aq_dis_lan_txq()
4533 vmvf_and_timeout |= (vmvf_num + hw->func_caps.vf_base_id) & in ice_aq_dis_lan_txq()
4541 cmd->vmvf_and_timeout = cpu_to_le16(vmvf_and_timeout); in ice_aq_dis_lan_txq()
4544 cmd->cmd_type |= ICE_AQC_Q_DIS_CMD_FLUSH_PIPE; in ice_aq_dis_lan_txq()
4555 u16 item_size = struct_size(item, q_id, item->num_qs); in ice_aq_dis_lan_txq()
4558 if ((item->num_qs % 2) == 0) in ice_aq_dis_lan_txq()
4567 return -EINVAL; in ice_aq_dis_lan_txq()
4574 vmvf_num, hw->adminq.sq_last_status); in ice_aq_dis_lan_txq()
4578 hw->adminq.sq_last_status); in ice_aq_dis_lan_txq()
4612 return -EINVAL; in ice_aq_cfg_lan_txq()
4614 cmd->cmd_type = ICE_AQC_Q_CFG_TC_CHNG; in ice_aq_cfg_lan_txq()
4615 cmd->num_qs = num_qs; in ice_aq_cfg_lan_txq()
4616 cmd->port_num_chng = (oldport & ICE_AQC_Q_CFG_SRC_PRT_M); in ice_aq_cfg_lan_txq()
4617 cmd->port_num_chng |= FIELD_PREP(ICE_AQC_Q_CFG_DST_PRT_M, newport); in ice_aq_cfg_lan_txq()
4618 cmd->time_out = FIELD_PREP(ICE_AQC_Q_CFG_TIMEOUT_M, 5); in ice_aq_cfg_lan_txq()
4619 cmd->blocked_cgds = 0; in ice_aq_cfg_lan_txq()
4624 hw->adminq.sq_last_status); in ice_aq_cfg_lan_txq()
4653 return -EINVAL; in ice_aq_add_rdma_qsets()
4656 u16 num_qsets = le16_to_cpu(list->num_qsets); in ice_aq_add_rdma_qsets()
4659 list = (struct ice_aqc_add_rdma_qset_data *)(list->rdma_qsets + in ice_aq_add_rdma_qsets()
4664 return -EINVAL; in ice_aq_add_rdma_qsets()
4668 cmd->num_qset_grps = num_qset_grps; in ice_aq_add_rdma_qsets()
4676 * ice_get_lan_q_ctx - get the LAN queue context for the given VSI and TC
4691 if (q_handle >= vsi->num_lan_q_entries[tc]) in ice_get_lan_q_ctx()
4693 if (!vsi->lan_q_ctx[tc]) in ice_get_lan_q_ctx()
4695 q_ctx = vsi->lan_q_ctx[tc]; in ice_get_lan_q_ctx()
4723 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) in ice_ena_vsi_txq()
4724 return -EIO; in ice_ena_vsi_txq()
4726 if (num_qgrps > 1 || buf->num_txqs > 1) in ice_ena_vsi_txq()
4727 return -ENOSPC; in ice_ena_vsi_txq()
4729 hw = pi->hw; in ice_ena_vsi_txq()
4732 return -EINVAL; in ice_ena_vsi_txq()
4734 mutex_lock(&pi->sched_lock); in ice_ena_vsi_txq()
4740 status = -EINVAL; in ice_ena_vsi_txq()
4748 status = -EINVAL; in ice_ena_vsi_txq()
4752 buf->parent_teid = parent->info.node_teid; in ice_ena_vsi_txq()
4753 node.parent_teid = parent->info.node_teid; in ice_ena_vsi_txq()
4756 * - Scheduling mode is Bytes Per Second (BPS), indicated by Bit 0. in ice_ena_vsi_txq()
4757 * - 0 priority among siblings, indicated by Bit 1-3. in ice_ena_vsi_txq()
4758 * - WFQ, indicated by Bit 4. in ice_ena_vsi_txq()
4759 * - 0 Adjustment value is used in PSM credit update flow, indicated by in ice_ena_vsi_txq()
4760 * Bit 5-6. in ice_ena_vsi_txq()
4761 * - Bit 7 is reserved. in ice_ena_vsi_txq()
4765 buf->txqs[0].info.valid_sections = in ice_ena_vsi_txq()
4768 buf->txqs[0].info.generic = 0; in ice_ena_vsi_txq()
4769 buf->txqs[0].info.cir_bw.bw_profile_idx = in ice_ena_vsi_txq()
4771 buf->txqs[0].info.cir_bw.bw_alloc = in ice_ena_vsi_txq()
4773 buf->txqs[0].info.eir_bw.bw_profile_idx = in ice_ena_vsi_txq()
4775 buf->txqs[0].info.eir_bw.bw_alloc = in ice_ena_vsi_txq()
4782 le16_to_cpu(buf->txqs[0].txq_id), in ice_ena_vsi_txq()
4783 hw->adminq.sq_last_status); in ice_ena_vsi_txq()
4787 node.node_teid = buf->txqs[0].q_teid; in ice_ena_vsi_txq()
4789 q_ctx->q_handle = q_handle; in ice_ena_vsi_txq()
4790 q_ctx->q_teid = le32_to_cpu(node.node_teid); in ice_ena_vsi_txq()
4793 status = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, &node, NULL); in ice_ena_vsi_txq()
4798 mutex_unlock(&pi->sched_lock); in ice_ena_vsi_txq()
4826 int status = -ENOENT; in ice_dis_vsi_txq()
4829 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) in ice_dis_vsi_txq()
4830 return -EIO; in ice_dis_vsi_txq()
4832 hw = pi->hw; in ice_dis_vsi_txq()
4842 return -EIO; in ice_dis_vsi_txq()
4845 mutex_lock(&pi->sched_lock); in ice_dis_vsi_txq()
4850 node = ice_sched_find_node_by_teid(pi->root, q_teids[i]); in ice_dis_vsi_txq()
4859 if (q_ctx->q_handle != q_handles[i]) { in ice_dis_vsi_txq()
4861 q_ctx->q_handle, q_handles[i]); in ice_dis_vsi_txq()
4864 qg_list->parent_teid = node->info.parent_teid; in ice_dis_vsi_txq()
4865 qg_list->num_qs = 1; in ice_dis_vsi_txq()
4866 qg_list->q_id[0] = cpu_to_le16(q_ids[i]); in ice_dis_vsi_txq()
4873 q_ctx->q_handle = ICE_INVAL_Q_HANDLE; in ice_dis_vsi_txq()
4874 q_ctx->q_teid = ICE_INVAL_TEID; in ice_dis_vsi_txq()
4876 mutex_unlock(&pi->sched_lock); in ice_dis_vsi_txq()
4881 * ice_cfg_vsi_qs - configure the new/existing VSI queues
4897 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) in ice_cfg_vsi_qs()
4898 return -EIO; in ice_cfg_vsi_qs()
4900 if (!ice_is_vsi_valid(pi->hw, vsi_handle)) in ice_cfg_vsi_qs()
4901 return -EINVAL; in ice_cfg_vsi_qs()
4903 mutex_lock(&pi->sched_lock); in ice_cfg_vsi_qs()
4916 mutex_unlock(&pi->sched_lock); in ice_cfg_vsi_qs()
4921 * ice_cfg_vsi_lan - configure VSI LAN queues
4938 * ice_cfg_vsi_rdma - configure the VSI RDMA queues
4976 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) in ice_ena_vsi_rdma_qset()
4977 return -EIO; in ice_ena_vsi_rdma_qset()
4978 hw = pi->hw; in ice_ena_vsi_rdma_qset()
4981 return -EINVAL; in ice_ena_vsi_rdma_qset()
4986 return -ENOMEM; in ice_ena_vsi_rdma_qset()
4987 mutex_lock(&pi->sched_lock); in ice_ena_vsi_rdma_qset()
4992 ret = -EINVAL; in ice_ena_vsi_rdma_qset()
4995 buf->parent_teid = parent->info.node_teid; in ice_ena_vsi_rdma_qset()
4996 node.parent_teid = parent->info.node_teid; in ice_ena_vsi_rdma_qset()
4998 buf->num_qsets = cpu_to_le16(num_qsets); in ice_ena_vsi_rdma_qset()
5000 buf->rdma_qsets[i].tx_qset_id = cpu_to_le16(rdma_qset[i]); in ice_ena_vsi_rdma_qset()
5001 buf->rdma_qsets[i].info.valid_sections = in ice_ena_vsi_rdma_qset()
5004 buf->rdma_qsets[i].info.generic = 0; in ice_ena_vsi_rdma_qset()
5005 buf->rdma_qsets[i].info.cir_bw.bw_profile_idx = in ice_ena_vsi_rdma_qset()
5007 buf->rdma_qsets[i].info.cir_bw.bw_alloc = in ice_ena_vsi_rdma_qset()
5009 buf->rdma_qsets[i].info.eir_bw.bw_profile_idx = in ice_ena_vsi_rdma_qset()
5011 buf->rdma_qsets[i].info.eir_bw.bw_alloc = in ice_ena_vsi_rdma_qset()
5021 node.node_teid = buf->rdma_qsets[i].qset_teid; in ice_ena_vsi_rdma_qset()
5022 ret = ice_sched_add_node(pi, hw->num_tx_sched_layers - 1, in ice_ena_vsi_rdma_qset()
5029 mutex_unlock(&pi->sched_lock); in ice_ena_vsi_rdma_qset()
5035 * ice_dis_vsi_rdma_qset - free RDMA resources
5051 if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY) in ice_dis_vsi_rdma_qset()
5052 return -EIO; in ice_dis_vsi_rdma_qset()
5054 hw = pi->hw; in ice_dis_vsi_rdma_qset()
5056 mutex_lock(&pi->sched_lock); in ice_dis_vsi_rdma_qset()
5061 node = ice_sched_find_node_by_teid(pi->root, qset_teid[i]); in ice_dis_vsi_rdma_qset()
5065 qg_list->parent_teid = node->info.parent_teid; in ice_dis_vsi_rdma_qset()
5066 qg_list->num_qs = 1; in ice_dis_vsi_rdma_qset()
5067 qg_list->q_id[0] = in ice_dis_vsi_rdma_qset()
5079 mutex_unlock(&pi->sched_lock); in ice_dis_vsi_rdma_qset()
5084 * ice_aq_get_cgu_abilities - get cgu abilities
5102 * ice_aq_set_input_pin_cfg - set input pin config
5122 cmd->input_idx = input_idx; in ice_aq_set_input_pin_cfg()
5123 cmd->flags1 = flags1; in ice_aq_set_input_pin_cfg()
5124 cmd->flags2 = flags2; in ice_aq_set_input_pin_cfg()
5125 cmd->freq = cpu_to_le32(freq); in ice_aq_set_input_pin_cfg()
5126 cmd->phase_delay = cpu_to_le32(phase_delay); in ice_aq_set_input_pin_cfg()
5132 * ice_aq_get_input_pin_cfg - get input pin config
5155 cmd->input_idx = input_idx; in ice_aq_get_input_pin_cfg()
5160 *status = cmd->status; in ice_aq_get_input_pin_cfg()
5162 *type = cmd->type; in ice_aq_get_input_pin_cfg()
5164 *flags1 = cmd->flags1; in ice_aq_get_input_pin_cfg()
5166 *flags2 = cmd->flags2; in ice_aq_get_input_pin_cfg()
5168 *freq = le32_to_cpu(cmd->freq); in ice_aq_get_input_pin_cfg()
5170 *phase_delay = le32_to_cpu(cmd->phase_delay); in ice_aq_get_input_pin_cfg()
5177 * ice_aq_set_output_pin_cfg - set output pin config
5197 cmd->output_idx = output_idx; in ice_aq_set_output_pin_cfg()
5198 cmd->flags = flags; in ice_aq_set_output_pin_cfg()
5199 cmd->src_sel = src_sel; in ice_aq_set_output_pin_cfg()
5200 cmd->freq = cpu_to_le32(freq); in ice_aq_set_output_pin_cfg()
5201 cmd->phase_delay = cpu_to_le32(phase_delay); in ice_aq_set_output_pin_cfg()
5207 * ice_aq_get_output_pin_cfg - get output pin config
5228 cmd->output_idx = output_idx; in ice_aq_get_output_pin_cfg()
5233 *flags = cmd->flags; in ice_aq_get_output_pin_cfg()
5235 *src_sel = cmd->src_sel; in ice_aq_get_output_pin_cfg()
5237 *freq = le32_to_cpu(cmd->freq); in ice_aq_get_output_pin_cfg()
5239 *src_freq = le32_to_cpu(cmd->src_freq); in ice_aq_get_output_pin_cfg()
5246 * ice_aq_get_cgu_dpll_status - get dpll status
5269 cmd->dpll_num = dpll_num; in ice_aq_get_cgu_dpll_status()
5273 *ref_state = cmd->ref_state; in ice_aq_get_cgu_dpll_status()
5274 *dpll_state = cmd->dpll_state; in ice_aq_get_cgu_dpll_status()
5275 *config = cmd->config; in ice_aq_get_cgu_dpll_status()
5276 *phase_offset = le32_to_cpu(cmd->phase_offset_h); in ice_aq_get_cgu_dpll_status()
5278 *phase_offset += le32_to_cpu(cmd->phase_offset_l); in ice_aq_get_cgu_dpll_status()
5280 *eec_mode = cmd->eec_mode; in ice_aq_get_cgu_dpll_status()
5287 * ice_aq_set_cgu_dpll_config - set dpll config
5306 cmd->dpll_num = dpll_num; in ice_aq_set_cgu_dpll_config()
5307 cmd->ref_state = ref_state; in ice_aq_set_cgu_dpll_config()
5308 cmd->config = config; in ice_aq_set_cgu_dpll_config()
5309 cmd->eec_mode = eec_mode; in ice_aq_set_cgu_dpll_config()
5315 * ice_aq_set_cgu_ref_prio - set input reference priority
5333 cmd->dpll_num = dpll_num; in ice_aq_set_cgu_ref_prio()
5334 cmd->ref_idx = ref_idx; in ice_aq_set_cgu_ref_prio()
5335 cmd->ref_priority = ref_priority; in ice_aq_set_cgu_ref_prio()
5341 * ice_aq_get_cgu_ref_prio - get input reference priority
5360 cmd->dpll_num = dpll_num; in ice_aq_get_cgu_ref_prio()
5361 cmd->ref_idx = ref_idx; in ice_aq_get_cgu_ref_prio()
5365 *ref_prio = cmd->ref_priority; in ice_aq_get_cgu_ref_prio()
5371 * ice_aq_get_cgu_info - get cgu info
5393 *cgu_id = le32_to_cpu(cmd->cgu_id); in ice_aq_get_cgu_info()
5394 *cgu_cfg_ver = le32_to_cpu(cmd->cgu_cfg_ver); in ice_aq_get_cgu_info()
5395 *cgu_fw_ver = le32_to_cpu(cmd->cgu_fw_ver); in ice_aq_get_cgu_info()
5402 * ice_aq_set_phy_rec_clk_out - set RCLK phy out
5421 cmd->phy_output = phy_output; in ice_aq_set_phy_rec_clk_out()
5422 cmd->port_num = ICE_AQC_SET_PHY_REC_CLK_OUT_CURR_PORT; in ice_aq_set_phy_rec_clk_out()
5423 cmd->flags = enable & ICE_AQC_SET_PHY_REC_CLK_OUT_OUT_EN; in ice_aq_set_phy_rec_clk_out()
5424 cmd->freq = cpu_to_le32(*freq); in ice_aq_set_phy_rec_clk_out()
5428 *freq = le32_to_cpu(cmd->freq); in ice_aq_set_phy_rec_clk_out()
5434 * ice_aq_get_phy_rec_clk_out - get phy recovered signal info
5454 cmd->phy_output = *phy_output; in ice_aq_get_phy_rec_clk_out()
5458 *phy_output = cmd->phy_output; in ice_aq_get_phy_rec_clk_out()
5460 *port_num = cmd->port_num; in ice_aq_get_phy_rec_clk_out()
5462 *flags = cmd->flags; in ice_aq_get_phy_rec_clk_out()
5464 *node_handle = le16_to_cpu(cmd->node_handle); in ice_aq_get_phy_rec_clk_out()
5488 cmd->sensor = ICE_INTERNAL_TEMP_SENSOR; in ice_aq_get_sensor_reading()
5489 cmd->format = ICE_INTERNAL_TEMP_SENSOR_FORMAT; in ice_aq_get_sensor_reading()
5500 * ice_replay_pre_init - replay pre initialization
5507 struct ice_switch_info *sw = hw->switch_info; in ice_replay_pre_init()
5517 list_replace_init(&sw->recp_list[i].filt_rules, in ice_replay_pre_init()
5518 &sw->recp_list[i].filt_replay_rules); in ice_replay_pre_init()
5525 * ice_replay_vsi - replay VSI configuration
5537 return -EINVAL; in ice_replay_vsi()
5539 /* Replay pre-initialization if there is any */ in ice_replay_vsi()
5557 * ice_replay_post - post replay configuration cleanup
5570 * ice_stat_update40 - read 40 bit stat from the chip and update stat values
5581 u64 new_data = rd64(hw, reg) & (BIT_ULL(40) - 1); in ice_stat_update40()
5597 *cur_stat += new_data - *prev_stat; in ice_stat_update40()
5599 /* to manage the potential roll-over */ in ice_stat_update40()
5600 *cur_stat += (new_data + BIT_ULL(40)) - *prev_stat; in ice_stat_update40()
5607 * ice_stat_update32 - read 32 bit stat from the chip and update stat values
5636 *cur_stat += new_data - *prev_stat; in ice_stat_update32()
5638 /* to manage the potential roll-over */ in ice_stat_update32()
5639 *cur_stat += (new_data + BIT_ULL(32)) - *prev_stat; in ice_stat_update32()
5646 * ice_sched_query_elem - query element information from HW
5662 buf->node_teid = cpu_to_le32(node_teid); in ice_sched_query_elem()
5674 * @bus_addr: 7-bit I2C bus address
5676 * @params: I2C parameters: bit [7] - Repeated start,
5678 * bit [4] - I2C address type,
5679 * bits [3:0] - data size to read (0-16 bytes)
5699 return -EINVAL; in ice_aq_read_i2c()
5703 cmd->i2c_bus_addr = cpu_to_le16(bus_addr); in ice_aq_read_i2c()
5704 cmd->topo_addr = topo_addr; in ice_aq_read_i2c()
5705 cmd->i2c_params = params; in ice_aq_read_i2c()
5706 cmd->i2c_addr = addr; in ice_aq_read_i2c()
5715 *data = resp->i2c_data[i]; in ice_aq_read_i2c()
5727 * @bus_addr: 7-bit I2C bus address
5729 * @params: I2C parameters: bit [4] - I2C address type, bits [3:0] - data size to write (0-7 bytes)
5736 * * 0 - Successful write to the i2c device
5737 * * -EINVAL - Data size greater than 4 bytes
5738 * * -EIO - FW error
5756 return -EINVAL; in ice_aq_write_i2c()
5758 cmd->i2c_bus_addr = cpu_to_le16(bus_addr); in ice_aq_write_i2c()
5759 cmd->topo_addr = topo_addr; in ice_aq_write_i2c()
5760 cmd->i2c_params = params; in ice_aq_write_i2c()
5761 cmd->i2c_addr = addr; in ice_aq_write_i2c()
5763 memcpy(cmd->i2c_data, data, data_size); in ice_aq_write_i2c()
5787 cmd->gpio_ctrl_handle = cpu_to_le16(gpio_ctrl_handle); in ice_aq_set_gpio()
5788 cmd->gpio_num = pin_idx; in ice_aq_set_gpio()
5789 cmd->gpio_val = value ? 1 : 0; in ice_aq_set_gpio()
5815 cmd->gpio_ctrl_handle = cpu_to_le16(gpio_ctrl_handle); in ice_aq_get_gpio()
5816 cmd->gpio_num = pin_idx; in ice_aq_get_gpio()
5822 *value = !!cmd->gpio_val; in ice_aq_get_gpio()
5837 if (hw->api_maj_ver == maj) { in ice_is_fw_api_min_ver()
5838 if (hw->api_min_ver > min) in ice_is_fw_api_min_ver()
5840 if (hw->api_min_ver == min && hw->api_patch >= patch) in ice_is_fw_api_min_ver()
5842 } else if (hw->api_maj_ver > maj) { in ice_is_fw_api_min_ver()
5874 struct ice_hw *hw = pi->hw; in ice_get_link_default_override()
5885 tlv_start = tlv + pi->lport * ICE_SR_PFA_LINK_OVERRIDE_WORDS + in ice_get_link_default_override()
5894 ldo->options = FIELD_GET(ICE_LINK_OVERRIDE_OPT_M, buf); in ice_get_link_default_override()
5895 ldo->phy_config = (buf & ICE_LINK_OVERRIDE_PHY_CFG_M) >> in ice_get_link_default_override()
5905 ldo->fec_options = buf & ICE_LINK_OVERRIDE_FEC_OPT_M; in ice_get_link_default_override()
5916 ldo->phy_type_low |= ((u64)buf << (i * 16)); in ice_get_link_default_override()
5929 ldo->phy_type_high |= ((u64)buf << (i * 16)); in ice_get_link_default_override()
5936 * ice_is_phy_caps_an_enabled - check if PHY capabilities autoneg is enabled
5941 if (caps->caps & ICE_AQC_PHY_AN_MODE || in ice_is_phy_caps_an_enabled()
5942 caps->low_power_ctrl_an & (ICE_AQC_PHY_AN_EN_CLAUSE28 | in ice_is_phy_caps_an_enabled()
5951 * ice_is_fw_health_report_supported - checks if firmware supports health events
5965 * ice_aq_set_health_status_cfg - Configure FW health events
5970 * PF. The supported event types are: PF-specific, all PFs, and global.
5983 cmd->event_source = event_source; in ice_aq_set_health_status_cfg()
5989 * ice_aq_set_lldp_mib - Set the LLDP MIB
5992 * @buf: pointer to the caller-supplied buffer to store the MIB block
6008 return -EINVAL; in ice_aq_set_lldp_mib()
6015 cmd->type = mib_type; in ice_aq_set_lldp_mib()
6016 cmd->length = cpu_to_le16(buf_size); in ice_aq_set_lldp_mib()
6022 * ice_fw_supports_lldp_fltr_ctrl - check NVM version supports lldp_fltr_ctrl
6027 if (hw->mac_type != ICE_MAC_E810) in ice_fw_supports_lldp_fltr_ctrl()
6036 * ice_lldp_fltr_add_remove - add or remove a LLDP Rx switch filter
6052 cmd->cmd_flags = ICE_AQC_LLDP_FILTER_ACTION_ADD; in ice_lldp_fltr_add_remove()
6054 cmd->cmd_flags = ICE_AQC_LLDP_FILTER_ACTION_DELETE; in ice_lldp_fltr_add_remove()
6056 cmd->vsi_num = cpu_to_le16(vsi_num); in ice_lldp_fltr_add_remove()
6062 * ice_lldp_execute_pending_mib - execute LLDP pending MIB request
6093 * by [fls(speed) - 1]
6111 * ice_get_link_speed - get integer speed from table
6112 * @index: array index from fls(aq speed) - 1