Lines Matching +full:erratum +full:- +full:a050385
1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0-or-later
3 * Copyright 2008 - 2015 Freescale Semiconductor Inc.
321 u32 fmfp_fcev[4]; /* FPM FMan-Controller Event 1-4 0x20-0x2f */
322 u32 res0030[4]; /* res 0x30 - 0x3f */
323 u32 fmfp_cee[4]; /* PM FMan-Controller Event 1-4 0x40-0x4f */
324 u32 res0050[4]; /* res 0x50-0x5f */
333 u32 fmfp_drd[16]; /* FPM Data_Ram Data 0-15 0x80 - 0xbf */
342 u32 fmfp_cev[4]; /* FPM CPU Event 1-4 0xe0-0xef */
343 u32 res00f0[4]; /* res 0xf0-0xff */
344 u32 fmfp_ps[50]; /* FPM Port Status 0x100-0x1c7 */
345 u32 res01c8[14]; /* res 0x1c8-0x1ff */
358 u32 res0230[116]; /* res 0x230 - 0x3ff */
359 u32 fmfp_ts[128]; /* 0x400: FPM Task Status 0x400 - 0x5ff */
360 u32 res0600[0x400 - 384];
367 u32 res000c[5]; /* 0x0c - 0x1f */
371 u32 res002c[5]; /* 0x2c - 0x3f */
372 u32 fmbm_arb[8]; /* BMI Arbitration 0x40 - 0x5f */
373 u32 res0060[12]; /* 0x60 - 0x8f */
374 u32 fmbm_dtc[3]; /* Debug Trap Counter 0x90 - 0x9b */
376 u32 fmbm_dcv[3][4]; /* Debug Compare val 0xa0-0xcf */
377 u32 fmbm_dcm[3][4]; /* Debug Compare Mask 0xd0-0xff */
379 u32 fmbm_pp[63]; /* BMI Port Parameters 0x104 - 0x1ff */
381 u32 fmbm_pfs[63]; /* BMI Port FIFO Size 0x204 - 0x2ff */
383 u32 fmbm_spliodn[63]; /* Port Partition ID 0x304 - 0x3ff */
407 u32 res0050[7]; /* 0x50 - 0x6b */
415 u32 res0088[2]; /* 0x88 - 0x8f */
425 } dbg_traps[3]; /* 0x90 - 0xef */
426 u8 res00f0[0x400 - 0xf0]; /* 0xf0 - 0x3ff */
454 u32 fmdmplr[FMAN_LIODN_TBL / 2]; /* DMA LIODN regs 0x60-0xdf */
455 u32 res00e0[0x400 - 56];
461 u32 res[(0x1000 - 0x848) / 4]; /* 0x848..0xFFF */
550 dev_dbg(fman->dev, "%s: FMan[%d] exception %d\n", in fman_exceptions()
551 __func__, fman->state->fm_id, exception); in fman_exceptions()
561 dev_dbg(fman->dev, "%s: FMan[%d] bus error: port_id[%d]\n", in fman_bus_error()
562 __func__, fman->state->fm_id, port_id); in fman_bus_error()
569 if (fman->intr_mng[id].isr_cb) { in call_mac_isr()
570 fman->intr_mng[id].isr_cb(fman->intr_mng[id].src_handle); in call_mac_isr()
583 sw_port_id = hw_port_id - BASE_TX_PORTID; in hw_port_id_to_sw_port_id()
585 sw_port_id = hw_port_id - BASE_RX_PORTID; in hw_port_id_to_sw_port_id()
607 iowrite32be(tmp, &fpm_rg->fmfp_prc); in set_port_order_restoration()
615 iowrite32be(liodn_ofst, &fman->bmi_regs->fmbm_spliodn[port_id - 1]); in set_port_liodn()
619 tmp = ioread32be(&fman->dma_regs->fmdmplr[port_id / 2]); in set_port_liodn()
627 iowrite32be(tmp, &fman->dma_regs->fmdmplr[port_id / 2]); in set_port_liodn()
634 tmp = ioread32be(&fpm_rg->fm_rcr); in enable_rams_ecc()
636 iowrite32be(tmp | FPM_RAM_IRAM_ECC_EN, &fpm_rg->fm_rcr); in enable_rams_ecc()
639 FPM_RAM_IRAM_ECC_EN, &fpm_rg->fm_rcr); in enable_rams_ecc()
646 tmp = ioread32be(&fpm_rg->fm_rcr); in disable_rams_ecc()
648 iowrite32be(tmp & ~FPM_RAM_IRAM_ECC_EN, &fpm_rg->fm_rcr); in disable_rams_ecc()
651 &fpm_rg->fm_rcr); in disable_rams_ecc()
658 cfg->catastrophic_err = DEFAULT_CATASTROPHIC_ERR; in fman_defconfig()
659 cfg->dma_err = DEFAULT_DMA_ERR; in fman_defconfig()
660 cfg->dma_aid_mode = DEFAULT_AID_MODE; in fman_defconfig()
661 cfg->dma_comm_qtsh_clr_emer = DEFAULT_DMA_COMM_Q_LOW; in fman_defconfig()
662 cfg->dma_comm_qtsh_asrt_emer = DEFAULT_DMA_COMM_Q_HIGH; in fman_defconfig()
663 cfg->dma_cache_override = DEFAULT_CACHE_OVERRIDE; in fman_defconfig()
664 cfg->dma_cam_num_of_entries = DEFAULT_DMA_CAM_NUM_OF_ENTRIES; in fman_defconfig()
665 cfg->dma_dbg_cnt_mode = DEFAULT_DMA_DBG_CNT_MODE; in fman_defconfig()
666 cfg->dma_sos_emergency = DEFAULT_DMA_SOS_EMERGENCY; in fman_defconfig()
667 cfg->dma_watchdog = DEFAULT_DMA_WATCHDOG; in fman_defconfig()
668 cfg->disp_limit_tsh = DEFAULT_DISP_LIMIT; in fman_defconfig()
669 cfg->prs_disp_tsh = DEFAULT_PRS_DISP_TH; in fman_defconfig()
670 cfg->plcr_disp_tsh = DEFAULT_PLCR_DISP_TH; in fman_defconfig()
671 cfg->kg_disp_tsh = DEFAULT_KG_DISP_TH; in fman_defconfig()
672 cfg->bmi_disp_tsh = DEFAULT_BMI_DISP_TH; in fman_defconfig()
673 cfg->qmi_enq_disp_tsh = DEFAULT_QMI_ENQ_DISP_TH; in fman_defconfig()
674 cfg->qmi_deq_disp_tsh = DEFAULT_QMI_DEQ_DISP_TH; in fman_defconfig()
675 cfg->fm_ctl1_disp_tsh = DEFAULT_FM_CTL1_DISP_TH; in fman_defconfig()
676 cfg->fm_ctl2_disp_tsh = DEFAULT_FM_CTL2_DISP_TH; in fman_defconfig()
681 struct fman_dma_regs __iomem *dma_rg = fman->dma_regs; in dma_init()
682 struct fman_cfg *cfg = fman->cfg; in dma_init()
690 iowrite32be(ioread32be(&dma_rg->fmdmsr) | tmp_reg, &dma_rg->fmdmsr); in dma_init()
694 tmp_reg |= cfg->dma_cache_override << DMA_MODE_CACHE_OR_SHIFT; in dma_init()
695 if (cfg->exceptions & EX_DMA_BUS_ERROR) in dma_init()
697 if ((cfg->exceptions & EX_DMA_SYSTEM_WRITE_ECC) | in dma_init()
698 (cfg->exceptions & EX_DMA_READ_ECC) | in dma_init()
699 (cfg->exceptions & EX_DMA_FM_WRITE_ECC)) in dma_init()
701 if (cfg->dma_axi_dbg_num_of_beats) in dma_init()
703 ((cfg->dma_axi_dbg_num_of_beats - 1) in dma_init()
706 tmp_reg |= (((cfg->dma_cam_num_of_entries / DMA_CAM_UNITS) - 1) & in dma_init()
709 tmp_reg |= cfg->dma_dbg_cnt_mode << DMA_MODE_DBG_SHIFT; in dma_init()
710 tmp_reg |= cfg->dma_aid_mode << DMA_MODE_AID_MODE_SHIFT; in dma_init()
712 iowrite32be(tmp_reg, &dma_rg->fmdmmr); in dma_init()
715 tmp_reg = ((u32)cfg->dma_comm_qtsh_asrt_emer << in dma_init()
717 tmp_reg |= (cfg->dma_read_buf_tsh_asrt_emer & in dma_init()
719 tmp_reg |= cfg->dma_write_buf_tsh_asrt_emer & in dma_init()
722 iowrite32be(tmp_reg, &dma_rg->fmdmtr); in dma_init()
725 tmp_reg = ((u32)cfg->dma_comm_qtsh_clr_emer << in dma_init()
727 tmp_reg |= (cfg->dma_read_buf_tsh_clr_emer & in dma_init()
729 tmp_reg |= cfg->dma_write_buf_tsh_clr_emer & in dma_init()
732 iowrite32be(tmp_reg, &dma_rg->fmdmhy); in dma_init()
735 iowrite32be(cfg->dma_sos_emergency, &dma_rg->fmdmsetr); in dma_init()
738 iowrite32be((cfg->dma_watchdog * cfg->clk_freq), &dma_rg->fmdmwcr); in dma_init()
740 iowrite32be(cfg->cam_base_addr, &dma_rg->fmdmebcr); in dma_init()
743 fman->cam_size = in dma_init()
744 (u32)(fman->cfg->dma_cam_num_of_entries * DMA_CAM_SIZEOF_ENTRY); in dma_init()
745 fman->cam_offset = fman_muram_alloc(fman->muram, fman->cam_size); in dma_init()
746 if (IS_ERR_VALUE(fman->cam_offset)) { in dma_init()
747 dev_err(fman->dev, "%s: MURAM alloc for DMA CAM failed\n", in dma_init()
749 return -ENOMEM; in dma_init()
752 if (fman->state->rev_info.major == 2) { in dma_init()
755 fman_muram_free_mem(fman->muram, fman->cam_offset, in dma_init()
756 fman->cam_size); in dma_init()
758 fman->cam_size = fman->cfg->dma_cam_num_of_entries * 72 + 128; in dma_init()
759 fman->cam_offset = fman_muram_alloc(fman->muram, in dma_init()
760 fman->cam_size); in dma_init()
761 if (IS_ERR_VALUE(fman->cam_offset)) { in dma_init()
762 dev_err(fman->dev, "%s: MURAM alloc for DMA CAM failed\n", in dma_init()
764 return -ENOMEM; in dma_init()
767 if (fman->cfg->dma_cam_num_of_entries % 8 || in dma_init()
768 fman->cfg->dma_cam_num_of_entries > 32) { in dma_init()
769 dev_err(fman->dev, "%s: wrong dma_cam_num_of_entries\n", in dma_init()
771 return -EINVAL; in dma_init()
775 fman_muram_offset_to_vbase(fman->muram, in dma_init()
776 fman->cam_offset); in dma_init()
778 (32 - fman->cfg->dma_cam_num_of_entries)) - 1), in dma_init()
782 fman->cfg->cam_base_addr = fman->cam_offset; in dma_init()
794 tmp_reg = (u32)(cfg->disp_limit_tsh << FPM_DISP_LIMIT_SHIFT); in fpm_init()
795 iowrite32be(tmp_reg, &fpm_rg->fmfp_mxd); in fpm_init()
797 tmp_reg = (((u32)cfg->prs_disp_tsh << FPM_THR1_PRS_SHIFT) | in fpm_init()
798 ((u32)cfg->kg_disp_tsh << FPM_THR1_KG_SHIFT) | in fpm_init()
799 ((u32)cfg->plcr_disp_tsh << FPM_THR1_PLCR_SHIFT) | in fpm_init()
800 ((u32)cfg->bmi_disp_tsh << FPM_THR1_BMI_SHIFT)); in fpm_init()
801 iowrite32be(tmp_reg, &fpm_rg->fmfp_dist1); in fpm_init()
804 (((u32)cfg->qmi_enq_disp_tsh << FPM_THR2_QMI_ENQ_SHIFT) | in fpm_init()
805 ((u32)cfg->qmi_deq_disp_tsh << FPM_THR2_QMI_DEQ_SHIFT) | in fpm_init()
806 ((u32)cfg->fm_ctl1_disp_tsh << FPM_THR2_FM_CTL1_SHIFT) | in fpm_init()
807 ((u32)cfg->fm_ctl2_disp_tsh << FPM_THR2_FM_CTL2_SHIFT)); in fpm_init()
808 iowrite32be(tmp_reg, &fpm_rg->fmfp_dist2); in fpm_init()
816 if (cfg->exceptions & EX_FPM_STALL_ON_TASKS) in fpm_init()
818 if (cfg->exceptions & EX_FPM_SINGLE_ECC) in fpm_init()
820 if (cfg->exceptions & EX_FPM_DOUBLE_ECC) in fpm_init()
822 tmp_reg |= (cfg->catastrophic_err << FPM_EV_MASK_CAT_ERR_SHIFT); in fpm_init()
823 tmp_reg |= (cfg->dma_err << FPM_EV_MASK_DMA_ERR_SHIFT); in fpm_init()
828 iowrite32be(tmp_reg, &fpm_rg->fmfp_ee); in fpm_init()
832 iowrite32be(0xFFFFFFFF, &fpm_rg->fmfp_cev[i]); in fpm_init()
834 /* RAM ECC - enable and clear events */ in fpm_init()
841 iowrite32be(tmp_reg, &fpm_rg->fm_rcr); in fpm_init()
844 if (cfg->exceptions & EX_IRAM_ECC) { in fpm_init()
848 if (cfg->exceptions & EX_MURAM_ECC) { in fpm_init()
852 iowrite32be(tmp_reg, &fpm_rg->fm_rie); in fpm_init()
863 tmp_reg = cfg->fifo_base_addr; in bmi_init()
866 tmp_reg |= ((cfg->total_fifo_size / FMAN_BMI_FIFO_UNITS - 1) << in bmi_init()
868 iowrite32be(tmp_reg, &bmi_rg->fmbm_cfg1); in bmi_init()
870 tmp_reg = ((cfg->total_num_of_tasks - 1) & BMI_CFG2_TASKS_MASK) << in bmi_init()
873 iowrite32be(tmp_reg, &bmi_rg->fmbm_cfg2); in bmi_init()
880 BMI_ERR_INTR_EN_DISPATCH_RAM_ECC, &bmi_rg->fmbm_ievr); in bmi_init()
882 if (cfg->exceptions & EX_BMI_LIST_RAM_ECC) in bmi_init()
884 if (cfg->exceptions & EX_BMI_STORAGE_PROFILE_ECC) in bmi_init()
886 if (cfg->exceptions & EX_BMI_STATISTICS_RAM_ECC) in bmi_init()
888 if (cfg->exceptions & EX_BMI_DISPATCH_RAM_ECC) in bmi_init()
890 iowrite32be(tmp_reg, &bmi_rg->fmbm_ier); in bmi_init()
903 &qmi_rg->fmqm_eie); in qmi_init()
905 if (cfg->exceptions & EX_QMI_DEQ_FROM_UNKNOWN_PORTID) in qmi_init()
907 if (cfg->exceptions & EX_QMI_DOUBLE_ECC) in qmi_init()
910 iowrite32be(tmp_reg, &qmi_rg->fmqm_eien); in qmi_init()
914 iowrite32be(QMI_INTR_EN_SINGLE_ECC, &qmi_rg->fmqm_ie); in qmi_init()
915 if (cfg->exceptions & EX_QMI_SINGLE_ECC) in qmi_init()
918 iowrite32be(tmp_reg, &qmi_rg->fmqm_ien); in qmi_init()
924 iowrite32be(HWP_RPIMAC_PEN, &hwp_rg->fmprrpimac); in hwp_init()
933 /* clear&enable global counters - calculate reg and save for later, in enable()
939 cfg_reg |= (cfg->qmi_def_tnums_thresh << 8) | cfg->qmi_def_tnums_thresh; in enable()
941 iowrite32be(BMI_INIT_START, &fman->bmi_regs->fmbm_init); in enable()
943 &fman->qmi_regs->fmqm_gc); in enable()
955 tmp = ioread32be(&fman->dma_regs->fmdmmr); in set_exception()
961 iowrite32be(tmp, &fman->dma_regs->fmdmmr); in set_exception()
966 tmp = ioread32be(&fman->dma_regs->fmdmmr); in set_exception()
971 iowrite32be(tmp, &fman->dma_regs->fmdmmr); in set_exception()
974 tmp = ioread32be(&fman->fpm_regs->fmfp_ee); in set_exception()
979 iowrite32be(tmp, &fman->fpm_regs->fmfp_ee); in set_exception()
982 tmp = ioread32be(&fman->fpm_regs->fmfp_ee); in set_exception()
987 iowrite32be(tmp, &fman->fpm_regs->fmfp_ee); in set_exception()
990 tmp = ioread32be(&fman->fpm_regs->fmfp_ee); in set_exception()
995 iowrite32be(tmp, &fman->fpm_regs->fmfp_ee); in set_exception()
998 tmp = ioread32be(&fman->qmi_regs->fmqm_ien); in set_exception()
1003 iowrite32be(tmp, &fman->qmi_regs->fmqm_ien); in set_exception()
1006 tmp = ioread32be(&fman->qmi_regs->fmqm_eien); in set_exception()
1011 iowrite32be(tmp, &fman->qmi_regs->fmqm_eien); in set_exception()
1014 tmp = ioread32be(&fman->qmi_regs->fmqm_eien); in set_exception()
1019 iowrite32be(tmp, &fman->qmi_regs->fmqm_eien); in set_exception()
1022 tmp = ioread32be(&fman->bmi_regs->fmbm_ier); in set_exception()
1027 iowrite32be(tmp, &fman->bmi_regs->fmbm_ier); in set_exception()
1030 tmp = ioread32be(&fman->bmi_regs->fmbm_ier); in set_exception()
1035 iowrite32be(tmp, &fman->bmi_regs->fmbm_ier); in set_exception()
1038 tmp = ioread32be(&fman->bmi_regs->fmbm_ier); in set_exception()
1043 iowrite32be(tmp, &fman->bmi_regs->fmbm_ier); in set_exception()
1046 tmp = ioread32be(&fman->bmi_regs->fmbm_ier); in set_exception()
1051 iowrite32be(tmp, &fman->bmi_regs->fmbm_ier); in set_exception()
1054 tmp = ioread32be(&fman->fpm_regs->fm_rie); in set_exception()
1057 enable_rams_ecc(fman->fpm_regs); in set_exception()
1064 disable_rams_ecc(fman->fpm_regs); in set_exception()
1067 iowrite32be(tmp, &fman->fpm_regs->fm_rie); in set_exception()
1070 tmp = ioread32be(&fman->fpm_regs->fm_rie); in set_exception()
1073 enable_rams_ecc(fman->fpm_regs); in set_exception()
1080 disable_rams_ecc(fman->fpm_regs); in set_exception()
1083 iowrite32be(tmp, &fman->fpm_regs->fm_rie); in set_exception()
1086 return -EINVAL; in set_exception()
1095 tmp = ioread32be(&fpm_rg->fmfp_ee); in resume()
1101 iowrite32be(tmp, &fpm_rg->fmfp_ee); in resume()
1106 u8 minor = state->rev_info.minor; in fill_soc_specific_params()
1107 /* P4080 - Major 2 in fill_soc_specific_params()
1108 * P2041/P3041/P5020/P5040 - Major 3 in fill_soc_specific_params()
1109 * Tx/Bx - Major 6 in fill_soc_specific_params()
1111 switch (state->rev_info.major) { in fill_soc_specific_params()
1113 state->bmi_max_fifo_size = 160 * 1024; in fill_soc_specific_params()
1114 state->fm_iram_size = 64 * 1024; in fill_soc_specific_params()
1115 state->dma_thresh_max_commq = 31; in fill_soc_specific_params()
1116 state->dma_thresh_max_buf = 127; in fill_soc_specific_params()
1117 state->qmi_max_num_of_tnums = 64; in fill_soc_specific_params()
1118 state->qmi_def_tnums_thresh = 48; in fill_soc_specific_params()
1119 state->bmi_max_num_of_tasks = 128; in fill_soc_specific_params()
1120 state->max_num_of_open_dmas = 32; in fill_soc_specific_params()
1121 state->fm_port_num_of_cg = 256; in fill_soc_specific_params()
1122 state->num_of_rx_ports = 6; in fill_soc_specific_params()
1123 state->total_fifo_size = 136 * 1024; in fill_soc_specific_params()
1127 state->bmi_max_fifo_size = 160 * 1024; in fill_soc_specific_params()
1128 state->fm_iram_size = 64 * 1024; in fill_soc_specific_params()
1129 state->dma_thresh_max_commq = 31; in fill_soc_specific_params()
1130 state->dma_thresh_max_buf = 127; in fill_soc_specific_params()
1131 state->qmi_max_num_of_tnums = 64; in fill_soc_specific_params()
1132 state->qmi_def_tnums_thresh = 48; in fill_soc_specific_params()
1133 state->bmi_max_num_of_tasks = 128; in fill_soc_specific_params()
1134 state->max_num_of_open_dmas = 32; in fill_soc_specific_params()
1135 state->fm_port_num_of_cg = 256; in fill_soc_specific_params()
1136 state->num_of_rx_ports = 5; in fill_soc_specific_params()
1137 state->total_fifo_size = 100 * 1024; in fill_soc_specific_params()
1141 state->dma_thresh_max_commq = 83; in fill_soc_specific_params()
1142 state->dma_thresh_max_buf = 127; in fill_soc_specific_params()
1143 state->qmi_max_num_of_tnums = 64; in fill_soc_specific_params()
1144 state->qmi_def_tnums_thresh = 32; in fill_soc_specific_params()
1145 state->fm_port_num_of_cg = 256; in fill_soc_specific_params()
1149 state->bmi_max_fifo_size = 192 * 1024; in fill_soc_specific_params()
1150 state->bmi_max_num_of_tasks = 64; in fill_soc_specific_params()
1151 state->max_num_of_open_dmas = 32; in fill_soc_specific_params()
1152 state->num_of_rx_ports = 5; in fill_soc_specific_params()
1154 state->fm_iram_size = 32 * 1024; in fill_soc_specific_params()
1156 state->fm_iram_size = 64 * 1024; in fill_soc_specific_params()
1157 state->total_fifo_size = 156 * 1024; in fill_soc_specific_params()
1161 state->bmi_max_fifo_size = 384 * 1024; in fill_soc_specific_params()
1162 state->fm_iram_size = 64 * 1024; in fill_soc_specific_params()
1163 state->bmi_max_num_of_tasks = 128; in fill_soc_specific_params()
1164 state->max_num_of_open_dmas = 84; in fill_soc_specific_params()
1165 state->num_of_rx_ports = 8; in fill_soc_specific_params()
1166 state->total_fifo_size = 295 * 1024; in fill_soc_specific_params()
1169 return -EINVAL; in fill_soc_specific_params()
1175 return -EINVAL; in fill_soc_specific_params()
1192 if (fman->cam_offset) in free_init_resources()
1193 fman_muram_free_mem(fman->muram, fman->cam_offset, in free_init_resources()
1194 fman->cam_size); in free_init_resources()
1195 if (fman->fifo_offset) in free_init_resources()
1196 fman_muram_free_mem(fman->muram, fman->fifo_offset, in free_init_resources()
1197 fman->fifo_size); in free_init_resources()
1203 struct fman_bmi_regs __iomem *bmi_rg = fman->bmi_regs; in bmi_err_event()
1206 event = ioread32be(&bmi_rg->fmbm_ievr); in bmi_err_event()
1207 mask = ioread32be(&bmi_rg->fmbm_ier); in bmi_err_event()
1210 force = ioread32be(&bmi_rg->fmbm_ifr); in bmi_err_event()
1212 iowrite32be(force & ~event, &bmi_rg->fmbm_ifr); in bmi_err_event()
1214 iowrite32be(event, &bmi_rg->fmbm_ievr); in bmi_err_event()
1217 ret = fman->exception_cb(fman, FMAN_EX_BMI_STORAGE_PROFILE_ECC); in bmi_err_event()
1219 ret = fman->exception_cb(fman, FMAN_EX_BMI_LIST_RAM_ECC); in bmi_err_event()
1221 ret = fman->exception_cb(fman, FMAN_EX_BMI_STATISTICS_RAM_ECC); in bmi_err_event()
1223 ret = fman->exception_cb(fman, FMAN_EX_BMI_DISPATCH_RAM_ECC); in bmi_err_event()
1231 struct fman_qmi_regs __iomem *qmi_rg = fman->qmi_regs; in qmi_err_event()
1234 event = ioread32be(&qmi_rg->fmqm_eie); in qmi_err_event()
1235 mask = ioread32be(&qmi_rg->fmqm_eien); in qmi_err_event()
1239 force = ioread32be(&qmi_rg->fmqm_eif); in qmi_err_event()
1241 iowrite32be(force & ~event, &qmi_rg->fmqm_eif); in qmi_err_event()
1243 iowrite32be(event, &qmi_rg->fmqm_eie); in qmi_err_event()
1246 ret = fman->exception_cb(fman, FMAN_EX_QMI_DOUBLE_ECC); in qmi_err_event()
1248 ret = fman->exception_cb(fman, in qmi_err_event()
1259 struct fman_dma_regs __iomem *dma_rg = fman->dma_regs; in dma_err_event()
1262 status = ioread32be(&dma_rg->fmdmsr); in dma_err_event()
1263 mask = ioread32be(&dma_rg->fmdmmr); in dma_err_event()
1277 iowrite32be(status, &dma_rg->fmdmsr); in dma_err_event()
1282 addr = (u64)ioread32be(&dma_rg->fmdmtal); in dma_err_event()
1283 addr |= ((u64)(ioread32be(&dma_rg->fmdmtah)) << 32); in dma_err_event()
1285 com_id = ioread32be(&dma_rg->fmdmtcid); in dma_err_event()
1289 hw_port_id_to_sw_port_id(fman->state->rev_info.major, port_id); in dma_err_event()
1293 ret = fman->bus_error_cb(fman, relative_port_id, addr, tnum, in dma_err_event()
1297 ret = fman->exception_cb(fman, FMAN_EX_DMA_SINGLE_PORT_ECC); in dma_err_event()
1299 ret = fman->exception_cb(fman, FMAN_EX_DMA_READ_ECC); in dma_err_event()
1301 ret = fman->exception_cb(fman, FMAN_EX_DMA_SYSTEM_WRITE_ECC); in dma_err_event()
1303 ret = fman->exception_cb(fman, FMAN_EX_DMA_FM_WRITE_ECC); in dma_err_event()
1311 struct fman_fpm_regs __iomem *fpm_rg = fman->fpm_regs; in fpm_err_event()
1314 event = ioread32be(&fpm_rg->fmfp_ee); in fpm_err_event()
1316 iowrite32be(event, &fpm_rg->fmfp_ee); in fpm_err_event()
1320 ret = fman->exception_cb(fman, FMAN_EX_FPM_DOUBLE_ECC); in fpm_err_event()
1322 ret = fman->exception_cb(fman, FMAN_EX_FPM_STALL_ON_TASKS); in fpm_err_event()
1325 ret = fman->exception_cb(fman, FMAN_EX_FPM_SINGLE_ECC); in fpm_err_event()
1333 struct fman_fpm_regs __iomem *fpm_rg = fman->fpm_regs; in muram_err_intr()
1336 event = ioread32be(&fpm_rg->fm_rcr); in muram_err_intr()
1337 mask = ioread32be(&fpm_rg->fm_rie); in muram_err_intr()
1340 iowrite32be(event & ~FPM_RAM_IRAM_ECC, &fpm_rg->fm_rcr); in muram_err_intr()
1343 ret = fman->exception_cb(fman, FMAN_EX_MURAM_ECC); in muram_err_intr()
1351 struct fman_qmi_regs __iomem *qmi_rg = fman->qmi_regs; in qmi_event()
1354 event = ioread32be(&qmi_rg->fmqm_ie); in qmi_event()
1355 mask = ioread32be(&qmi_rg->fmqm_ien); in qmi_event()
1358 force = ioread32be(&qmi_rg->fmqm_if); in qmi_event()
1360 iowrite32be(force & ~event, &qmi_rg->fmqm_if); in qmi_event()
1362 iowrite32be(event, &qmi_rg->fmqm_ie); in qmi_event()
1365 ret = fman->exception_cb(fman, FMAN_EX_QMI_SINGLE_ECC); in qmi_event()
1372 struct fman_fpm_regs __iomem *fpm_rg = fman->fpm_regs; in enable_time_stamp()
1373 u16 fm_clk_freq = fman->state->fm_clk_freq; in enable_time_stamp()
1376 ts_freq = (u32)(1 << fman->state->count1_micro_bit); in enable_time_stamp()
1391 frac = ((ts_freq << 16) - (intgr << 16) * fm_clk_freq) / fm_clk_freq; in enable_time_stamp()
1393 if (((ts_freq << 16) - (intgr << 16) * fm_clk_freq) % fm_clk_freq) in enable_time_stamp()
1397 iowrite32be(tmp, &fpm_rg->fmfp_tsc2); in enable_time_stamp()
1400 iowrite32be(FPM_TS_CTL_EN, &fpm_rg->fmfp_tsc1); in enable_time_stamp()
1401 fman->state->enabled_time_stamp = true; in enable_time_stamp()
1409 iram = fman->base_addr + IMEM_OFFSET; in clear_iram()
1411 /* Enable the auto-increment */ in clear_iram()
1412 iowrite32be(IRAM_IADD_AIE, &iram->iadd); in clear_iram()
1416 } while ((ioread32be(&iram->iadd) != IRAM_IADD_AIE) && --count); in clear_iram()
1418 return -EBUSY; in clear_iram()
1420 for (i = 0; i < (fman->state->fm_iram_size / 4); i++) in clear_iram()
1421 iowrite32be(0xffffffff, &iram->idata); in clear_iram()
1423 iowrite32be(fman->state->fm_iram_size - 4, &iram->iadd); in clear_iram()
1427 } while ((ioread32be(&iram->idata) != 0xffffffff) && --count); in clear_iram()
1429 return -EBUSY; in clear_iram()
1527 struct fman_bmi_regs __iomem *bmi_rg = fman->bmi_regs; in set_size_of_fifo()
1536 if (extra_fifo && !fman->state->extra_fifo_pool_size) in set_size_of_fifo()
1537 fman->state->extra_fifo_pool_size = in set_size_of_fifo()
1538 fman->state->num_of_rx_ports * FMAN_BMI_FIFO_UNITS; in set_size_of_fifo()
1540 fman->state->extra_fifo_pool_size = in set_size_of_fifo()
1541 max(fman->state->extra_fifo_pool_size, extra_fifo); in set_size_of_fifo()
1544 if ((fman->state->accumulated_fifo_size + fifo) > in set_size_of_fifo()
1545 (fman->state->total_fifo_size - in set_size_of_fifo()
1546 fman->state->extra_fifo_pool_size)) { in set_size_of_fifo()
1547 dev_err(fman->dev, "%s: Requested fifo size and extra size exceed total FIFO size.\n", in set_size_of_fifo()
1549 return -EAGAIN; in set_size_of_fifo()
1553 tmp = (fifo / FMAN_BMI_FIFO_UNITS - 1) | in set_size_of_fifo()
1556 iowrite32be(tmp, &bmi_rg->fmbm_pfs[port_id - 1]); in set_size_of_fifo()
1559 fman->state->accumulated_fifo_size += fifo; in set_size_of_fifo()
1567 struct fman_bmi_regs __iomem *bmi_rg = fman->bmi_regs; in set_num_of_tasks()
1573 fman->state->extra_tasks_pool_size = in set_num_of_tasks()
1574 max(fman->state->extra_tasks_pool_size, extra_tasks); in set_num_of_tasks()
1577 if ((fman->state->accumulated_num_of_tasks + tasks) > in set_num_of_tasks()
1578 (fman->state->total_num_of_tasks - in set_num_of_tasks()
1579 fman->state->extra_tasks_pool_size)) { in set_num_of_tasks()
1580 …dev_err(fman->dev, "%s: Requested num_of_tasks and extra tasks pool for fm%d exceed total num_of_t… in set_num_of_tasks()
1581 __func__, fman->state->fm_id); in set_num_of_tasks()
1582 return -EAGAIN; in set_num_of_tasks()
1585 fman->state->accumulated_num_of_tasks += tasks; in set_num_of_tasks()
1588 tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]) & in set_num_of_tasks()
1590 tmp |= ((u32)((tasks - 1) << BMI_NUM_OF_TASKS_SHIFT) | in set_num_of_tasks()
1592 iowrite32be(tmp, &bmi_rg->fmbm_pp[port_id - 1]); in set_num_of_tasks()
1601 struct fman_bmi_regs __iomem *bmi_rg = fman->bmi_regs; in set_num_of_open_dmas()
1611 tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]); in set_num_of_open_dmas()
1615 tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]); in set_num_of_open_dmas()
1623 fman->state->extra_open_dmas_pool_size = in set_num_of_open_dmas()
1624 (u8)max(fman->state->extra_open_dmas_pool_size, in set_num_of_open_dmas()
1626 fman->state->accumulated_num_of_open_dmas += current_val; in set_num_of_open_dmas()
1633 fman->state->extra_open_dmas_pool_size = in set_num_of_open_dmas()
1634 (u8)max(fman->state->extra_open_dmas_pool_size, in set_num_of_open_dmas()
1637 if ((fman->state->rev_info.major < 6) && in set_num_of_open_dmas()
1638 (fman->state->accumulated_num_of_open_dmas - current_val + in set_num_of_open_dmas()
1639 open_dmas > fman->state->max_num_of_open_dmas)) { in set_num_of_open_dmas()
1640 dev_err(fman->dev, "%s: Requested num_of_open_dmas for fm%d exceeds total num_of_open_dmas.\n", in set_num_of_open_dmas()
1641 __func__, fman->state->fm_id); in set_num_of_open_dmas()
1642 return -EAGAIN; in set_num_of_open_dmas()
1643 } else if ((fman->state->rev_info.major >= 6) && in set_num_of_open_dmas()
1644 !((fman->state->rev_info.major == 6) && in set_num_of_open_dmas()
1645 (fman->state->rev_info.minor == 0)) && in set_num_of_open_dmas()
1646 (fman->state->accumulated_num_of_open_dmas - in set_num_of_open_dmas()
1648 fman->state->dma_thresh_max_commq + 1)) { in set_num_of_open_dmas()
1649 dev_err(fman->dev, "%s: Requested num_of_open_dmas for fm%d exceeds DMA Command queue (%d)\n", in set_num_of_open_dmas()
1650 __func__, fman->state->fm_id, in set_num_of_open_dmas()
1651 fman->state->dma_thresh_max_commq + 1); in set_num_of_open_dmas()
1652 return -EAGAIN; in set_num_of_open_dmas()
1655 WARN_ON(fman->state->accumulated_num_of_open_dmas < current_val); in set_num_of_open_dmas()
1657 fman->state->accumulated_num_of_open_dmas -= current_val; in set_num_of_open_dmas()
1658 fman->state->accumulated_num_of_open_dmas += open_dmas; in set_num_of_open_dmas()
1660 if (fman->state->rev_info.major < 6) in set_num_of_open_dmas()
1662 (u8)(fman->state->accumulated_num_of_open_dmas + in set_num_of_open_dmas()
1663 fman->state->extra_open_dmas_pool_size); in set_num_of_open_dmas()
1666 tmp = ioread32be(&bmi_rg->fmbm_pp[port_id - 1]) & in set_num_of_open_dmas()
1668 tmp |= (u32)(((open_dmas - 1) << BMI_NUM_OF_DMAS_SHIFT) | in set_num_of_open_dmas()
1670 iowrite32be(tmp, &bmi_rg->fmbm_pp[port_id - 1]); in set_num_of_open_dmas()
1676 tmp = ioread32be(&bmi_rg->fmbm_cfg2) & ~BMI_CFG2_DMAS_MASK; in set_num_of_open_dmas()
1677 tmp |= (u32)(total_num_dmas - 1) << BMI_CFG2_DMAS_SHIFT; in set_num_of_open_dmas()
1678 iowrite32be(tmp, &bmi_rg->fmbm_cfg2); in set_num_of_open_dmas()
1689 base_addr = fman->dts_params.base_addr; in fman_config()
1691 fman->state = kzalloc(sizeof(*fman->state), GFP_KERNEL); in fman_config()
1692 if (!fman->state) in fman_config()
1696 fman->cfg = kzalloc(sizeof(*fman->cfg), GFP_KERNEL); in fman_config()
1697 if (!fman->cfg) in fman_config()
1701 fman->muram = in fman_config()
1702 fman_muram_init(fman->dts_params.muram_res.start, in fman_config()
1703 resource_size(&fman->dts_params.muram_res)); in fman_config()
1704 if (!fman->muram) in fman_config()
1708 fman->state->fm_id = fman->dts_params.id; in fman_config()
1709 fman->state->fm_clk_freq = fman->dts_params.clk_freq; in fman_config()
1710 fman->state->qman_channel_base = fman->dts_params.qman_channel_base; in fman_config()
1711 fman->state->num_of_qman_channels = in fman_config()
1712 fman->dts_params.num_of_qman_channels; in fman_config()
1713 fman->state->res = fman->dts_params.res; in fman_config()
1714 fman->exception_cb = fman_exceptions; in fman_config()
1715 fman->bus_error_cb = fman_bus_error; in fman_config()
1716 fman->fpm_regs = base_addr + FPM_OFFSET; in fman_config()
1717 fman->bmi_regs = base_addr + BMI_OFFSET; in fman_config()
1718 fman->qmi_regs = base_addr + QMI_OFFSET; in fman_config()
1719 fman->dma_regs = base_addr + DMA_OFFSET; in fman_config()
1720 fman->hwp_regs = base_addr + HWP_OFFSET; in fman_config()
1721 fman->kg_regs = base_addr + KG_OFFSET; in fman_config()
1722 fman->base_addr = base_addr; in fman_config()
1724 spin_lock_init(&fman->spinlock); in fman_config()
1725 fman_defconfig(fman->cfg); in fman_config()
1727 fman->state->extra_fifo_pool_size = 0; in fman_config()
1728 fman->state->exceptions = (EX_DMA_BUS_ERROR | in fman_config()
1745 fman_get_revision(fman, &fman->state->rev_info); in fman_config()
1747 err = fill_soc_specific_params(fman->state); in fman_config()
1752 if (fman->state->rev_info.major >= 6) in fman_config()
1753 fman->cfg->dma_aid_mode = FMAN_DMA_AID_OUT_PORT_ID; in fman_config()
1755 fman->cfg->qmi_def_tnums_thresh = fman->state->qmi_def_tnums_thresh; in fman_config()
1757 fman->state->total_num_of_tasks = in fman_config()
1758 (u8)DFLT_TOTAL_NUM_OF_TASKS(fman->state->rev_info.major, in fman_config()
1759 fman->state->rev_info.minor, in fman_config()
1760 fman->state->bmi_max_num_of_tasks); in fman_config()
1762 if (fman->state->rev_info.major < 6) { in fman_config()
1763 fman->cfg->dma_comm_qtsh_clr_emer = in fman_config()
1764 (u8)DFLT_DMA_COMM_Q_LOW(fman->state->rev_info.major, in fman_config()
1765 fman->state->dma_thresh_max_commq); in fman_config()
1767 fman->cfg->dma_comm_qtsh_asrt_emer = in fman_config()
1768 (u8)DFLT_DMA_COMM_Q_HIGH(fman->state->rev_info.major, in fman_config()
1769 fman->state->dma_thresh_max_commq); in fman_config()
1771 fman->cfg->dma_cam_num_of_entries = in fman_config()
1772 DFLT_DMA_CAM_NUM_OF_ENTRIES(fman->state->rev_info.major); in fman_config()
1774 fman->cfg->dma_read_buf_tsh_clr_emer = in fman_config()
1775 DFLT_DMA_READ_INT_BUF_LOW(fman->state->dma_thresh_max_buf); in fman_config()
1777 fman->cfg->dma_read_buf_tsh_asrt_emer = in fman_config()
1778 DFLT_DMA_READ_INT_BUF_HIGH(fman->state->dma_thresh_max_buf); in fman_config()
1780 fman->cfg->dma_write_buf_tsh_clr_emer = in fman_config()
1781 DFLT_DMA_WRITE_INT_BUF_LOW(fman->state->dma_thresh_max_buf); in fman_config()
1783 fman->cfg->dma_write_buf_tsh_asrt_emer = in fman_config()
1784 DFLT_DMA_WRITE_INT_BUF_HIGH(fman->state->dma_thresh_max_buf); in fman_config()
1786 fman->cfg->dma_axi_dbg_num_of_beats = in fman_config()
1793 kfree(fman->cfg); in fman_config()
1795 kfree(fman->state); in fman_config()
1798 return -EINVAL; in fman_config()
1806 if (fman->state->rev_info.major < 6) { in fman_reset()
1807 iowrite32be(FPM_RSTC_FM_RESET, &fman->fpm_regs->fm_rstc); in fman_reset()
1812 } while (((ioread32be(&fman->fpm_regs->fm_rstc)) & in fman_reset()
1813 FPM_RSTC_FM_RESET) && --count); in fman_reset()
1815 err = -EBUSY; in fman_reset()
1827 "fsl,qoriq-device-config-2.0"); in fman_reset()
1829 dev_err(fman->dev, "%s: Couldn't find guts node\n", in fman_reset()
1836 dev_err(fman->dev, "%s: Couldn't map %pOF regs\n", in fman_reset()
1843 devdisr2 = ioread32be(&guts_regs->devdisr2); in fman_reset()
1844 if (fman->dts_params.id == 0) in fman_reset()
1850 iowrite32be(reg, &guts_regs->devdisr2); in fman_reset()
1854 iowrite32be(FPM_RSTC_FM_RESET, &fman->fpm_regs->fm_rstc); in fman_reset()
1860 } while (((ioread32be(&fman->fpm_regs->fm_rstc)) & in fman_reset()
1861 FPM_RSTC_FM_RESET) && --count); in fman_reset()
1867 err = -EBUSY; in fman_reset()
1873 iowrite32be(devdisr2, &guts_regs->devdisr2); in fman_reset()
1885 dev_dbg(fman->dev, "%s: Didn't perform FManV3 reset due to Errata A007273!\n", in fman_reset()
1898 if (is_init_done(fman->cfg)) in fman_init()
1899 return -EINVAL; in fman_init()
1901 fman->state->count1_micro_bit = FM_TIMESTAMP_1_USEC_BIT; in fman_init()
1903 cfg = fman->cfg; in fman_init()
1905 /* clear revision-dependent non existing exception */ in fman_init()
1906 if (fman->state->rev_info.major < 6) in fman_init()
1907 fman->state->exceptions &= ~FMAN_EX_BMI_DISPATCH_RAM_ECC; in fman_init()
1909 if (fman->state->rev_info.major >= 6) in fman_init()
1910 fman->state->exceptions &= ~FMAN_EX_QMI_SINGLE_ECC; in fman_init()
1913 memset_io((void __iomem *)(fman->base_addr + CGP_OFFSET), 0, in fman_init()
1914 fman->state->fm_port_num_of_cg); in fman_init()
1917 * Skipping non-existent port 0 (i = 1) in fman_init()
1922 fman->liodn_offset[i] = in fman_init()
1923 ioread32be(&fman->bmi_regs->fmbm_spliodn[i - 1]); in fman_init()
1926 liodn_base = ioread32be(&fman->dma_regs->fmdmplr[i / 2]); in fman_init()
1935 fman->liodn_base[i] = liodn_base; in fman_init()
1942 if (ioread32be(&fman->qmi_regs->fmqm_gs) & QMI_GS_HALT_NOT_BUSY) { in fman_init()
1943 resume(fman->fpm_regs); in fman_init()
1948 } while (((ioread32be(&fman->qmi_regs->fmqm_gs)) & in fman_init()
1949 QMI_GS_HALT_NOT_BUSY) && --count); in fman_init()
1951 dev_warn(fman->dev, "%s: QMI is in halt not busy state\n", in fman_init()
1956 return -EINVAL; in fman_init()
1958 cfg->exceptions = fman->state->exceptions; in fman_init()
1969 fpm_init(fman->fpm_regs, fman->cfg); in fman_init()
1973 fman->fifo_offset = fman_muram_alloc(fman->muram, in fman_init()
1974 fman->state->total_fifo_size); in fman_init()
1975 if (IS_ERR_VALUE(fman->fifo_offset)) { in fman_init()
1977 dev_err(fman->dev, "%s: MURAM alloc for BMI FIFO failed\n", in fman_init()
1979 return -ENOMEM; in fman_init()
1982 cfg->fifo_base_addr = fman->fifo_offset; in fman_init()
1983 cfg->total_fifo_size = fman->state->total_fifo_size; in fman_init()
1984 cfg->total_num_of_tasks = fman->state->total_num_of_tasks; in fman_init()
1985 cfg->clk_freq = fman->state->fm_clk_freq; in fman_init()
1988 bmi_init(fman->bmi_regs, fman->cfg); in fman_init()
1991 qmi_init(fman->qmi_regs, fman->cfg); in fman_init()
1994 hwp_init(fman->hwp_regs); in fman_init()
1997 fman->keygen = keygen_init(fman->kg_regs); in fman_init()
1998 if (!fman->keygen) in fman_init()
1999 return -EINVAL; in fman_init()
2007 kfree(fman->cfg); in fman_init()
2008 fman->cfg = NULL; in fman_init()
2018 if (!is_init_done(fman->cfg)) in fman_set_exception()
2019 return -EINVAL; in fman_set_exception()
2024 fman->state->exceptions |= bit_mask; in fman_set_exception()
2026 fman->state->exceptions &= ~bit_mask; in fman_set_exception()
2028 dev_err(fman->dev, "%s: Undefined exception (%d)\n", in fman_set_exception()
2030 return -EINVAL; in fman_set_exception()
2059 fman->intr_mng[event].isr_cb = isr_cb; in fman_register_intr()
2060 fman->intr_mng[event].src_handle = src_arg; in fman_register_intr()
2083 fman->intr_mng[event].isr_cb = NULL; in fman_unregister_intr()
2084 fman->intr_mng[event].src_handle = NULL; in fman_unregister_intr()
2102 u8 port_id = port_params->port_id, mac_id; in fman_set_port_params()
2104 spin_lock_irqsave(&fman->spinlock, flags); in fman_set_port_params()
2106 err = set_num_of_tasks(fman, port_params->port_id, in fman_set_port_params()
2107 &port_params->num_of_tasks, in fman_set_port_params()
2108 &port_params->num_of_extra_tasks); in fman_set_port_params()
2113 if (port_params->port_type != FMAN_PORT_TYPE_RX) { in fman_set_port_params()
2117 fman->state->accumulated_num_of_deq_tnums += in fman_set_port_params()
2118 port_params->deq_pipeline_depth; in fman_set_port_params()
2119 enq_th = (ioread32be(&fman->qmi_regs->fmqm_gc) & in fman_set_port_params()
2124 if (enq_th >= (fman->state->qmi_max_num_of_tnums - in fman_set_port_params()
2125 fman->state->accumulated_num_of_deq_tnums)) { in fman_set_port_params()
2127 fman->state->qmi_max_num_of_tnums - in fman_set_port_params()
2128 fman->state->accumulated_num_of_deq_tnums - 1; in fman_set_port_params()
2130 reg = ioread32be(&fman->qmi_regs->fmqm_gc); in fman_set_port_params()
2133 iowrite32be(reg, &fman->qmi_regs->fmqm_gc); in fman_set_port_params()
2136 deq_th = ioread32be(&fman->qmi_regs->fmqm_gc) & in fman_set_port_params()
2141 * (fman->state->qmi_max_num_of_tnums-1). in fman_set_port_params()
2143 if ((deq_th <= fman->state->accumulated_num_of_deq_tnums) && in fman_set_port_params()
2144 (deq_th < fman->state->qmi_max_num_of_tnums - 1)) { in fman_set_port_params()
2145 deq_th = fman->state->accumulated_num_of_deq_tnums + 1; in fman_set_port_params()
2146 reg = ioread32be(&fman->qmi_regs->fmqm_gc); in fman_set_port_params()
2149 iowrite32be(reg, &fman->qmi_regs->fmqm_gc); in fman_set_port_params()
2153 err = set_size_of_fifo(fman, port_params->port_id, in fman_set_port_params()
2154 &port_params->size_of_fifo, in fman_set_port_params()
2155 &port_params->extra_size_of_fifo); in fman_set_port_params()
2159 err = set_num_of_open_dmas(fman, port_params->port_id, in fman_set_port_params()
2160 &port_params->num_of_open_dmas, in fman_set_port_params()
2161 &port_params->num_of_extra_open_dmas); in fman_set_port_params()
2165 set_port_liodn(fman, port_id, fman->liodn_base[port_id], in fman_set_port_params()
2166 fman->liodn_offset[port_id]); in fman_set_port_params()
2168 if (fman->state->rev_info.major < 6) in fman_set_port_params()
2169 set_port_order_restoration(fman->fpm_regs, port_id); in fman_set_port_params()
2171 mac_id = hw_port_id_to_sw_port_id(fman->state->rev_info.major, port_id); in fman_set_port_params()
2173 if (port_params->max_frame_length >= fman->state->mac_mfl[mac_id]) { in fman_set_port_params()
2174 fman->state->port_mfl[mac_id] = port_params->max_frame_length; in fman_set_port_params()
2176 dev_warn(fman->dev, "%s: Port (%d) max_frame_length is smaller than MAC (%d) current MTU\n", in fman_set_port_params()
2178 err = -EINVAL; in fman_set_port_params()
2182 spin_unlock_irqrestore(&fman->spinlock, flags); in fman_set_port_params()
2187 spin_unlock_irqrestore(&fman->spinlock, flags); in fman_set_port_params()
2203 struct fman_fpm_regs __iomem *fpm_rg = fman->fpm_regs; in fman_reset_mac()
2206 if (fman->state->rev_info.major >= 6) { in fman_reset_mac()
2207 dev_err(fman->dev, "%s: FMan MAC reset no available for FMan V3!\n", in fman_reset_mac()
2209 return -EINVAL; in fman_reset_mac()
2245 dev_warn(fman->dev, "%s: Illegal MAC Id [%d]\n", in fman_reset_mac()
2247 return -EINVAL; in fman_reset_mac()
2251 iowrite32be(msk, &fpm_rg->fm_rstc); in fman_reset_mac()
2252 while ((ioread32be(&fpm_rg->fm_rstc) & msk) && --timeout) in fman_reset_mac()
2256 return -EIO; in fman_reset_mac()
2277 if ((!fman->state->port_mfl[mac_id]) || in fman_set_mac_max_frame()
2278 (mfl <= fman->state->port_mfl[mac_id])) { in fman_set_mac_max_frame()
2279 fman->state->mac_mfl[mac_id] = mfl; in fman_set_mac_max_frame()
2281 dev_warn(fman->dev, "%s: MAC max_frame_length is larger than Port max_frame_length\n", in fman_set_mac_max_frame()
2283 return -EINVAL; in fman_set_mac_max_frame()
2299 return fman->state->fm_clk_freq; in fman_get_clock_freq()
2312 return fman->state->bmi_max_fifo_size; in fman_get_bmi_max_fifo_size()
2318 * @fman: - Pointer to the FMan module
2319 * @rev_info: - A structure of revision information parameters.
2331 tmp = ioread32be(&fman->fpm_regs->fm_ip_rev_1); in fman_get_revision()
2332 rev_info->major = (u8)((tmp & FPM_REV1_MAJOR_MASK) >> in fman_get_revision()
2334 rev_info->minor = tmp & FPM_REV1_MINOR_MASK; in fman_get_revision()
2351 if (fman->state->rev_info.major >= 6) { in fman_get_qman_channel_id()
2357 for (i = 0; i < fman->state->num_of_qman_channels; i++) { in fman_get_qman_channel_id()
2367 for (i = 0; i < fman->state->num_of_qman_channels; i++) { in fman_get_qman_channel_id()
2373 if (i == fman->state->num_of_qman_channels) in fman_get_qman_channel_id()
2376 return fman->state->qman_channel_base + i; in fman_get_qman_channel_id()
2390 return fman->state->res; in fman_get_mem_region()
2395 /* Extra headroom for RX buffers - Default, min and max */
2440 …pr_warn("Invalid fsl_fm_max_frm value (%d) in bootargs, valid range is %d-%d. Falling back to the … in fman_get_max_frm()
2466 …pr_warn("Invalid fsl_fm_rx_extra_headroom value (%d) in bootargs, valid range is %d-%d. Falling ba… in fman_get_rx_extra_headroom()
2513 if (!is_init_done(fman->cfg)) in fman_err_irq()
2516 fpm_rg = fman->fpm_regs; in fman_err_irq()
2519 pending = ioread32be(&fpm_rg->fm_epi); in fman_err_irq()
2611 if (!is_init_done(fman->cfg)) in fman_irq()
2614 fpm_rg = fman->fpm_regs; in fman_irq()
2617 pending = ioread32be(&fpm_rg->fm_npi); in fman_irq()
2684 .compatible = "fsl,fman-muram"},
2702 return ERR_PTR(-ENOMEM); in read_dts_node()
2704 fm_node = of_node_get(of_dev->dev.of_node); in read_dts_node()
2706 err = of_property_read_u32(fm_node, "cell-index", &val); in read_dts_node()
2708 dev_err(&of_dev->dev, "%s: failed to read cell-index for %pOF\n", in read_dts_node()
2712 fman->dts_params.id = (u8)val; in read_dts_node()
2724 fman->dts_params.err_irq = err; in read_dts_node()
2729 dev_err(&of_dev->dev, "%s: Failed to get FM%d clock structure\n", in read_dts_node()
2730 __func__, fman->dts_params.id); in read_dts_node()
2736 err = -EINVAL; in read_dts_node()
2737 dev_err(&of_dev->dev, "%s: Failed to determine FM%d clock rate\n", in read_dts_node()
2738 __func__, fman->dts_params.id); in read_dts_node()
2742 fman->dts_params.clk_freq = DIV_ROUND_UP(clk_rate, 1000000); in read_dts_node()
2744 err = of_property_read_u32_array(fm_node, "fsl,qman-channel-range", in read_dts_node()
2747 dev_err(&of_dev->dev, "%s: failed to read fsl,qman-channel-range for %pOF\n", in read_dts_node()
2751 fman->dts_params.qman_channel_base = range[0]; in read_dts_node()
2752 fman->dts_params.num_of_qman_channels = range[1]; in read_dts_node()
2757 err = -EINVAL; in read_dts_node()
2758 dev_err(&of_dev->dev, "%s: could not find MURAM node\n", in read_dts_node()
2764 &fman->dts_params.muram_res); in read_dts_node()
2767 dev_err(&of_dev->dev, "%s: of_address_to_resource() = %d\n", in read_dts_node()
2774 err = devm_request_irq(&of_dev->dev, irq, fman_irq, IRQF_SHARED, in read_dts_node()
2777 dev_err(&of_dev->dev, "%s: irq %d allocation failed (error = %d)\n", in read_dts_node()
2782 if (fman->dts_params.err_irq != 0) { in read_dts_node()
2783 err = devm_request_irq(&of_dev->dev, fman->dts_params.err_irq, in read_dts_node()
2785 "fman-err", fman); in read_dts_node()
2787 dev_err(&of_dev->dev, "%s: irq %d allocation failed (error = %d)\n", in read_dts_node()
2788 __func__, fman->dts_params.err_irq, err); in read_dts_node()
2796 dev_err(&of_dev->dev, "%s: devm_ioremap() failed\n", __func__); in read_dts_node()
2800 fman->dts_params.base_addr = base_addr; in read_dts_node()
2801 fman->dts_params.res = res; in read_dts_node()
2803 fman->dev = &of_dev->dev; in read_dts_node()
2805 err = of_platform_populate(fm_node, NULL, NULL, &of_dev->dev); in read_dts_node()
2807 dev_err(&of_dev->dev, "%s: of_platform_populate() failed\n", in read_dts_node()
2814 of_property_read_bool(fm_node, "fsl,erratum-a050385"); in read_dts_node()
2832 dev = &of_dev->dev; in fman_probe()
2841 return -EINVAL; in fman_probe()
2846 return -EINVAL; in fman_probe()
2849 if (fman->dts_params.err_irq == 0) { in fman_probe()
2871 dev_dbg(dev, "FMan%d probed\n", fman->dts_params.id); in fman_probe()
2886 .name = "fsl-fman",