1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3  * This header file defines the register offsets and bit fields
25 #define   ENETC4_TCP_FLAGS_FIN		BIT(0)
26 #define   ENETC4_TCP_FLAGS_SYN		BIT(1)
27 #define   ENETC4_TCP_FLAGS_RST		BIT(2)
28 #define   ENETC4_TCP_FLAGS_PSH		BIT(3)
29 #define   ENETC4_TCP_FLAGS_ACK		BIT(4)
30 #define   ENETC4_TCP_FLAGS_URG		BIT(5)
31 #define   ENETC4_TCP_FLAGS_ECE		BIT(6)
32 #define   ENETC4_TCP_FLAGS_CWR		BIT(7)
33 #define   ENETC4_TCP_FLAGS_NS		BIT(8)
40 #define  ECAPR0_RFS			BIT(2)
41 #define  ECAPR0_TSD			BIT(5)
42 #define  ECAPR0_RSS			BIT(8)
43 #define  ECAPR0_RSC			BIT(9)
44 #define  ECAPR0_LSO			BIT(10)
45 #define  ECAPR0_WO			BIT(13)
53 #define  ECAPR1_NUM_IPV			BIT(31)
60 #define  PMR_SI_EN(a)			BIT((16 + (a)))  argument
68 #define  PSIPMMR_SI_MAC_UP(a)		BIT(a) /* a = SI index */  argument
69 #define  PSIPMMR_SI_MAC_MP(a)		BIT((a) + 16)  argument
87 #define  PSIVLANFMR_VS			BIT(0)
89 /* Port Station interface a primary MAC address registers */
90 #define ENETC4_PSIPMAR0(a)		((a) * 0x80 + 0x2000)  argument
91 #define ENETC4_PSIPMAR1(a)		((a) * 0x80 + 0x2004)  argument
93 /* Port station interface a configuration register 0/2 */
94 #define ENETC4_PSICFGR0(a)		((a) * 0x80 + 0x2010)  argument
95 #define  PSICFGR0_VASE			BIT(13)
96 #define  PSICFGR0_ASE			BIT(15)
99 #define ENETC4_PSICFGR2(a)		((a) * 0x80 + 0x2018)  argument
103 #define  PMCAPR_HD			BIT(8)
108 #define  PCR_HDR_FMT			BIT(0)
109 #define  PCR_L2DOSE			BIT(4)
110 #define  PCR_TIMER_CS			BIT(8)
112 #define  PCR_PSPEED_VAL(speed)		(((speed) / 10 - 1) << 16)
121 /* Port traffic class a transmit maximum SDU register */
122 #define ENETC4_PTCTMSDUR(a)		((a) * 0x20 + 0x4208)  argument
131 #define  PM_CMD_CFG_TX_EN		BIT(0)
132 #define  PM_CMD_CFG_RX_EN		BIT(1)
133 #define  PM_CMD_CFG_PAUSE_FWD		BIT(7)
134 #define  PM_CMD_CFG_PAUSE_IGN		BIT(8)
135 #define  PM_CMD_CFG_TX_ADDR_INS		BIT(9)
136 #define  PM_CMD_CFG_LOOP_EN		BIT(10)
141 #define  PM_CMD_CFG_CNT_FRM_EN		BIT(13)
142 #define  PM_CMD_CFG_TXP			BIT(15)
143 #define  PM_CMD_CFG_SEND_IDLE		BIT(16)
144 #define  PM_CMD_CFG_HD_FCEN		BIT(18)
145 #define  PM_CMD_CFG_SFD			BIT(21)
146 #define  PM_CMD_CFG_TX_FLUSH		BIT(22)
147 #define  PM_CMD_CFG_TX_LOWP_EN		BIT(23)
148 #define  PM_CMD_CFG_RX_LOWP_EMPTY	BIT(24)
149 #define  PM_CMD_CFG_SWR			BIT(26)
150 #define  PM_CMD_CFG_TS_MODE		BIT(30)
151 #define  PM_CMD_CFG_MG			BIT(31)
169 #define  PM_IF_MODE_REVMII		BIT(3)
170 #define  PM_IF_MODE_M10			BIT(4)
171 #define  PM_IF_MODE_HD			BIT(6)
176 #define  PM_IF_MODE_ENA			BIT(15)