569 static void *__retrieve_octeon_config_info(struct octeon_device *oct,  in __retrieve_octeon_config_info()  argument
572 	u32 oct_id = oct->octeon_id;  in __retrieve_octeon_config_info()
577 		if (oct->chip_id == OCTEON_CN66XX) {  in __retrieve_octeon_config_info()
579 		} else if ((oct->chip_id == OCTEON_CN68XX) &&  in __retrieve_octeon_config_info()
582 		} else if ((oct->chip_id == OCTEON_CN68XX) &&  in __retrieve_octeon_config_info()
585 		} else if (oct->chip_id == OCTEON_CN23XX_PF_VID) {  in __retrieve_octeon_config_info()
587 		} else if (oct->chip_id == OCTEON_CN23XX_VF_VID) {  in __retrieve_octeon_config_info()
597 static int __verify_octeon_config_info(struct octeon_device *oct, void *conf)  in __verify_octeon_config_info()  argument
599 	switch (oct->chip_id) {  in __verify_octeon_config_info()
602 		return lio_validate_cn6xxx_config_info(oct, conf);  in __verify_octeon_config_info()
613 void *oct_get_config_info(struct octeon_device *oct, u16 card_type)  in oct_get_config_info()  argument
617 	conf = __retrieve_octeon_config_info(oct, card_type);  in oct_get_config_info()
621 	if (__verify_octeon_config_info(oct, conf)) {  in oct_get_config_info()
622 		dev_err(&oct->pci_dev->dev, "Configuration verification failed\n");  in oct_get_config_info()
646 void octeon_free_device_mem(struct octeon_device *oct)  in octeon_free_device_mem()  argument
650 	for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) {  in octeon_free_device_mem()
651 		if (oct->io_qmask.oq & BIT_ULL(i))  in octeon_free_device_mem()
652 			vfree(oct->droq[i]);  in octeon_free_device_mem()
655 	for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {  in octeon_free_device_mem()
656 		if (oct->io_qmask.iq & BIT_ULL(i))  in octeon_free_device_mem()
657 			vfree(oct->instr_queue[i]);  in octeon_free_device_mem()
660 	i = oct->octeon_id;  in octeon_free_device_mem()
661 	vfree(oct);  in octeon_free_device_mem()
671 	struct octeon_device *oct;  in octeon_allocate_device_mem()  local
711 	oct = (struct octeon_device *)buf;  in octeon_allocate_device_mem()
712 	oct->priv = (void *)(buf + octdevsize);  in octeon_allocate_device_mem()
713 	oct->chip = (void *)(buf + octdevsize + priv_size);  in octeon_allocate_device_mem()
714 	oct->dispatch.dlist = (struct octeon_dispatch *)  in octeon_allocate_device_mem()
717 	return oct;  in octeon_allocate_device_mem()
724 	struct octeon_device *oct = NULL;  in octeon_allocate_device()  local
733 		oct = octeon_allocate_device_mem(pci_id, priv_size);  in octeon_allocate_device()
734 		if (oct) {  in octeon_allocate_device()
736 			octeon_device[oct_idx] = oct;  in octeon_allocate_device()
741 	if (!oct)  in octeon_allocate_device()
744 	spin_lock_init(&oct->pci_win_lock);  in octeon_allocate_device()
745 	spin_lock_init(&oct->mem_access_lock);  in octeon_allocate_device()
747 	oct->octeon_id = oct_idx;  in octeon_allocate_device()
748 	snprintf(oct->device_name, sizeof(oct->device_name),  in octeon_allocate_device()
749 		 "LiquidIO%d", (oct->octeon_id));  in octeon_allocate_device()
751 	return oct;  in octeon_allocate_device()
763 int octeon_register_device(struct octeon_device *oct,  in octeon_register_device()  argument
768 	oct->loc.bus = bus;  in octeon_register_device()
769 	oct->loc.dev = dev;  in octeon_register_device()
770 	oct->loc.func = func;  in octeon_register_device()
772 	oct->adapter_refcount = &adapter_refcounts[oct->octeon_id];  in octeon_register_device()
773 	atomic_set(oct->adapter_refcount, 0);  in octeon_register_device()
776 	oct->adapter_fw_state = &adapter_fw_states[oct->octeon_id];  in octeon_register_device()
777 	atomic_set(oct->adapter_fw_state, FW_NEEDS_TO_BE_LOADED);  in octeon_register_device()
780 	for (idx = (int)oct->octeon_id - 1; idx >= 0; idx--) {  in octeon_register_device()
782 			dev_err(&oct->pci_dev->dev,  in octeon_register_device()
786 			atomic_inc(oct->adapter_refcount);  in octeon_register_device()
794 			oct->adapter_refcount =  in octeon_register_device()
796 			oct->adapter_fw_state =  in octeon_register_device()
803 	atomic_inc(oct->adapter_refcount);  in octeon_register_device()
804 	refcount = atomic_read(oct->adapter_refcount);  in octeon_register_device()
806 	dev_dbg(&oct->pci_dev->dev, "%s: %02x:%02x:%d refcount %u", __func__,  in octeon_register_device()
807 		oct->loc.bus, oct->loc.dev, oct->loc.func, refcount);  in octeon_register_device()
817 int octeon_deregister_device(struct octeon_device *oct)  in octeon_deregister_device()  argument
821 	atomic_dec(oct->adapter_refcount);  in octeon_deregister_device()
822 	refcount = atomic_read(oct->adapter_refcount);  in octeon_deregister_device()
824 	dev_dbg(&oct->pci_dev->dev, "%s: %04d:%02d:%d refcount %u", __func__,  in octeon_deregister_device()
825 		oct->loc.bus, oct->loc.dev, oct->loc.func, refcount);  in octeon_deregister_device()
832 octeon_allocate_ioq_vector(struct octeon_device *oct, u32 num_ioqs)  in octeon_allocate_ioq_vector()  argument
841 	oct->ioq_vector = vzalloc(size);  in octeon_allocate_ioq_vector()
842 	if (!oct->ioq_vector)  in octeon_allocate_ioq_vector()
845 		ioq_vector		= &oct->ioq_vector[i];  in octeon_allocate_ioq_vector()
846 		ioq_vector->oct_dev	= oct;  in octeon_allocate_ioq_vector()
849 		ioq_vector->mbox	= oct->mbox[i];  in octeon_allocate_ioq_vector()
854 		if (oct->chip_id == OCTEON_CN23XX_PF_VID)  in octeon_allocate_ioq_vector()
855 			ioq_vector->ioq_num	= i + oct->sriov_info.pf_srn;  in octeon_allocate_ioq_vector()
865 octeon_free_ioq_vector(struct octeon_device *oct)  in octeon_free_ioq_vector()  argument
867 	vfree(oct->ioq_vector);  in octeon_free_ioq_vector()
872 int octeon_setup_instr_queues(struct octeon_device *oct)  in octeon_setup_instr_queues()  argument
877 	int numa_node = dev_to_node(&oct->pci_dev->dev);  in octeon_setup_instr_queues()
879 	if (OCTEON_CN6XXX(oct))  in octeon_setup_instr_queues()
881 			CFG_GET_NUM_DEF_TX_DESCS(CHIP_CONF(oct, cn6xxx));  in octeon_setup_instr_queues()
882 	else if (OCTEON_CN23XX_PF(oct))  in octeon_setup_instr_queues()
883 		num_descs = CFG_GET_NUM_DEF_TX_DESCS(CHIP_CONF(oct, cn23xx_pf));  in octeon_setup_instr_queues()
884 	else if (OCTEON_CN23XX_VF(oct))  in octeon_setup_instr_queues()
885 		num_descs = CFG_GET_NUM_DEF_TX_DESCS(CHIP_CONF(oct, cn23xx_vf));  in octeon_setup_instr_queues()
887 	oct->num_iqs = 0;  in octeon_setup_instr_queues()
889 	oct->instr_queue[0] = vzalloc_node(sizeof(*oct->instr_queue[0]),  in octeon_setup_instr_queues()
891 	if (!oct->instr_queue[0])  in octeon_setup_instr_queues()
892 		oct->instr_queue[0] =  in octeon_setup_instr_queues()
894 	if (!oct->instr_queue[0])  in octeon_setup_instr_queues()
896 	memset(oct->instr_queue[0], 0, sizeof(struct octeon_instr_queue));  in octeon_setup_instr_queues()
897 	oct->instr_queue[0]->q_index = 0;  in octeon_setup_instr_queues()
898 	oct->instr_queue[0]->app_ctx = (void *)(size_t)0;  in octeon_setup_instr_queues()
899 	oct->instr_queue[0]->ifidx = 0;  in octeon_setup_instr_queues()
902 	txpciq.s.pkind = oct->pfvf_hsword.pkind;  in octeon_setup_instr_queues()
905 	if (octeon_init_instr_queue(oct, txpciq, num_descs)) {  in octeon_setup_instr_queues()
907 		vfree(oct->instr_queue[0]);  in octeon_setup_instr_queues()
908 		oct->instr_queue[0] = NULL;  in octeon_setup_instr_queues()
912 	oct->num_iqs++;  in octeon_setup_instr_queues()
917 int octeon_setup_output_queues(struct octeon_device *oct)  in octeon_setup_output_queues()  argument
922 	int numa_node = dev_to_node(&oct->pci_dev->dev);  in octeon_setup_output_queues()
924 	if (OCTEON_CN6XXX(oct)) {  in octeon_setup_output_queues()
926 			CFG_GET_NUM_DEF_RX_DESCS(CHIP_CONF(oct, cn6xxx));  in octeon_setup_output_queues()
928 			CFG_GET_DEF_RX_BUF_SIZE(CHIP_CONF(oct, cn6xxx));  in octeon_setup_output_queues()
929 	} else if (OCTEON_CN23XX_PF(oct)) {  in octeon_setup_output_queues()
930 		num_descs = CFG_GET_NUM_DEF_RX_DESCS(CHIP_CONF(oct, cn23xx_pf));  in octeon_setup_output_queues()
931 		desc_size = CFG_GET_DEF_RX_BUF_SIZE(CHIP_CONF(oct, cn23xx_pf));  in octeon_setup_output_queues()
932 	} else if (OCTEON_CN23XX_VF(oct)) {  in octeon_setup_output_queues()
933 		num_descs = CFG_GET_NUM_DEF_RX_DESCS(CHIP_CONF(oct, cn23xx_vf));  in octeon_setup_output_queues()
934 		desc_size = CFG_GET_DEF_RX_BUF_SIZE(CHIP_CONF(oct, cn23xx_vf));  in octeon_setup_output_queues()
936 	oct->num_oqs = 0;  in octeon_setup_output_queues()
937 	oct->droq[0] = vzalloc_node(sizeof(*oct->droq[0]), numa_node);  in octeon_setup_output_queues()
938 	if (!oct->droq[0])  in octeon_setup_output_queues()
939 		oct->droq[0] = vzalloc(sizeof(*oct->droq[0]));  in octeon_setup_output_queues()
940 	if (!oct->droq[0])  in octeon_setup_output_queues()
943 	if (octeon_init_droq(oct, oq_no, num_descs, desc_size, NULL)) {  in octeon_setup_output_queues()
944 		vfree(oct->droq[oq_no]);  in octeon_setup_output_queues()
945 		oct->droq[oq_no] = NULL;  in octeon_setup_output_queues()
948 	oct->num_oqs++;  in octeon_setup_output_queues()
954 int octeon_set_io_queues_off(struct octeon_device *oct)  in octeon_set_io_queues_off()  argument
958 	if (OCTEON_CN6XXX(oct)) {  in octeon_set_io_queues_off()
959 		octeon_write_csr(oct, CN6XXX_SLI_PKT_INSTR_ENB, 0);  in octeon_set_io_queues_off()
960 		octeon_write_csr(oct, CN6XXX_SLI_PKT_OUT_ENB, 0);  in octeon_set_io_queues_off()
961 	} else if (oct->chip_id == OCTEON_CN23XX_VF_VID) {  in octeon_set_io_queues_off()
968 		for (q_no = 0; q_no < oct->sriov_info.rings_per_vf; q_no++) {  in octeon_set_io_queues_off()
970 				oct, CN23XX_VF_SLI_IQ_PKT_CONTROL64(q_no));  in octeon_set_io_queues_off()
976 					oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no));  in octeon_set_io_queues_off()
980 				dev_err(&oct->pci_dev->dev,  in octeon_set_io_queues_off()
987 			octeon_write_csr64(oct,  in octeon_set_io_queues_off()
992 					oct, CN23XX_SLI_IQ_PKT_CONTROL64(q_no));  in octeon_set_io_queues_off()
994 				dev_err(&oct->pci_dev->dev,  in octeon_set_io_queues_off()
1004 void octeon_set_droq_pkt_op(struct octeon_device *oct,  in octeon_set_droq_pkt_op()  argument
1011 	if (OCTEON_CN6XXX(oct)) {  in octeon_set_droq_pkt_op()
1012 		reg_val = octeon_read_csr(oct, CN6XXX_SLI_PKT_OUT_ENB);  in octeon_set_droq_pkt_op()
1019 		octeon_write_csr(oct, CN6XXX_SLI_PKT_OUT_ENB, reg_val);  in octeon_set_droq_pkt_op()
1023 int octeon_init_dispatch_list(struct octeon_device *oct)  in octeon_init_dispatch_list()  argument
1027 	oct->dispatch.count = 0;  in octeon_init_dispatch_list()
1030 		oct->dispatch.dlist[i].opcode = 0;  in octeon_init_dispatch_list()
1031 		INIT_LIST_HEAD(&oct->dispatch.dlist[i].list);  in octeon_init_dispatch_list()
1035 		octeon_register_reqtype_free_fn(oct, i, NULL);  in octeon_init_dispatch_list()
1037 	spin_lock_init(&oct->dispatch.lock);  in octeon_init_dispatch_list()
1043 void octeon_delete_dispatch_list(struct octeon_device *oct)  in octeon_delete_dispatch_list()  argument
1050 	spin_lock_bh(&oct->dispatch.lock);  in octeon_delete_dispatch_list()
1055 		dispatch = &oct->dispatch.dlist[i].list;  in octeon_delete_dispatch_list()
1061 		oct->dispatch.dlist[i].opcode = 0;  in octeon_delete_dispatch_list()
1064 	oct->dispatch.count = 0;  in octeon_delete_dispatch_list()
1066 	spin_unlock_bh(&oct->dispatch.lock);  in octeon_delete_dispatch_list()
1134 octeon_register_dispatch_fn(struct octeon_device *oct,  in octeon_register_dispatch_fn()  argument
1145 	spin_lock_bh(&oct->dispatch.lock);  in octeon_register_dispatch_fn()
1147 	if (oct->dispatch.dlist[idx].opcode == 0) {  in octeon_register_dispatch_fn()
1148 		oct->dispatch.dlist[idx].opcode = combined_opcode;  in octeon_register_dispatch_fn()
1149 		oct->dispatch.dlist[idx].dispatch_fn = fn;  in octeon_register_dispatch_fn()
1150 		oct->dispatch.dlist[idx].arg = fn_arg;  in octeon_register_dispatch_fn()
1151 		oct->dispatch.count++;  in octeon_register_dispatch_fn()
1152 		spin_unlock_bh(&oct->dispatch.lock);  in octeon_register_dispatch_fn()
1156 	spin_unlock_bh(&oct->dispatch.lock);  in octeon_register_dispatch_fn()
1161 	pfn = octeon_get_dispatch(oct, opcode, subcode);  in octeon_register_dispatch_fn()
1165 		dev_dbg(&oct->pci_dev->dev,  in octeon_register_dispatch_fn()
1178 		spin_lock_bh(&oct->dispatch.lock);  in octeon_register_dispatch_fn()
1179 		list_add(&dispatch->list, &oct->dispatch.dlist[idx].list);  in octeon_register_dispatch_fn()
1180 		oct->dispatch.count++;  in octeon_register_dispatch_fn()
1181 		spin_unlock_bh(&oct->dispatch.lock);  in octeon_register_dispatch_fn()
1185 		    octeon_get_dispatch_arg(oct, opcode, subcode) == fn_arg)  in octeon_register_dispatch_fn()
1188 		dev_err(&oct->pci_dev->dev,  in octeon_register_dispatch_fn()
1202 	struct octeon_device *oct = (struct octeon_device *)buf;  in octeon_core_drv_init()  local
1207 	if (OCTEON_CN6XXX(oct))  in octeon_core_drv_init()
1209 			CFG_GET_NUM_NIC_PORTS(CHIP_CONF(oct, cn6xxx));  in octeon_core_drv_init()
1210 	else if (OCTEON_CN23XX_PF(oct))  in octeon_core_drv_init()
1212 			CFG_GET_NUM_NIC_PORTS(CHIP_CONF(oct, cn23xx_pf));  in octeon_core_drv_init()
1214 	if (atomic_read(&oct->status) >= OCT_DEV_RUNNING) {  in octeon_core_drv_init()
1215 		dev_err(&oct->pci_dev->dev, "Received CORE OK when device state is 0x%x\n",  in octeon_core_drv_init()
1216 			atomic_read(&oct->status));  in octeon_core_drv_init()
1224 	oct->app_mode = (u32)recv_pkt->rh.r_core_drv_init.app_mode;  in octeon_core_drv_init()
1226 		oct->fw_info.max_nic_ports =  in octeon_core_drv_init()
1228 		oct->fw_info.num_gmx_ports =  in octeon_core_drv_init()
1232 	if (oct->fw_info.max_nic_ports < num_nic_ports) {  in octeon_core_drv_init()
1233 		dev_err(&oct->pci_dev->dev,  in octeon_core_drv_init()
1235 			num_nic_ports, oct->fw_info.max_nic_ports);  in octeon_core_drv_init()
1238 	oct->fw_info.app_cap_flags = recv_pkt->rh.r_core_drv_init.app_cap_flags;  in octeon_core_drv_init()
1239 	oct->fw_info.app_mode = (u32)recv_pkt->rh.r_core_drv_init.app_mode;  in octeon_core_drv_init()
1240 	oct->pfvf_hsword.app_mode = (u32)recv_pkt->rh.r_core_drv_init.app_mode;  in octeon_core_drv_init()
1242 	oct->pfvf_hsword.pkind = recv_pkt->rh.r_core_drv_init.pkind;  in octeon_core_drv_init()
1244 	for (i = 0; i < oct->num_iqs; i++)  in octeon_core_drv_init()
1245 		oct->instr_queue[i]->txpciq.s.pkind = oct->pfvf_hsword.pkind;  in octeon_core_drv_init()
1247 	atomic_set(&oct->status, OCT_DEV_CORE_OK);  in octeon_core_drv_init()
1249 	cs = &core_setup[oct->octeon_id];  in octeon_core_drv_init()
1252 		dev_dbg(&oct->pci_dev->dev, "Core setup bytes expected %u found %d\n",  in octeon_core_drv_init()
1260 	strscpy(oct->boardinfo.name, cs->boardname,  in octeon_core_drv_init()
1261 		    sizeof(oct->boardinfo.name));  in octeon_core_drv_init()
1262 	strscpy(oct->boardinfo.serial_number, cs->board_serial_number,  in octeon_core_drv_init()
1263 		    sizeof(oct->boardinfo.serial_number));  in octeon_core_drv_init()
1267 	oct->boardinfo.major = cs->board_rev_major;  in octeon_core_drv_init()
1268 	oct->boardinfo.minor = cs->board_rev_minor;  in octeon_core_drv_init()
1270 	dev_info(&oct->pci_dev->dev,  in octeon_core_drv_init()
1282 int octeon_get_tx_qsize(struct octeon_device *oct, u32 q_no)  in octeon_get_tx_qsize()  argument
1285 	if (oct && (q_no < MAX_OCTEON_INSTR_QUEUES(oct)) &&  in octeon_get_tx_qsize()
1286 	    (oct->io_qmask.iq & BIT_ULL(q_no)))  in octeon_get_tx_qsize()
1287 		return oct->instr_queue[q_no]->max_count;  in octeon_get_tx_qsize()
1293 int octeon_get_rx_qsize(struct octeon_device *oct, u32 q_no)  in octeon_get_rx_qsize()  argument
1295 	if (oct && (q_no < MAX_OCTEON_OUTPUT_QUEUES(oct)) &&  in octeon_get_rx_qsize()
1296 	    (oct->io_qmask.oq & BIT_ULL(q_no)))  in octeon_get_rx_qsize()
1297 		return oct->droq[q_no]->max_count;  in octeon_get_rx_qsize()
1303 struct octeon_config *octeon_get_conf(struct octeon_device *oct)  in octeon_get_conf()  argument
1311 	if (OCTEON_CN6XXX(oct)) {  in octeon_get_conf()
1313 			(struct octeon_config *)(CHIP_CONF(oct, cn6xxx));  in octeon_get_conf()
1314 	} else if (OCTEON_CN23XX_PF(oct)) {  in octeon_get_conf()
1316 			(CHIP_CONF(oct, cn23xx_pf));  in octeon_get_conf()
1317 	} else if (OCTEON_CN23XX_VF(oct)) {  in octeon_get_conf()
1319 			(CHIP_CONF(oct, cn23xx_vf));  in octeon_get_conf()
1325 /* scratch register address is same in all the OCT-II and CN70XX models */
1342 u64 lio_pci_readq(struct octeon_device *oct, u64 addr)  in lio_pci_readq()  argument
1348 	spin_lock_irqsave(&oct->pci_win_lock, flags);  in lio_pci_readq()
1354 	if ((oct->chip_id == OCTEON_CN66XX) ||  in lio_pci_readq()
1355 	    (oct->chip_id == OCTEON_CN68XX) ||  in lio_pci_readq()
1356 	    (oct->chip_id == OCTEON_CN23XX_PF_VID))  in lio_pci_readq()
1358 	writel(addrhi, oct->reg_list.pci_win_rd_addr_hi);  in lio_pci_readq()
1361 	readl(oct->reg_list.pci_win_rd_addr_hi);  in lio_pci_readq()
1363 	writel(addr & 0xffffffff, oct->reg_list.pci_win_rd_addr_lo);  in lio_pci_readq()
1364 	readl(oct->reg_list.pci_win_rd_addr_lo);  in lio_pci_readq()
1366 	val64 = readq(oct->reg_list.pci_win_rd_data);  in lio_pci_readq()
1368 	spin_unlock_irqrestore(&oct->pci_win_lock, flags);  in lio_pci_readq()
1374 void lio_pci_writeq(struct octeon_device *oct,  in lio_pci_writeq()  argument
1380 	spin_lock_irqsave(&oct->pci_win_lock, flags);  in lio_pci_writeq()
1382 	writeq(addr, oct->reg_list.pci_win_wr_addr);  in lio_pci_writeq()
1385 	writel(val >> 32, oct->reg_list.pci_win_wr_data_hi);  in lio_pci_writeq()
1387 	readl(oct->reg_list.pci_win_wr_data_hi);  in lio_pci_writeq()
1389 	writel(val & 0xffffffff, oct->reg_list.pci_win_wr_data_lo);  in lio_pci_writeq()
1391 	spin_unlock_irqrestore(&oct->pci_win_lock, flags);  in lio_pci_writeq()
1395 int octeon_mem_access_ok(struct octeon_device *oct)  in octeon_mem_access_ok()  argument
1401 	if (OCTEON_CN23XX_PF(oct)) {  in octeon_mem_access_ok()
1402 		lmc0_reset_ctl = lio_pci_readq(oct, CN23XX_LMC0_RESET_CTL);  in octeon_mem_access_ok()
1406 		lmc0_reset_ctl = lio_pci_readq(oct, CN6XXX_LMC0_RESET_CTL);  in octeon_mem_access_ok()
1415 int octeon_wait_for_ddr_init(struct octeon_device *oct, u32 *timeout)  in octeon_wait_for_ddr_init()  argument
1425 		ret = octeon_mem_access_ok(oct);  in octeon_wait_for_ddr_init()
1456 	struct octeon_device *oct = NULL;  in lio_enable_irq()  local
1463 		oct = droq->oct_dev;  in lio_enable_irq()
1472 		oct = iq->oct_dev;  in lio_enable_irq()
1477 	if (oct && (OCTEON_CN23XX_PF(oct) || OCTEON_CN23XX_VF(oct))) {  in lio_enable_irq()