Lines Matching full:oct
219 struct octeon_device *oct = lio->oct_dev; in lio_get_link_ksettings() local
247 dev_dbg(&oct->pci_dev->dev, "ecmd->base.transceiver is XCVR_EXTERNAL\n"); in lio_get_link_ksettings()
250 dev_err(&oct->pci_dev->dev, "Unknown link interface mode: %d\n", in lio_get_link_ksettings()
260 if (oct->subsystem_id == OCTEON_CN2350_25GB_SUBSYS_ID || in lio_get_link_ksettings()
261 oct->subsystem_id == OCTEON_CN2360_25GB_SUBSYS_ID) { in lio_get_link_ksettings()
262 if (OCTEON_CN23XX_PF(oct)) { in lio_get_link_ksettings()
270 if (oct->no_speed_setting == 0) { in lio_get_link_ksettings()
282 if (oct->no_speed_setting == 0) { in lio_get_link_ksettings()
286 oct->speed_setting = 25; in lio_get_link_ksettings()
289 if (oct->speed_setting == 10) { in lio_get_link_ksettings()
300 if (oct->speed_setting == 25) { in lio_get_link_ksettings()
312 if (oct->no_speed_setting) in lio_get_link_ksettings()
320 if (oct->props[lio->ifidx].fec == 1) { in lio_get_link_ksettings()
400 struct octeon_device *oct; in lio_set_link_ksettings() local
402 oct = lio->oct_dev; in lio_set_link_ksettings()
406 if (!(oct->subsystem_id == OCTEON_CN2350_25GB_SUBSYS_ID || in lio_set_link_ksettings()
407 oct->subsystem_id == OCTEON_CN2360_25GB_SUBSYS_ID)) in lio_set_link_ksettings()
410 if (oct->no_speed_setting) { in lio_set_link_ksettings()
411 dev_err(&oct->pci_dev->dev, "%s: Changing speed is not supported\n", in lio_set_link_ksettings()
423 if ((oct->speed_boot == speed / 1000) && in lio_set_link_ksettings()
424 oct->speed_boot == oct->speed_setting) in lio_set_link_ksettings()
429 dev_dbg(&oct->pci_dev->dev, "Port speed is set to %dG\n", in lio_set_link_ksettings()
430 oct->speed_setting); in lio_set_link_ksettings()
439 struct octeon_device *oct; in lio_get_drvinfo() local
442 oct = lio->oct_dev; in lio_get_drvinfo()
446 strscpy(drvinfo->fw_version, oct->fw_info.liquidio_firmware_version, in lio_get_drvinfo()
448 strscpy(drvinfo->bus_info, pci_name(oct->pci_dev), in lio_get_drvinfo()
455 struct octeon_device *oct; in lio_get_vf_drvinfo() local
459 oct = lio->oct_dev; in lio_get_vf_drvinfo()
463 strscpy(drvinfo->fw_version, oct->fw_info.liquidio_firmware_version, in lio_get_vf_drvinfo()
465 strscpy(drvinfo->bus_info, pci_name(oct->pci_dev), in lio_get_vf_drvinfo()
473 struct octeon_device *oct = lio->oct_dev; in lio_send_queue_count_update() local
489 dev_err(&oct->pci_dev->dev, "Failed to send Queue reset command (ret: 0x%x)\n", in lio_send_queue_count_update()
502 struct octeon_device *oct = lio->oct_dev; in lio_ethtool_get_channels() local
506 if (OCTEON_CN6XXX(oct)) { in lio_ethtool_get_channels()
507 struct octeon_config *conf6x = CHIP_CONF(oct, cn6xxx); in lio_ethtool_get_channels()
513 } else if (OCTEON_CN23XX_PF(oct)) { in lio_ethtool_get_channels()
514 if (oct->sriov_info.sriov_enabled) { in lio_ethtool_get_channels()
518 CHIP_CONF(oct, cn23xx_pf); in lio_ethtool_get_channels()
522 combined_count = oct->num_iqs; in lio_ethtool_get_channels()
523 } else if (OCTEON_CN23XX_VF(oct)) { in lio_ethtool_get_channels()
527 reg_val = octeon_read_csr64(oct, ctrl); in lio_ethtool_get_channels()
530 combined_count = oct->num_iqs; in lio_ethtool_get_channels()
542 lio_irq_reallocate_irqs(struct octeon_device *oct, uint32_t num_ioqs) in lio_irq_reallocate_irqs() argument
548 if (!oct->msix_on) in lio_irq_reallocate_irqs()
554 oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR); in lio_irq_reallocate_irqs()
556 if (oct->msix_on) { in lio_irq_reallocate_irqs()
557 if (OCTEON_CN23XX_PF(oct)) in lio_irq_reallocate_irqs()
558 num_msix_irqs = oct->num_msix_irqs - 1; in lio_irq_reallocate_irqs()
559 else if (OCTEON_CN23XX_VF(oct)) in lio_irq_reallocate_irqs()
560 num_msix_irqs = oct->num_msix_irqs; in lio_irq_reallocate_irqs()
562 msix_entries = (struct msix_entry *)oct->msix_entries; in lio_irq_reallocate_irqs()
564 if (oct->ioq_vector[i].vector) { in lio_irq_reallocate_irqs()
569 &oct->ioq_vector[i]); in lio_irq_reallocate_irqs()
570 oct->ioq_vector[i].vector = 0; in lio_irq_reallocate_irqs()
574 /* non-iov vector's argument is oct struct */ in lio_irq_reallocate_irqs()
575 if (OCTEON_CN23XX_PF(oct)) in lio_irq_reallocate_irqs()
576 free_irq(msix_entries[i].vector, oct); in lio_irq_reallocate_irqs()
578 pci_disable_msix(oct->pci_dev); in lio_irq_reallocate_irqs()
579 kfree(oct->msix_entries); in lio_irq_reallocate_irqs()
580 oct->msix_entries = NULL; in lio_irq_reallocate_irqs()
583 kfree(oct->irq_name_storage); in lio_irq_reallocate_irqs()
584 oct->irq_name_storage = NULL; in lio_irq_reallocate_irqs()
586 if (octeon_allocate_ioq_vector(oct, num_ioqs)) { in lio_irq_reallocate_irqs()
587 dev_err(&oct->pci_dev->dev, "OCTEON: ioq vector allocation failed\n"); in lio_irq_reallocate_irqs()
591 if (octeon_setup_interrupt(oct, num_ioqs)) { in lio_irq_reallocate_irqs()
592 dev_info(&oct->pci_dev->dev, "Setup interrupt failed\n"); in lio_irq_reallocate_irqs()
597 oct->fn_list.enable_interrupt(oct, OCTEON_ALL_INTR); in lio_irq_reallocate_irqs()
608 struct octeon_device *oct = lio->oct_dev; in lio_ethtool_set_channels() local
611 if (strcmp(oct->fw_info.liquidio_firmware_version, "1.6.1") < 0) { in lio_ethtool_set_channels()
612 dev_err(&oct->pci_dev->dev, "Minimum firmware version required is 1.6.1\n"); in lio_ethtool_set_channels()
622 if (OCTEON_CN23XX_PF(oct)) { in lio_ethtool_set_channels()
623 if (oct->sriov_info.sriov_enabled) { in lio_ethtool_set_channels()
627 CHIP_CONF(oct, in lio_ethtool_set_channels()
633 } else if (OCTEON_CN23XX_VF(oct)) { in lio_ethtool_set_channels()
637 reg_val = octeon_read_csr64(oct, ctrl); in lio_ethtool_set_channels()
647 if (combined_count == oct->num_iqs) in lio_ethtool_set_channels()
708 struct octeon_device *oct = lio->oct_dev; in octnet_gpio_access() local
724 dev_err(&oct->pci_dev->dev, in octnet_gpio_access()
735 struct octeon_device *oct = lio->oct_dev; in octnet_id_active() local
750 dev_err(&oct->pci_dev->dev, in octnet_id_active()
834 struct octeon_device *oct = lio->oct_dev; in lio_set_phys_id() local
840 cur_ver = OCT_FW_VER(oct->fw_info.ver.maj, in lio_set_phys_id()
841 oct->fw_info.ver.min, in lio_set_phys_id()
842 oct->fw_info.ver.rev); in lio_set_phys_id()
846 if (oct->chip_id == OCTEON_CN66XX) { in lio_set_phys_id()
851 } else if (oct->chip_id == OCTEON_CN68XX) { in lio_set_phys_id()
879 } else if (oct->chip_id == OCTEON_CN23XX_PF_VID) { in lio_set_phys_id()
892 if (oct->chip_id == OCTEON_CN23XX_PF_VID && in lio_set_phys_id()
896 else if (oct->chip_id == OCTEON_CN66XX) in lio_set_phys_id()
905 if (oct->chip_id == OCTEON_CN23XX_PF_VID && in lio_set_phys_id()
909 else if (oct->chip_id == OCTEON_CN66XX) in lio_set_phys_id()
918 if (oct->chip_id == OCTEON_CN66XX) { in lio_set_phys_id()
921 } else if (oct->chip_id == OCTEON_CN68XX) { in lio_set_phys_id()
934 } else if (oct->chip_id == OCTEON_CN23XX_PF_VID) { in lio_set_phys_id()
957 struct octeon_device *oct = lio->oct_dev; in lio_ethtool_get_ringparam() local
964 if (OCTEON_CN6XXX(oct)) { in lio_ethtool_get_ringparam()
965 struct octeon_config *conf6x = CHIP_CONF(oct, cn6xxx); in lio_ethtool_get_ringparam()
971 } else if (OCTEON_CN23XX_PF(oct) || OCTEON_CN23XX_VF(oct)) { in lio_ethtool_get_ringparam()
974 rx_pending = oct->droq[0]->max_count; in lio_ethtool_get_ringparam()
975 tx_pending = oct->instr_queue[0]->max_count; in lio_ethtool_get_ringparam()
990 struct octeon_device *oct = lio->oct_dev; in lio_23xx_reconfigure_queue_count() local
1003 octeon_alloc_soft_command(oct, data_size, in lio_23xx_reconfigure_queue_count()
1006 dev_err(&oct->pci_dev->dev, "%s: Failed to allocate soft command\n", in lio_23xx_reconfigure_queue_count()
1018 ifidx_or_pfnum = oct->pf_num; in lio_23xx_reconfigure_queue_count()
1021 if_cfg.s.num_iqueues = oct->sriov_info.num_pf_rings; in lio_23xx_reconfigure_queue_count()
1022 if_cfg.s.num_oqueues = oct->sriov_info.num_pf_rings; in lio_23xx_reconfigure_queue_count()
1023 if_cfg.s.base_queue = oct->sriov_info.pf_srn; in lio_23xx_reconfigure_queue_count()
1024 if_cfg.s.gmx_port_id = oct->pf_num; in lio_23xx_reconfigure_queue_count()
1027 octeon_prepare_soft_command(oct, sc, OPCODE_NIC, in lio_23xx_reconfigure_queue_count()
1034 retval = octeon_send_soft_command(oct, sc); in lio_23xx_reconfigure_queue_count()
1036 dev_err(&oct->pci_dev->dev, in lio_23xx_reconfigure_queue_count()
1039 octeon_free_soft_command(oct, sc); in lio_23xx_reconfigure_queue_count()
1043 retval = wait_for_sc_completion_timeout(oct, sc, 0); in lio_23xx_reconfigure_queue_count()
1049 dev_err(&oct->pci_dev->dev, in lio_23xx_reconfigure_queue_count()
1077 dev_info(&oct->pci_dev->dev, "Queue count updated to %d\n", in lio_23xx_reconfigure_queue_count()
1088 struct octeon_device *oct = lio->oct_dev; in lio_reset_queues() local
1095 if (wait_for_pending_requests(oct)) in lio_reset_queues()
1096 dev_err(&oct->pci_dev->dev, "There were pending requests\n"); in lio_reset_queues()
1098 if (lio_wait_for_instr_fetch(oct)) in lio_reset_queues()
1099 dev_err(&oct->pci_dev->dev, "IQ had pending instructions\n"); in lio_reset_queues()
1101 if (octeon_set_io_queues_off(oct)) { in lio_reset_queues()
1102 dev_err(&oct->pci_dev->dev, "Setting io queues off failed\n"); in lio_reset_queues()
1109 oct->fn_list.disable_io_queues(oct); in lio_reset_queues()
1114 if (num_qs != oct->num_iqs) { in lio_reset_queues()
1117 dev_err(&oct->pci_dev->dev, in lio_reset_queues()
1124 dev_err(&oct->pci_dev->dev, in lio_reset_queues()
1149 if ((OCTEON_CN23XX_PF(oct)) && !oct->sriov_info.sriov_enabled) in lio_reset_queues()
1150 oct->fn_list.free_mbox(oct); in lio_reset_queues()
1153 for (i = 0; i < MAX_OCTEON_OUTPUT_QUEUES(oct); i++) { in lio_reset_queues()
1154 if (!(oct->io_qmask.oq & BIT_ULL(i))) in lio_reset_queues()
1156 octeon_delete_droq(oct, i); in lio_reset_queues()
1159 for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) { in lio_reset_queues()
1160 if (!(oct->io_qmask.iq & BIT_ULL(i))) in lio_reset_queues()
1162 octeon_delete_instr_queue(oct, i); in lio_reset_queues()
1167 if ((OCTEON_CN23XX_PF(oct)) && in lio_reset_queues()
1168 !oct->sriov_info.sriov_enabled) { in lio_reset_queues()
1169 oct->sriov_info.num_pf_rings = num_qs; in lio_reset_queues()
1170 if (cn23xx_sriov_config(oct)) { in lio_reset_queues()
1171 dev_err(&oct->pci_dev->dev, in lio_reset_queues()
1176 num_qs = oct->sriov_info.num_pf_rings; in lio_reset_queues()
1180 if (oct->fn_list.setup_device_regs(oct)) { in lio_reset_queues()
1181 dev_err(&oct->pci_dev->dev, "Failed to configure device registers\n"); in lio_reset_queues()
1189 if (octeon_setup_instr_queues(oct)) in lio_reset_queues()
1192 if (octeon_setup_output_queues(oct)) in lio_reset_queues()
1196 if (OCTEON_CN23XX_PF(oct) && !oct->sriov_info.sriov_enabled) { in lio_reset_queues()
1197 if (oct->fn_list.setup_mbox(oct)) { in lio_reset_queues()
1198 dev_err(&oct->pci_dev->dev, "Mailbox setup failed\n"); in lio_reset_queues()
1206 if (lio_irq_reallocate_irqs(oct, num_qs)) { in lio_reset_queues()
1207 dev_err(&oct->pci_dev->dev, "IRQs could not be allocated\n"); in lio_reset_queues()
1212 if (oct->fn_list.enable_io_queues(oct)) { in lio_reset_queues()
1213 dev_err(&oct->pci_dev->dev, "Failed to enable input/output queues\n"); in lio_reset_queues()
1217 for (i = 0; i < oct->num_oqs; i++) in lio_reset_queues()
1218 writel(oct->droq[i]->max_count, in lio_reset_queues()
1219 oct->droq[i]->pkts_credit_reg); in lio_reset_queues()
1225 if (OCTEON_CN23XX_PF(oct) && !oct->sriov_info.sriov_enabled) { in lio_reset_queues()
1232 if (liquidio_setup_io_queues(oct, 0, num_qs, num_qs)) { in lio_reset_queues()
1233 dev_err(&oct->pci_dev->dev, "I/O queues creation failed\n"); in lio_reset_queues()
1238 if (lio_setup_glists(oct, lio, num_qs)) { in lio_reset_queues()
1239 dev_err(&oct->pci_dev->dev, "Gather list allocation failed\n"); in lio_reset_queues()
1244 dev_err(&oct->pci_dev->dev, "lio_setup_rx_oom_poll_fn failed\n"); in lio_reset_queues()
1251 if (oct->sriov_info.sriov_enabled || OCTEON_CN23XX_VF(oct)) in lio_reset_queues()
1267 struct octeon_device *oct = lio->oct_dev; in lio_ethtool_set_ringparam() local
1270 if (!OCTEON_CN23XX_PF(oct) && !OCTEON_CN23XX_VF(oct)) in lio_ethtool_set_ringparam()
1281 rx_count_old = oct->droq[0]->max_count; in lio_ethtool_set_ringparam()
1282 tx_count_old = oct->instr_queue[0]->max_count; in lio_ethtool_set_ringparam()
1296 CFG_SET_NUM_TX_DESCS_NIC_IF(octeon_get_conf(oct), lio->ifidx, in lio_ethtool_set_ringparam()
1299 CFG_SET_NUM_RX_DESCS_NIC_IF(octeon_get_conf(oct), lio->ifidx, in lio_ethtool_set_ringparam()
1302 if (lio_reset_queues(netdev, oct->num_iqs)) in lio_ethtool_set_ringparam()
1314 CFG_SET_NUM_TX_DESCS_NIC_IF(octeon_get_conf(oct), lio->ifidx, in lio_ethtool_set_ringparam()
1317 CFG_SET_NUM_RX_DESCS_NIC_IF(octeon_get_conf(oct), lio->ifidx, in lio_ethtool_set_ringparam()
1359 struct octeon_device *oct = lio->oct_dev; in lio_get_pauseparam() local
1363 pause->tx_pause = oct->tx_pause; in lio_get_pauseparam()
1364 pause->rx_pause = oct->rx_pause; in lio_get_pauseparam()
1374 struct octeon_device *oct = lio->oct_dev; in lio_set_pauseparam() local
1380 if (oct->chip_id != OCTEON_CN23XX_PF_VID) in lio_set_pauseparam()
1419 dev_err(&oct->pci_dev->dev, in lio_set_pauseparam()
1424 oct->rx_pause = pause->rx_pause; in lio_set_pauseparam()
1425 oct->tx_pause = pause->tx_pause; in lio_set_pauseparam()
1444 /*sum of oct->droq[oq_no]->stats->rx_pkts_received */ in lio_get_ethtool_stats()
1446 /*sum of oct->instr_queue[iq_no]->stats.tx_done */ in lio_get_ethtool_stats()
1448 /*sum of oct->droq[oq_no]->stats->rx_bytes_received */ in lio_get_ethtool_stats()
1450 /*sum of oct->instr_queue[iq_no]->stats.tx_tot_bytes */ in lio_get_ethtool_stats()
1458 /*sum of oct->droq[oq_no]->stats->rx_dropped + in lio_get_ethtool_stats()
1459 *oct->droq[oq_no]->stats->dropped_nodispatch + in lio_get_ethtool_stats()
1460 *oct->droq[oq_no]->stats->dropped_toomany + in lio_get_ethtool_stats()
1461 *oct->droq[oq_no]->stats->dropped_nomem in lio_get_ethtool_stats()
1470 /*sum of oct->instr_queue[iq_no]->stats.tx_dropped */ in lio_get_ethtool_stats()
1733 /* sum of oct->droq[oq_no]->stats->rx_pkts_received */ in lio_vf_get_ethtool_stats()
1735 /* sum of oct->instr_queue[iq_no]->stats.tx_done */ in lio_vf_get_ethtool_stats()
1737 /* sum of oct->droq[oq_no]->stats->rx_bytes_received */ in lio_vf_get_ethtool_stats()
1739 /* sum of oct->instr_queue[iq_no]->stats.tx_tot_bytes */ in lio_vf_get_ethtool_stats()
1743 /* sum of oct->droq[oq_no]->stats->rx_dropped + in lio_vf_get_ethtool_stats()
1744 * oct->droq[oq_no]->stats->dropped_nodispatch + in lio_vf_get_ethtool_stats()
1745 * oct->droq[oq_no]->stats->dropped_toomany + in lio_vf_get_ethtool_stats()
1746 * oct->droq[oq_no]->stats->dropped_nomem in lio_vf_get_ethtool_stats()
1749 /* sum of oct->instr_queue[iq_no]->stats.tx_dropped */ in lio_vf_get_ethtool_stats()
2123 struct octeon_device *oct = lio->oct_dev; in lio_get_intr_coalesce() local
2130 switch (oct->chip_id) { in lio_get_intr_coalesce()
2134 intr_coal->rx_coalesce_usecs = oct->rx_coalesce_usecs; in lio_get_intr_coalesce()
2136 oct->rx_max_coalesced_frames; in lio_get_intr_coalesce()
2140 oct->tx_max_coalesced_frames; in lio_get_intr_coalesce()
2146 (struct octeon_cn6xxx *)oct->chip; in lio_get_intr_coalesce()
2154 iq = oct->instr_queue[lio->linfo.txpciq[0].s.q_no]; in lio_get_intr_coalesce()
2180 if ((OCTEON_CN23XX_PF(oct) || OCTEON_CN23XX_VF(oct)) && in lio_get_intr_coalesce()
2231 struct octeon_device *oct = lio->oct_dev; in oct_cfg_rx_intrcnt() local
2235 switch (oct->chip_id) { in oct_cfg_rx_intrcnt()
2239 (struct octeon_cn6xxx *)oct->chip; in oct_cfg_rx_intrcnt()
2246 octeon_write_csr(oct, CN6XXX_SLI_OQ_INT_LEVEL_PKTS, in oct_cfg_rx_intrcnt()
2259 for (q_no = 0; q_no < oct->num_oqs; q_no++) { in oct_cfg_rx_intrcnt()
2260 q_no += oct->sriov_info.pf_srn; in oct_cfg_rx_intrcnt()
2262 oct, CN23XX_SLI_OQ_PKT_INT_LEVELS(q_no), in oct_cfg_rx_intrcnt()
2264 oct, CN23XX_SLI_OQ_PKT_INT_LEVELS(q_no)) & in oct_cfg_rx_intrcnt()
2270 oct->rx_max_coalesced_frames = rx_max_coalesced_frames; in oct_cfg_rx_intrcnt()
2281 for (q_no = 0; q_no < oct->num_oqs; q_no++) { in oct_cfg_rx_intrcnt()
2283 oct, CN23XX_VF_SLI_OQ_PKT_INT_LEVELS(q_no), in oct_cfg_rx_intrcnt()
2285 oct, CN23XX_VF_SLI_OQ_PKT_INT_LEVELS(q_no)) & in oct_cfg_rx_intrcnt()
2291 oct->rx_max_coalesced_frames = rx_max_coalesced_frames; in oct_cfg_rx_intrcnt()
2304 struct octeon_device *oct = lio->oct_dev; in oct_cfg_rx_intrtime() local
2308 switch (oct->chip_id) { in oct_cfg_rx_intrtime()
2312 (struct octeon_cn6xxx *)oct->chip; in oct_cfg_rx_intrtime()
2318 time_threshold = lio_cn6xxx_get_oq_ticks(oct, in oct_cfg_rx_intrtime()
2320 octeon_write_csr(oct, in oct_cfg_rx_intrtime()
2336 cn23xx_pf_get_oq_ticks(oct, (u32)rx_coalesce_usecs); in oct_cfg_rx_intrtime()
2337 for (q_no = 0; q_no < oct->num_oqs; q_no++) { in oct_cfg_rx_intrtime()
2338 q_no += oct->sriov_info.pf_srn; in oct_cfg_rx_intrtime()
2339 octeon_write_csr64(oct, in oct_cfg_rx_intrtime()
2346 oct->rx_coalesce_usecs = rx_coalesce_usecs; in oct_cfg_rx_intrtime()
2359 cn23xx_vf_get_oq_ticks(oct, (u32)rx_coalesce_usecs); in oct_cfg_rx_intrtime()
2360 for (q_no = 0; q_no < oct->num_oqs; q_no++) { in oct_cfg_rx_intrtime()
2362 oct, CN23XX_VF_SLI_OQ_PKT_INT_LEVELS(q_no), in oct_cfg_rx_intrtime()
2368 oct->rx_coalesce_usecs = rx_coalesce_usecs; in oct_cfg_rx_intrtime()
2383 struct octeon_device *oct = lio->oct_dev; in oct_cfg_tx_intrcnt() local
2389 switch (oct->chip_id) { in oct_cfg_tx_intrcnt()
2403 for (q_no = 0; q_no < oct->num_iqs; q_no++) { in oct_cfg_tx_intrcnt()
2404 inst_cnt_reg = (oct->instr_queue[q_no])->inst_cnt_reg; in oct_cfg_tx_intrcnt()
2414 oct->tx_max_coalesced_frames = iq_intr_pkt; in oct_cfg_tx_intrcnt()
2430 struct octeon_device *oct = lio->oct_dev; in lio_set_intr_coalesce() local
2435 switch (oct->chip_id) { in lio_set_intr_coalesce()
2444 oct->instr_queue[q_no]->fill_threshold = in lio_set_intr_coalesce()
2448 dev_err(&oct->pci_dev->dev, in lio_set_intr_coalesce()
2464 intrmod.rx_frames = CFG_GET_OQ_INTR_PKT(octeon_get_conf(oct)); in lio_set_intr_coalesce()
2465 intrmod.rx_usecs = CFG_GET_OQ_INTR_TIME(octeon_get_conf(oct)); in lio_set_intr_coalesce()
2466 intrmod.tx_frames = CFG_GET_IQ_INTR_PKT(octeon_get_conf(oct)); in lio_set_intr_coalesce()
2479 oct->rx_coalesce_usecs = in lio_set_intr_coalesce()
2480 CFG_GET_OQ_INTR_TIME(octeon_get_conf(oct)); in lio_set_intr_coalesce()
2481 oct->rx_max_coalesced_frames = in lio_set_intr_coalesce()
2482 CFG_GET_OQ_INTR_PKT(octeon_get_conf(oct)); in lio_set_intr_coalesce()
2490 oct->tx_max_coalesced_frames = in lio_set_intr_coalesce()
2491 CFG_GET_IQ_INTR_PKT(octeon_get_conf(oct)); in lio_set_intr_coalesce()
2529 struct octeon_device *oct = lio->oct_dev; in lio_get_regs_len() local
2531 switch (oct->chip_id) { in lio_get_regs_len()
2541 static int cn23xx_read_csr_reg(char *s, struct octeon_device *oct) in cn23xx_read_csr_reg() argument
2544 u8 pf_num = oct->pf_num; in cn23xx_read_csr_reg()
2553 reg = CN23XX_SLI_PKT_MAC_RINFO64(oct->pcie_port, oct->pf_num); in cn23xx_read_csr_reg()
2556 reg, oct->pcie_port, oct->pf_num, in cn23xx_read_csr_reg()
2557 (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2560 reg = CN23XX_SLI_MAC_PF_INT_ENB64(oct->pcie_port, oct->pf_num); in cn23xx_read_csr_reg()
2563 reg, oct->pcie_port, oct->pf_num, in cn23xx_read_csr_reg()
2564 (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2567 reg = CN23XX_SLI_MAC_PF_INT_SUM64(oct->pcie_port, oct->pf_num); in cn23xx_read_csr_reg()
2570 reg, oct->pcie_port, oct->pf_num, in cn23xx_read_csr_reg()
2571 (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2576 (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2579 reg = 0x27300 + oct->pcie_port * CN23XX_MAC_INT_OFFSET + in cn23xx_read_csr_reg()
2580 (oct->pf_num) * CN23XX_PF_INT_OFFSET; in cn23xx_read_csr_reg()
2583 oct->pcie_port, oct->pf_num, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2586 reg = 0x27200 + oct->pcie_port * CN23XX_MAC_INT_OFFSET + in cn23xx_read_csr_reg()
2587 (oct->pf_num) * CN23XX_PF_INT_OFFSET; in cn23xx_read_csr_reg()
2590 reg, oct->pcie_port, oct->pf_num, in cn23xx_read_csr_reg()
2591 (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2596 (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2601 (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2606 (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2611 reg, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2616 (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2622 (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2627 reg, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2635 reg, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2641 reg, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2648 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2656 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2664 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2672 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2681 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2689 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2697 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2704 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2712 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2720 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2729 i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2738 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2747 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2755 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_read_csr_reg()
2761 static int cn23xx_vf_read_csr_reg(char *s, struct octeon_device *oct) in cn23xx_vf_read_csr_reg() argument
2771 for (i = 0; i < (oct->sriov_info.rings_per_vf); i++) { in cn23xx_vf_read_csr_reg()
2775 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_vf_read_csr_reg()
2778 for (i = 0; i < (oct->sriov_info.rings_per_vf); i++) { in cn23xx_vf_read_csr_reg()
2782 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_vf_read_csr_reg()
2785 for (i = 0; i < (oct->sriov_info.rings_per_vf); i++) { in cn23xx_vf_read_csr_reg()
2789 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_vf_read_csr_reg()
2792 for (i = 0; i < (oct->sriov_info.rings_per_vf); i++) { in cn23xx_vf_read_csr_reg()
2796 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_vf_read_csr_reg()
2799 for (i = 0; i < (oct->sriov_info.rings_per_vf); i++) { in cn23xx_vf_read_csr_reg()
2803 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_vf_read_csr_reg()
2806 for (i = 0; i < (oct->sriov_info.rings_per_vf); i++) { in cn23xx_vf_read_csr_reg()
2810 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_vf_read_csr_reg()
2813 for (i = 0; i < (oct->sriov_info.rings_per_vf); i++) { in cn23xx_vf_read_csr_reg()
2817 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_vf_read_csr_reg()
2820 for (i = 0; i < (oct->sriov_info.rings_per_vf); i++) { in cn23xx_vf_read_csr_reg()
2823 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_vf_read_csr_reg()
2826 for (i = 0; i < (oct->sriov_info.rings_per_vf); i++) { in cn23xx_vf_read_csr_reg()
2830 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_vf_read_csr_reg()
2833 for (i = 0; i < (oct->sriov_info.rings_per_vf); i++) { in cn23xx_vf_read_csr_reg()
2837 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_vf_read_csr_reg()
2840 for (i = 0; i < (oct->sriov_info.rings_per_vf); i++) { in cn23xx_vf_read_csr_reg()
2844 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_vf_read_csr_reg()
2847 for (i = 0; i < (oct->sriov_info.rings_per_vf); i++) { in cn23xx_vf_read_csr_reg()
2851 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_vf_read_csr_reg()
2854 for (i = 0; i < (oct->sriov_info.rings_per_vf); i++) { in cn23xx_vf_read_csr_reg()
2858 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_vf_read_csr_reg()
2861 for (i = 0; i < (oct->sriov_info.rings_per_vf); i++) { in cn23xx_vf_read_csr_reg()
2865 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_vf_read_csr_reg()
2868 for (i = 0; i < (oct->sriov_info.rings_per_vf); i++) { in cn23xx_vf_read_csr_reg()
2872 reg, i, (u64)octeon_read_csr64(oct, reg)); in cn23xx_vf_read_csr_reg()
2878 static int cn6xxx_read_csr_reg(char *s, struct octeon_device *oct) in cn6xxx_read_csr_reg() argument
2888 CN6XXX_WIN_WR_ADDR_LO, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2891 CN6XXX_WIN_WR_ADDR_HI, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2894 CN6XXX_WIN_RD_ADDR_LO, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2897 CN6XXX_WIN_RD_ADDR_HI, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2900 CN6XXX_WIN_WR_DATA_LO, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2903 CN6XXX_WIN_WR_DATA_HI, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2906 octeon_read_csr(oct, CN6XXX_WIN_WR_MASK_REG)); in cn6xxx_read_csr_reg()
2910 CN6XXX_SLI_INT_ENB64_PORT0, octeon_read_csr(oct, in cn6xxx_read_csr_reg()
2914 octeon_read_csr(oct, CN6XXX_SLI_INT_ENB64_PORT1)); in cn6xxx_read_csr_reg()
2916 octeon_read_csr(oct, CN6XXX_SLI_INT_SUM64)); in cn6xxx_read_csr_reg()
2919 for (i = 0; i < oct->num_oqs; i++) { in cn6xxx_read_csr_reg()
2922 reg, i, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2925 reg, i, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2929 reg, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2932 reg, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2940 reg, i, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2943 reg, i, octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2950 octeon_read_csr(oct, CN6XXX_DMA_CNT(0))); in cn6xxx_read_csr_reg()
2953 CN6XXX_DMA_PKT_INT_LEVEL(0), octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2957 octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2961 octeon_read_csr(oct, CN6XXX_DMA_CNT(1))); in cn6xxx_read_csr_reg()
2965 octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2969 octeon_read_csr(oct, reg)); in cn6xxx_read_csr_reg()
2976 reg = lio_pci_readq(oct, CN6XXX_BAR1_REG(i, oct->pcie_port)); in cn6xxx_read_csr_reg()
2978 CN6XXX_BAR1_REG(i, oct->pcie_port), i, reg); in cn6xxx_read_csr_reg()
2984 static int cn6xxx_read_config_reg(char *s, struct octeon_device *oct) in cn6xxx_read_config_reg() argument
2995 pci_read_config_dword(oct->pci_dev, (i * 4), &val); in cn6xxx_read_config_reg()
3001 pci_read_config_dword(oct->pci_dev, (i * 4), &val); in cn6xxx_read_config_reg()
3015 struct octeon_device *oct = lio->oct_dev; in lio_get_regs() local
3019 switch (oct->chip_id) { in lio_get_regs()
3022 len += cn23xx_read_csr_reg(regbuf + len, oct); in lio_get_regs()
3026 len += cn23xx_vf_read_csr_reg(regbuf + len, oct); in lio_get_regs()
3031 len += cn6xxx_read_csr_reg(regbuf + len, oct); in lio_get_regs()
3032 len += cn6xxx_read_config_reg(regbuf + len, oct); in lio_get_regs()
3035 dev_err(&oct->pci_dev->dev, "%s Unknown chipid: %d\n", in lio_get_regs()
3036 __func__, oct->chip_id); in lio_get_regs()
3061 struct octeon_device *oct = lio->oct_dev; in lio_get_fecparam() local
3066 if (oct->subsystem_id == OCTEON_CN2350_25GB_SUBSYS_ID || in lio_get_fecparam()
3067 oct->subsystem_id == OCTEON_CN2360_25GB_SUBSYS_ID) { in lio_get_fecparam()
3068 if (oct->no_speed_setting == 1) in lio_get_fecparam()
3073 if (oct->props[lio->ifidx].fec == 1) in lio_get_fecparam()
3086 struct octeon_device *oct = lio->oct_dev; in lio_set_fecparam() local
3088 if (oct->subsystem_id == OCTEON_CN2350_25GB_SUBSYS_ID || in lio_set_fecparam()
3089 oct->subsystem_id == OCTEON_CN2360_25GB_SUBSYS_ID) { in lio_set_fecparam()
3090 if (oct->no_speed_setting == 1) in lio_set_fecparam()
3176 struct octeon_device *oct = lio->oct_dev; in liquidio_set_ethtool_ops() local
3178 if (OCTEON_CN23XX_VF(oct)) in liquidio_set_ethtool_ops()