Lines Matching +full:rmii +full:- +full:refclk +full:- +full:in
1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2004-2006 Atmel Corporation
114 #define GEM_TX65CNT 0x011c /* 65-127 byte Frames TX counter */
115 #define GEM_TX128CNT 0x0120 /* 128-255 byte Frames TX counter */
116 #define GEM_TX256CNT 0x0124 /* 256-511 byte Frames TX counter */
117 #define GEM_TX512CNT 0x0128 /* 512-1023 byte Frames TX counter */
118 #define GEM_TX1024CNT 0x012c /* 1024-1518 byte Frames TX counter */
135 #define GEM_RX65CNT 0x016c /* 65-127 byte Frames RX Counter */
136 #define GEM_RX128CNT 0x0170 /* 128-255 byte Frames RX Counter */
137 #define GEM_RX256CNT 0x0174 /* 256-511 byte Frames RX Counter */
138 #define GEM_RX512CNT 0x0178 /* 512-1023 byte Frames RX Counter */
139 #define GEM_RX1024CNT 0x017c /* 1024-1518 byte Frames RX Counter */
153 #define GEM_TISUBN 0x01bc /* 1588 Timer Increment Sub-ns */
211 /* Which screening type 2 EtherType register will be used (0 - 7) */
224 /* Bitfields in NCR */
259 /* Bitfields in NCFGR */
264 #define MACB_BIT_RATE_OFFSET 2 /* Discard non-VLAN frames */
327 /* Bitfields in DMACFG. */
348 #define GEM_ADDR64_OFFSET 30 /* Address bus width - 64b or 32b */
352 /* Bitfields in PBUFRXCUT */
356 /* Bitfields in NSR */
364 /* Bitfields in TSR */
382 /* Bitfields in RSR */
390 /* Bitfields in ISR/IER/IDR/IMR */
419 #define MACB_WOL_OFFSET 14 /* Enable wake-on-lan interrupt */
439 #define GEM_WOL_OFFSET 28 /* Enable wake-on-lan interrupt */
450 /* Bitfields in MAN */
464 /* Bitfields in USRIO (AVR32) */
474 /* Bitfields in USRIO (AT91) */
482 /* Bitfields in WOL */
494 /* Bitfields in MID */
500 /* Bitfield in HS_MAC_CONFIG */
504 /* Bitfields in PCSCNTRL */
508 /* Bitfields in DCFG1. */
516 /* Bitfields in DCFG2. */
525 /* Bitfields in DCFG5. */
529 /* Bitfields in DCFG6. */
537 /* Bitfields in DCFG8. */
547 /* Bitfields in DCFG10 */
553 /* Bitfields in DCFG12. */
557 /* Bitfields in USX_CONTROL. */
571 /* Bitfields in USX_STATUS. */
575 /* Bitfields in TISUBN */
583 /* Bitfields in TI */
587 /* Bitfields in TSH */
591 /* Bitfields in TSL */
595 /* Bitfields in TN */
599 /* Bitfields in TXBDCTRL */
603 /* Bitfields in RXBDCTRL */
607 /* Bitfields in SCRT2 */
618 #define GEM_CMPA_OFFSET 13 /* Compare A - Index to screener type 2 Compare register */
622 #define GEM_CMPB_OFFSET 19 /* Compare B - Index to screener type 2 Compare register */
626 #define GEM_CMPC_OFFSET 25 /* Compare C - Index to screener type 2 Compare register */
631 /* Bitfields in ETHT */
635 /* Bitfields in T2CMPW0 */
641 /* Bitfields in T2CMPW1 */
649 /* Bitfields in queue pointer registers */
656 * of 12 bytes from this would be the source IP address in an IP header
672 #define GEM_DMA_TXVALID_OFFSET 23 /* timestamp has been captured in the Buffer Descriptor */
676 #define GEM_DMA_RXVALID_OFFSET 2 /* indicates a valid timestamp in the Buffer Descriptor */
687 /* New hardware supports 12 bit precision of timestamp in DMA buffer descriptor.
695 #define GEM_DMA_SEC_MASK (GEM_DMA_SEC_TOP - 1)
697 /* Bitfields in ADJ */
759 (((value) & ((1 << MACB_##name##_SIZE) - 1)) \
763 & ((1 << MACB_##name##_SIZE) - 1))
765 (((old) & ~(((1 << MACB_##name##_SIZE) - 1) \
772 (((value) & ((1 << GEM_##name##_SIZE) - 1)) \
776 & ((1 << GEM_##name##_SIZE) - 1))
778 (((old) & ~(((1 << GEM_##name##_SIZE) - 1) \
783 #define macb_readl(port, reg) (port)->macb_reg_readl((port), MACB_##reg)
784 #define macb_writel(port, reg, value) (port)->macb_reg_writel((port), MACB_##reg, (value))
785 #define gem_readl(port, reg) (port)->macb_reg_readl((port), GEM_##reg)
786 #define gem_writel(port, reg, value) (port)->macb_reg_writel((port), GEM_##reg, (value))
787 #define queue_readl(queue, reg) (queue)->bp->macb_reg_readl((queue)->bp, (queue)->reg)
788 #define queue_writel(queue, reg, value) (queue)->bp->macb_reg_writel((queue)->bp, (queue)->reg, (va…
789 #define gem_readl_n(port, reg, idx) (port)->macb_reg_readl((port), GEM_##reg + idx * 4)
790 #define gem_writel_n(port, reg, idx, value) (port)->macb_reg_writel((port), GEM_##reg + idx * 4, (v…
817 /* struct macb_dma_desc - Hardware DMA descriptor
889 /* RX checksum offload disabled: bit 24 clear in NCFGR */
893 /* RX checksum offload enabled: bit 24 set in NCFGR */
935 /* struct macb_tx_skb - data about an skb which is being transmitted
950 /* Hardware-collected statistics. Used when updating the network
1026 * returned by `ethtool -S`. Also describes which net_device_stats statistics
1165 /* MACB-PTP interface: adapt to platform needs. */
1187 u32 rmii; member
1189 u32 refclk; member
1317 struct macb_ptp_info *ptp_info; /* macb-ptp interface */
1349 #define TSU_SEC_MAX_VAL (((u64)1 << GEM_TSEC_SIZE) - 1)
1350 #define TSU_NSEC_MAX_VAL ((1 << GEM_TN_SIZE) - 1)
1365 if (bp->tstamp_config.tx_type == TSTAMP_DISABLED) in gem_ptp_do_txstamp()
1373 if (bp->tstamp_config.rx_filter == TSTAMP_DISABLED) in gem_ptp_do_rxstamp()
1394 return !!(bp->caps & MACB_CAPS_MACB_IS_GEM); in macb_is_gem()
1399 return IS_ENABLED(CONFIG_MACB_USE_HWSTAMP) && (bp->caps & MACB_CAPS_GEM_HAS_PTP); in gem_has_ptp()
1403 * struct macb_platform_data - platform data for MACB Ethernet used for PCI registration