Lines Matching +full:tx +full:- +full:pcs
1 // SPDX-License-Identifier: GPL-2.0
4 #include <linux/pcs/pcs-xpcs.h>
12 struct sja1105_mdio_private *mdio_priv = bus->priv; in sja1105_pcs_mdio_read_c45()
13 struct sja1105_private *priv = mdio_priv->priv; in sja1105_pcs_mdio_read_c45()
38 struct sja1105_mdio_private *mdio_priv = bus->priv; in sja1105_pcs_mdio_write_c45()
39 struct sja1105_private *priv = mdio_priv->priv; in sja1105_pcs_mdio_write_c45()
47 return -EINVAL; in sja1105_pcs_mdio_write_c45()
54 struct sja1105_mdio_private *mdio_priv = bus->priv; in sja1110_pcs_mdio_read_c45()
55 struct sja1105_private *priv = mdio_priv->priv; in sja1110_pcs_mdio_read_c45()
56 const struct sja1105_regs *regs = priv->info->regs; in sja1110_pcs_mdio_read_c45()
62 if (regs->pcs_base[phy] == SJA1105_RSV_ADDR) in sja1110_pcs_mdio_read_c45()
63 return -ENODEV; in sja1110_pcs_mdio_read_c45()
79 return -ENODEV; in sja1110_pcs_mdio_read_c45()
84 regs->pcs_base[phy] + SJA1110_PCS_BANK_REG, in sja1110_pcs_mdio_read_c45()
89 rc = sja1105_xfer_u32(priv, SPI_READ, regs->pcs_base[phy] + offset, in sja1110_pcs_mdio_read_c45()
100 struct sja1105_mdio_private *mdio_priv = bus->priv; in sja1110_pcs_mdio_write_c45()
101 struct sja1105_private *priv = mdio_priv->priv; in sja1110_pcs_mdio_write_c45()
102 const struct sja1105_regs *regs = priv->info->regs; in sja1110_pcs_mdio_write_c45()
108 if (regs->pcs_base[phy] == SJA1105_RSV_ADDR) in sja1110_pcs_mdio_write_c45()
109 return -ENODEV; in sja1110_pcs_mdio_write_c45()
120 return -ENODEV; in sja1110_pcs_mdio_write_c45()
125 regs->pcs_base[phy] + SJA1110_PCS_BANK_REG, in sja1110_pcs_mdio_write_c45()
132 return sja1105_xfer_u32(priv, SPI_WRITE, regs->pcs_base[phy] + offset, in sja1110_pcs_mdio_write_c45()
147 const struct sja1105_regs *regs = priv->info->regs; in sja1105_base_t1_encode_addr()
149 return regs->mdio_100base_t1 | (phy << 7) | (op << 5) | (xad << 0); in sja1105_base_t1_encode_addr()
154 struct sja1105_mdio_private *mdio_priv = bus->priv; in sja1105_base_t1_mdio_read_c22()
155 struct sja1105_private *priv = mdio_priv->priv; in sja1105_base_t1_mdio_read_c22()
172 struct sja1105_mdio_private *mdio_priv = bus->priv; in sja1105_base_t1_mdio_read_c45()
173 struct sja1105_private *priv = mdio_priv->priv; in sja1105_base_t1_mdio_read_c45()
196 struct sja1105_mdio_private *mdio_priv = bus->priv; in sja1105_base_t1_mdio_write_c22()
197 struct sja1105_private *priv = mdio_priv->priv; in sja1105_base_t1_mdio_write_c22()
211 struct sja1105_mdio_private *mdio_priv = bus->priv; in sja1105_base_t1_mdio_write_c45()
212 struct sja1105_private *priv = mdio_priv->priv; in sja1105_base_t1_mdio_write_c45()
232 struct sja1105_mdio_private *mdio_priv = bus->priv; in sja1105_base_tx_mdio_read()
233 struct sja1105_private *priv = mdio_priv->priv; in sja1105_base_tx_mdio_read()
234 const struct sja1105_regs *regs = priv->info->regs; in sja1105_base_tx_mdio_read()
238 rc = sja1105_xfer_u32(priv, SPI_READ, regs->mdio_100base_tx + reg, in sja1105_base_tx_mdio_read()
249 struct sja1105_mdio_private *mdio_priv = bus->priv; in sja1105_base_tx_mdio_write()
250 struct sja1105_private *priv = mdio_priv->priv; in sja1105_base_tx_mdio_write()
251 const struct sja1105_regs *regs = priv->info->regs; in sja1105_base_tx_mdio_write()
254 return sja1105_xfer_u32(priv, SPI_WRITE, regs->mdio_100base_tx + reg, in sja1105_base_tx_mdio_write()
266 np = of_get_compatible_child(mdio_node, "nxp,sja1110-base-tx-mdio"); in sja1105_mdiobus_base_tx_register()
275 rc = -ENOMEM; in sja1105_mdiobus_base_tx_register()
279 bus->name = "SJA1110 100base-TX MDIO bus"; in sja1105_mdiobus_base_tx_register()
280 snprintf(bus->id, MII_BUS_ID_SIZE, "%s-base-tx", in sja1105_mdiobus_base_tx_register()
281 dev_name(priv->ds->dev)); in sja1105_mdiobus_base_tx_register()
282 bus->read = sja1105_base_tx_mdio_read; in sja1105_mdiobus_base_tx_register()
283 bus->write = sja1105_base_tx_mdio_write; in sja1105_mdiobus_base_tx_register()
284 bus->parent = priv->ds->dev; in sja1105_mdiobus_base_tx_register()
285 mdio_priv = bus->priv; in sja1105_mdiobus_base_tx_register()
286 mdio_priv->priv = priv; in sja1105_mdiobus_base_tx_register()
294 priv->mdio_base_tx = bus; in sja1105_mdiobus_base_tx_register()
304 if (!priv->mdio_base_tx) in sja1105_mdiobus_base_tx_unregister()
307 mdiobus_unregister(priv->mdio_base_tx); in sja1105_mdiobus_base_tx_unregister()
308 mdiobus_free(priv->mdio_base_tx); in sja1105_mdiobus_base_tx_unregister()
309 priv->mdio_base_tx = NULL; in sja1105_mdiobus_base_tx_unregister()
320 np = of_get_compatible_child(mdio_node, "nxp,sja1110-base-t1-mdio"); in sja1105_mdiobus_base_t1_register()
329 rc = -ENOMEM; in sja1105_mdiobus_base_t1_register()
333 bus->name = "SJA1110 100base-T1 MDIO bus"; in sja1105_mdiobus_base_t1_register()
334 snprintf(bus->id, MII_BUS_ID_SIZE, "%s-base-t1", in sja1105_mdiobus_base_t1_register()
335 dev_name(priv->ds->dev)); in sja1105_mdiobus_base_t1_register()
336 bus->read = sja1105_base_t1_mdio_read_c22; in sja1105_mdiobus_base_t1_register()
337 bus->write = sja1105_base_t1_mdio_write_c22; in sja1105_mdiobus_base_t1_register()
338 bus->read_c45 = sja1105_base_t1_mdio_read_c45; in sja1105_mdiobus_base_t1_register()
339 bus->write_c45 = sja1105_base_t1_mdio_write_c45; in sja1105_mdiobus_base_t1_register()
340 bus->parent = priv->ds->dev; in sja1105_mdiobus_base_t1_register()
341 mdio_priv = bus->priv; in sja1105_mdiobus_base_t1_register()
342 mdio_priv->priv = priv; in sja1105_mdiobus_base_t1_register()
350 priv->mdio_base_t1 = bus; in sja1105_mdiobus_base_t1_register()
360 if (!priv->mdio_base_t1) in sja1105_mdiobus_base_t1_unregister()
363 mdiobus_unregister(priv->mdio_base_t1); in sja1105_mdiobus_base_t1_unregister()
364 mdiobus_free(priv->mdio_base_t1); in sja1105_mdiobus_base_t1_unregister()
365 priv->mdio_base_t1 = NULL; in sja1105_mdiobus_base_t1_unregister()
371 struct dsa_switch *ds = priv->ds; in sja1105_mdiobus_pcs_register()
376 if (!priv->info->pcs_mdio_read_c45 || !priv->info->pcs_mdio_write_c45) in sja1105_mdiobus_pcs_register()
381 return -ENOMEM; in sja1105_mdiobus_pcs_register()
383 bus->name = "SJA1105 PCS MDIO bus"; in sja1105_mdiobus_pcs_register()
384 snprintf(bus->id, MII_BUS_ID_SIZE, "%s-pcs", in sja1105_mdiobus_pcs_register()
385 dev_name(ds->dev)); in sja1105_mdiobus_pcs_register()
386 bus->read_c45 = priv->info->pcs_mdio_read_c45; in sja1105_mdiobus_pcs_register()
387 bus->write_c45 = priv->info->pcs_mdio_write_c45; in sja1105_mdiobus_pcs_register()
388 bus->parent = ds->dev; in sja1105_mdiobus_pcs_register()
392 bus->phy_mask = ~0; in sja1105_mdiobus_pcs_register()
393 mdio_priv = bus->priv; in sja1105_mdiobus_pcs_register()
394 mdio_priv->priv = priv; in sja1105_mdiobus_pcs_register()
402 for (port = 0; port < ds->num_ports; port++) { in sja1105_mdiobus_pcs_register()
403 struct phylink_pcs *pcs; in sja1105_mdiobus_pcs_register() local
408 if (priv->phy_mode[port] != PHY_INTERFACE_MODE_SGMII && in sja1105_mdiobus_pcs_register()
409 priv->phy_mode[port] != PHY_INTERFACE_MODE_2500BASEX) in sja1105_mdiobus_pcs_register()
412 pcs = xpcs_create_pcs_mdiodev(bus, port); in sja1105_mdiobus_pcs_register()
413 if (IS_ERR(pcs)) { in sja1105_mdiobus_pcs_register()
414 rc = PTR_ERR(pcs); in sja1105_mdiobus_pcs_register()
418 priv->pcs[port] = pcs; in sja1105_mdiobus_pcs_register()
421 priv->mdio_pcs = bus; in sja1105_mdiobus_pcs_register()
426 for (port = 0; port < ds->num_ports; port++) { in sja1105_mdiobus_pcs_register()
427 if (priv->pcs[port]) { in sja1105_mdiobus_pcs_register()
428 xpcs_destroy_pcs(priv->pcs[port]); in sja1105_mdiobus_pcs_register()
429 priv->pcs[port] = NULL; in sja1105_mdiobus_pcs_register()
441 struct dsa_switch *ds = priv->ds; in sja1105_mdiobus_pcs_unregister()
444 if (!priv->mdio_pcs) in sja1105_mdiobus_pcs_unregister()
447 for (port = 0; port < ds->num_ports; port++) { in sja1105_mdiobus_pcs_unregister()
448 if (priv->pcs[port]) { in sja1105_mdiobus_pcs_unregister()
449 xpcs_destroy_pcs(priv->pcs[port]); in sja1105_mdiobus_pcs_unregister()
450 priv->pcs[port] = NULL; in sja1105_mdiobus_pcs_unregister()
454 mdiobus_unregister(priv->mdio_pcs); in sja1105_mdiobus_pcs_unregister()
455 mdiobus_free(priv->mdio_pcs); in sja1105_mdiobus_pcs_unregister()
456 priv->mdio_pcs = NULL; in sja1105_mdiobus_pcs_unregister()
461 struct sja1105_private *priv = ds->priv; in sja1105_mdiobus_register()
462 const struct sja1105_regs *regs = priv->info->regs; in sja1105_mdiobus_register()
463 struct device_node *switch_node = ds->dev->of_node; in sja1105_mdiobus_register()
478 if (regs->mdio_100base_tx != SJA1105_RSV_ADDR) { in sja1105_mdiobus_register()
484 if (regs->mdio_100base_t1 != SJA1105_RSV_ADDR) { in sja1105_mdiobus_register()
506 struct sja1105_private *priv = ds->priv; in sja1105_mdiobus_unregister()