1 // SPDX-License-Identifier: GPL-2.0-or-later
7  * Copyright (c) 2016-2017 Savoir-faire Linux Inc.
26 	int addr = chip->info->port_base_addr + port;  in mv88e6xxx_port_read()
34 	int addr = chip->info->port_base_addr + port;  in mv88e6xxx_port_wait_bit()
42 	int addr = chip->info->port_base_addr + port;  in mv88e6xxx_port_write()
74  * For port's MAC speed, ForceSpd (or SpdValue) bits 1:0 program the value.
113 	dev_dbg(chip->dev, "p%d: delay RXCLK %s, TXCLK %s\n", port,  in mv88e6xxx_port_set_rgmii_delay()
124 		return -EOPNOTSUPP;  in mv88e6352_port_set_rgmii_delay()
133 		return -EOPNOTSUPP;  in mv88e6390_port_set_rgmii_delay()
142 		return -EOPNOTSUPP;  in mv88e6320_port_set_rgmii_delay()
171 		return -EINVAL;  in mv88e6xxx_port_set_link()
178 	dev_dbg(chip->dev, "p%d: %s link %s\n", port,  in mv88e6xxx_port_set_link()
187 	const struct mv88e6xxx_ops *ops = chip->info->ops;  in mv88e6xxx_port_sync_link()
196 	if (ops->port_set_link)  in mv88e6xxx_port_sync_link()
197 		err = ops->port_set_link(chip, port, link);  in mv88e6xxx_port_sync_link()
204 	const struct mv88e6xxx_ops *ops = chip->info->ops;  in mv88e6185_port_sync_link()
215 	if (ops->port_set_link)  in mv88e6185_port_sync_link()
216 		err = ops->port_set_link(chip, port, link);  in mv88e6185_port_sync_link()
222 					   int port, int speed, bool alt_bit,  in mv88e6xxx_port_set_speed_duplex()  argument
228 	switch (speed) {  in mv88e6xxx_port_set_speed_duplex()
258 		return -EOPNOTSUPP;  in mv88e6xxx_port_set_speed_duplex()
273 		return -EOPNOTSUPP;  in mv88e6xxx_port_set_speed_duplex()
288 		if (speed != SPEED_UNFORCED)  in mv88e6xxx_port_set_speed_duplex()
297 	if (speed != SPEED_UNFORCED)  in mv88e6xxx_port_set_speed_duplex()
298 		dev_dbg(chip->dev, "p%d: Speed set to %d Mbps\n", port, speed);  in mv88e6xxx_port_set_speed_duplex()
300 		dev_dbg(chip->dev, "p%d: Speed unforced\n", port);  in mv88e6xxx_port_set_speed_duplex()
301 	dev_dbg(chip->dev, "p%d: %s %s duplex\n", port,  in mv88e6xxx_port_set_speed_duplex()
310 				    int speed, int duplex)  in mv88e6185_port_set_speed_duplex()  argument
312 	if (speed == 200 || speed > 1000)  in mv88e6185_port_set_speed_duplex()
313 		return -EOPNOTSUPP;  in mv88e6185_port_set_speed_duplex()
315 	return mv88e6xxx_port_set_speed_duplex(chip, port, speed, false, false,  in mv88e6185_port_set_speed_duplex()
321 				    int speed, int duplex)  in mv88e6250_port_set_speed_duplex()  argument
323 	if (speed > 100)  in mv88e6250_port_set_speed_duplex()
324 		return -EOPNOTSUPP;  in mv88e6250_port_set_speed_duplex()
326 	return mv88e6xxx_port_set_speed_duplex(chip, port, speed, false, false,  in mv88e6250_port_set_speed_duplex()
332 				    int speed, int duplex)  in mv88e6341_port_set_speed_duplex()  argument
334 	if (speed > 2500)  in mv88e6341_port_set_speed_duplex()
335 		return -EOPNOTSUPP;  in mv88e6341_port_set_speed_duplex()
337 	if (speed == 200 && port != 0)  in mv88e6341_port_set_speed_duplex()
338 		return -EOPNOTSUPP;  in mv88e6341_port_set_speed_duplex()
340 	if (speed == 2500 && port < 5)  in mv88e6341_port_set_speed_duplex()
341 		return -EOPNOTSUPP;  in mv88e6341_port_set_speed_duplex()
343 	return mv88e6xxx_port_set_speed_duplex(chip, port, speed, !port, true,  in mv88e6341_port_set_speed_duplex()
358 				    int speed, int duplex)  in mv88e6352_port_set_speed_duplex()  argument
360 	if (speed > 1000)  in mv88e6352_port_set_speed_duplex()
361 		return -EOPNOTSUPP;  in mv88e6352_port_set_speed_duplex()
363 	if (speed == 200 && port < 5)  in mv88e6352_port_set_speed_duplex()
364 		return -EOPNOTSUPP;  in mv88e6352_port_set_speed_duplex()
366 	return mv88e6xxx_port_set_speed_duplex(chip, port, speed, true, false,  in mv88e6352_port_set_speed_duplex()
372 				    int speed, int duplex)  in mv88e6390_port_set_speed_duplex()  argument
374 	if (speed > 2500)  in mv88e6390_port_set_speed_duplex()
375 		return -EOPNOTSUPP;  in mv88e6390_port_set_speed_duplex()
377 	if (speed == 200 && port != 0)  in mv88e6390_port_set_speed_duplex()
378 		return -EOPNOTSUPP;  in mv88e6390_port_set_speed_duplex()
380 	if (speed == 2500 && port < 9)  in mv88e6390_port_set_speed_duplex()
381 		return -EOPNOTSUPP;  in mv88e6390_port_set_speed_duplex()
383 	return mv88e6xxx_port_set_speed_duplex(chip, port, speed, true, true,  in mv88e6390_port_set_speed_duplex()
398 				     int speed, int duplex)  in mv88e6390x_port_set_speed_duplex()  argument
400 	if (speed == 200 && port != 0)  in mv88e6390x_port_set_speed_duplex()
401 		return -EOPNOTSUPP;  in mv88e6390x_port_set_speed_duplex()
403 	if (speed >= 2500 && port < 9)  in mv88e6390x_port_set_speed_duplex()
404 		return -EOPNOTSUPP;  in mv88e6390x_port_set_speed_duplex()
406 	return mv88e6xxx_port_set_speed_duplex(chip, port, speed, true, true,  in mv88e6390x_port_set_speed_duplex()
424 				     int speed, int duplex)  in mv88e6393x_port_set_speed_duplex()  argument
429 	if (chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6361 &&  in mv88e6393x_port_set_speed_duplex()
430 	    speed > 2500)  in mv88e6393x_port_set_speed_duplex()
431 		return -EOPNOTSUPP;  in mv88e6393x_port_set_speed_duplex()
433 	if (speed == 200 && port != 0)  in mv88e6393x_port_set_speed_duplex()
434 		return -EOPNOTSUPP;  in mv88e6393x_port_set_speed_duplex()
436 	if (speed >= 2500 && port > 0 && port < 9)  in mv88e6393x_port_set_speed_duplex()
437 		return -EOPNOTSUPP;  in mv88e6393x_port_set_speed_duplex()
439 	switch (speed) {  in mv88e6393x_port_set_speed_duplex()
466 		return -EOPNOTSUPP;  in mv88e6393x_port_set_speed_duplex()
481 		return -EOPNOTSUPP;  in mv88e6393x_port_set_speed_duplex()
492 	if (speed != SPEED_UNFORCED)  in mv88e6393x_port_set_speed_duplex()
501 	if (speed != SPEED_UNFORCED)  in mv88e6393x_port_set_speed_duplex()
502 		dev_dbg(chip->dev, "p%d: Speed set to %d Mbps\n", port, speed);  in mv88e6393x_port_set_speed_duplex()
504 		dev_dbg(chip->dev, "p%d: Speed unforced\n", port);  in mv88e6393x_port_set_speed_duplex()
505 	dev_dbg(chip->dev, "p%d: %s %s duplex\n", port,  in mv88e6393x_port_set_speed_duplex()
519 	if (chip->info->prod_num == MV88E6XXX_PORT_SWITCH_ID_PROD_6361)  in mv88e6393x_port_max_speed_mode()
578 	if (cmode == chip->ports[port].cmode && !force)  in mv88e6xxx_port_set_cmode()
581 	chip->ports[port].cmode = 0;  in mv88e6xxx_port_set_cmode()
595 		chip->ports[port].cmode = cmode;  in mv88e6xxx_port_set_cmode()
605 		return -EOPNOTSUPP;  in mv88e6390x_port_set_cmode()
614 		return -EOPNOTSUPP;  in mv88e6390_port_set_cmode()
622 		return -EINVAL;  in mv88e6390_port_set_cmode()
637 		return -EOPNOTSUPP;  in mv88e6393x_port_set_cmode()
646 			return -EINVAL;  in mv88e6393x_port_set_cmode()
673 		return -EOPNOTSUPP;  in mv88e6341_port_set_cmode_writable()
675 	addr = chip->info->port_base_addr + port;  in mv88e6341_port_set_cmode_writable()
697 		return -EOPNOTSUPP;  in mv88e6341_port_set_cmode()
705 		return -EINVAL;  in mv88e6341_port_set_cmode()
809 		return -EINVAL;  in mv88e6xxx_port_set_state()
818 	dev_dbg(chip->dev, "p%d: PortState set to %s\n", port,  in mv88e6xxx_port_set_state()
850 		return -EINVAL;  in mv88e6xxx_port_set_egress_mode()
876 		return -EINVAL;  in mv88e6085_port_set_frame_mode()
908 		return -EINVAL;  in mv88e6351_port_set_frame_mode()
1009 /* Offset 0x06: Port Based VLAN Map */
1011 int mv88e6xxx_port_set_vlan_map(struct mv88e6xxx_chip *chip, int port, u16 map)  in mv88e6xxx_port_set_vlan_map()  argument
1022 	reg |= map & mask;  in mv88e6xxx_port_set_vlan_map()
1028 	dev_dbg(chip->dev, "p%d: VLANTable set to %.3x\n", port, map);  in mv88e6xxx_port_set_vlan_map()
1035 	const u16 upper_mask = (mv88e6xxx_num_databases(chip) - 1) >> 4;  in mv88e6xxx_port_get_fid()
1061 	const u16 upper_mask = (mv88e6xxx_num_databases(chip) - 1) >> 4;  in mv88e6xxx_port_set_fid()
1066 		return -EINVAL;  in mv88e6xxx_port_set_fid()
1096 	dev_dbg(chip->dev, "p%d: FID set to %u\n", port, fid);  in mv88e6xxx_port_set_fid()
1136 	dev_dbg(chip->dev, "p%d: DefaultVID set to %u\n", port, pvid);  in mv88e6xxx_port_set_pvid()
1200 		mirror_port = &chip->ports[port].mirror_ingress;  in mv88e6xxx_port_set_mirror()
1204 		mirror_port = &chip->ports[port].mirror_egress;  in mv88e6xxx_port_set_mirror()
1207 		return -EINVAL;  in mv88e6xxx_port_set_mirror()
1267 	dev_dbg(chip->dev, "p%d: 802.1QMode set to %s\n", port,  in mv88e6xxx_port_set_8021q_mode()
1294 int mv88e6xxx_port_set_map_da(struct mv88e6xxx_chip *chip, int port, bool map)  in mv88e6xxx_port_set_map_da()  argument
1303 	if (map)  in mv88e6xxx_port_set_map_da()
1332 		return -ERANGE;  in mv88e6165_port_set_jumbo_size()
1426 		if (dsa_is_unused_port(chip->ds, port))  in mv88e6393x_port_policy_write_all()
1544 /* Offset 0x18: Port IEEE Priority Remapping Registers [0-3]
1545  * Offset 0x19: Port IEEE Priority Remapping Registers [4-7]
1649 		return -EOPNOTSUPP;  in mv88e6xxx_port_policy_mapping_get_pos()
1666 		return -EOPNOTSUPP;  in mv88e6xxx_port_policy_mapping_get_pos()
1710 	/* The 16-bit Port Policy CTL register from older chips is on 6393x  in mv88e6393x_port_set_policy()
1712 	 * indirectly. The original 16-bit value is divided into two 8-bit  in mv88e6393x_port_set_policy()