Lines Matching full:sdr
826 const struct nand_sdr_timings *sdr; in davinci_nand_setup_interface() local
833 sdr = nand_get_sdr_timings(conf); in davinci_nand_setup_interface()
834 if (IS_ERR(sdr)) in davinci_nand_setup_interface()
835 return PTR_ERR(sdr); in davinci_nand_setup_interface()
837 cfg = TO_CYCLES(sdr->tCLR_min, cyc_ns) - 1; in davinci_nand_setup_interface()
840 cfg = max_t(s32, TO_CYCLES(sdr->tREA_max + MAX_TSU_PS, cyc_ns), in davinci_nand_setup_interface()
841 TO_CYCLES(sdr->tRP_min, cyc_ns)) - 1; in davinci_nand_setup_interface()
844 min = TO_CYCLES(sdr->tCEA_max + MAX_TSU_PS, cyc_ns) - 2; in davinci_nand_setup_interface()
848 cfg = TO_CYCLES((s32)(MAX_TH_PS - sdr->tCHZ_max), cyc_ns) - 1; in davinci_nand_setup_interface()
851 min = TO_CYCLES(sdr->tRC_min, cyc_ns) - 3; in davinci_nand_setup_interface()
855 cfg = TO_CYCLES((s32)(sdr->tRHZ_max - (timings.rhold + 1) * cyc_ns * 1000), cyc_ns); in davinci_nand_setup_interface()
856 cfg = max_t(s32, cfg, TO_CYCLES(sdr->tCHZ_max, cyc_ns)) - 1; in davinci_nand_setup_interface()
859 cfg = TO_CYCLES(sdr->tWP_min, cyc_ns) - 1; in davinci_nand_setup_interface()
862 cfg = max_t(s32, TO_CYCLES(sdr->tCLS_min, cyc_ns), TO_CYCLES(sdr->tALS_min, cyc_ns)); in davinci_nand_setup_interface()
863 cfg = max_t(s32, cfg, TO_CYCLES(sdr->tCS_min, cyc_ns)) - 1; in davinci_nand_setup_interface()
866 min = TO_CYCLES(sdr->tDS_min, cyc_ns) - 2; in davinci_nand_setup_interface()
870 cfg = max_t(s32, TO_CYCLES(sdr->tCLH_min, cyc_ns), TO_CYCLES(sdr->tALH_min, cyc_ns)); in davinci_nand_setup_interface()
871 cfg = max_t(s32, cfg, TO_CYCLES(sdr->tCH_min, cyc_ns)); in davinci_nand_setup_interface()
872 cfg = max_t(s32, cfg, TO_CYCLES(sdr->tDH_min, cyc_ns)) - 1; in davinci_nand_setup_interface()
875 min = TO_CYCLES(sdr->tWC_min, cyc_ns) - 2; in davinci_nand_setup_interface()