28 #define CAFE_NAND_CTRL1		0x00
29 #define CAFE_NAND_CTRL2		0x04
30 #define CAFE_NAND_CTRL3		0x08
31 #define CAFE_NAND_STATUS	0x0c
32 #define CAFE_NAND_IRQ		0x10
33 #define CAFE_NAND_IRQ_MASK	0x14
34 #define CAFE_NAND_DATA_LEN	0x18
35 #define CAFE_NAND_ADDR1		0x1c
36 #define CAFE_NAND_ADDR2		0x20
37 #define CAFE_NAND_TIMING1	0x24
38 #define CAFE_NAND_TIMING2	0x28
39 #define CAFE_NAND_TIMING3	0x2c
40 #define CAFE_NAND_NONMEM	0x30
41 #define CAFE_NAND_ECC_RESULT	0x3C
42 #define CAFE_NAND_DMA_CTRL	0x40
43 #define CAFE_NAND_DMA_ADDR0	0x44
44 #define CAFE_NAND_DMA_ADDR1	0x48
45 #define CAFE_NAND_ECC_SYN01	0x50
46 #define CAFE_NAND_ECC_SYN23	0x54
47 #define CAFE_NAND_ECC_SYN45	0x58
48 #define CAFE_NAND_ECC_SYN67	0x5c
49 #define CAFE_NAND_READ_DATA	0x1000
50 #define CAFE_NAND_WRITE_DATA	0x2000
52 #define CAFE_GLOBAL_CTRL	0x3004
53 #define CAFE_GLOBAL_IRQ		0x3008
54 #define CAFE_GLOBAL_IRQ_MASK	0x300c
55 #define CAFE_NAND_RESET		0x3034
79 static int skipbbt = 0;
82 static int debug = 0;
85 static int regdebug = 0;
98 #define cafe_dev_dbg(dev, args...) do { if (debug) dev_dbg(dev, ##args); } while(0)
107 	int result = !!(cafe_readl(cafe, NAND_STATUS) & 0x40000000);  in cafe_device_ready()
131 	cafe_dev_dbg(&cafe->pdev->dev, "Copy 0x%x bytes to write buffer. datalen 0x%x\n",  in cafe_write_buf()
144 	cafe_dev_dbg(&cafe->pdev->dev, "Copy 0x%x bytes from position 0x%x in read buffer.\n",  in cafe_read_buf()
165 	int adrbytes = 0;  in cafe_nand_cmdfunc()
167 	uint32_t doneint = 0x80000000;  in cafe_nand_cmdfunc()
169 	cafe_dev_dbg(&cafe->pdev->dev, "cmdfunc %02x, 0x%x, 0x%x\n",  in cafe_nand_cmdfunc()
174 		cafe_writel(cafe, cafe->ctl2 | 0x100 | command, NAND_CTRL2);  in cafe_nand_cmdfunc()
182 	cafe_writel(cafe, 0, NAND_CTRL2);  in cafe_nand_cmdfunc()
200 		cafe_writel(cafe, page_addr & 0xffff, NAND_ADDR1);  in cafe_nand_cmdfunc()
209 	cafe->data_pos = cafe->datalen = 0;  in cafe_nand_cmdfunc()
212 	ctl1 = 0x80000000 | command | (cafe->ctl1 & CTRL1_CHIPSELECT);  in cafe_nand_cmdfunc()
243 		cafe_writel(cafe, cafe->ctl2 | 0x100 | NAND_CMD_RNDOUTSTART, NAND_CTRL2);  in cafe_nand_cmdfunc()
245 		cafe_writel(cafe, cafe->ctl2 | 0x100 | NAND_CMD_READSTART, NAND_CTRL2);  in cafe_nand_cmdfunc()
253 	cafe_writel(cafe, 0x90000000, NAND_IRQ);  in cafe_nand_cmdfunc()
255 		uint32_t dmactl = 0xc0000000 + cafe->datalen;  in cafe_nand_cmdfunc()
262 			doneint = 0x10000000;  in cafe_nand_cmdfunc()
266 	cafe->datalen = 0;  in cafe_nand_cmdfunc()
270 		printk("About to write command %08x to register 0\n", ctl1);  in cafe_nand_cmdfunc()
271 		for (i=4; i< 0x5c; i+=4)  in cafe_nand_cmdfunc()
284 		for (c = 500000; c != 0; c--) {  in cafe_nand_cmdfunc()
337 	cafe_writel(cafe, irqs & ~0x90000000, NAND_IRQ);  in cafe_nand_interrupt()
358 	return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize);  in cafe_nand_read_oob()
375 	unsigned int max_bitflips = 0;  in cafe_nand_read_page()
381 	nand_read_page_op(chip, page, 0, buf, mtd->writesize);  in cafe_nand_read_page()
390 		for (i=0; i<8; i+=2) {  in cafe_nand_read_page()
393 			syn[i] = cafe->rs->codec->index_of[tmp & 0xfff];  in cafe_nand_read_page()
394 			syn[i+1] = cafe->rs->codec->index_of[(tmp >> 16) & 0xfff];  in cafe_nand_read_page()
397 		n = decode_rs16(cafe->rs, NULL, NULL, 1367, syn, 0, pos, 0,  in cafe_nand_read_page()
400 		for (i = 0; i < n; i++) {  in cafe_nand_read_page()
408 			} else if (p == 0) {  in cafe_nand_read_page()
410 				if (pat[i] > 0xff)  in cafe_nand_read_page()
413 					buf[0] ^= pat[i];  in cafe_nand_read_page()
416 				oob[0] ^= pat[i] << 4;  in cafe_nand_read_page()
434 		if (n < 0) {  in cafe_nand_read_page()
437 			for (i = 0; i < 0x5c; i += 4)  in cafe_nand_read_page()
458 	oobregion->offset = 0;  in cafe_ooblayout_ecc()
461 	return 0;  in cafe_ooblayout_ecc()
475 	return 0;  in cafe_ooblayout_free()
485 static uint8_t cafe_bbt_pattern_2048[] = { 'B', 'b', 't', '0' };
488 static uint8_t cafe_bbt_pattern_512[] = { 0xBB };
489 static uint8_t cafe_mirror_pattern_512[] = { 0xBC };
540 	nand_prog_page_begin_op(chip, page, 0, buf, mtd->writesize);  in cafe_nand_write_page_lowlevel()
555 	c = 0;  in gf64_mul()
556 	for (i = 0; i < 6; i++) {  in gf64_mul()
561 		if ((b & 0x40) != 0)  in gf64_mul()
562 			b ^= 0x43;  in gf64_mul()
574 	al = a & 0x3f;  in gf4096_mul()
576 	bl = b & 0x3f;  in gf4096_mul()
579 	cl = gf64_mul(gf64_mul(ah, bh), 0x21) ^ gf64_mul(al, bl);  in gf4096_mul()
586 	if (x == 0)  in cafe_mul()
588 	return gf4096_mul(x, 0xe01);  in cafe_mul()
595 	int err = 0;  in cafe_nand_attach_chip()
642 	return 0;  in cafe_nand_attach_chip()
668 	int err = 0;  in cafe_nand_probe()
692 	cafe->mmio = pci_iomap(pdev, 0, 0);  in cafe_nand_probe()
699 	cafe->rs = init_rs_non_canonical(12, &cafe_mul, 0, 1, 8);  in cafe_nand_probe()
714 	cafe->nand.legacy.chip_delay = 0;  in cafe_nand_probe()
728 			     timing[0], timing[1], timing[2]);  in cafe_nand_probe()
730 		timing[0] = cafe_readl(cafe, NAND_TIMING1);  in cafe_nand_probe()
734 		if (timing[0] | timing[1] | timing[2]) {  in cafe_nand_probe()
736 				     timing[0], timing[1], timing[2]);  in cafe_nand_probe()
739 			timing[0] = timing[1] = timing[2] = 0xffffffff;  in cafe_nand_probe()
745 	cafe_writel(cafe, 0, NAND_RESET);  in cafe_nand_probe()
747 	cafe_writel(cafe, timing[0], NAND_TIMING1);  in cafe_nand_probe()
751 	cafe_writel(cafe, 0xffffffff, NAND_IRQ_MASK);  in cafe_nand_probe()
761 	ctrl &= 0xffffeff0;  in cafe_nand_probe()
762 	ctrl |= 0x00007000;  in cafe_nand_probe()
763 	cafe_writel(cafe, ctrl | 0x05, GLOBAL_CTRL);  in cafe_nand_probe()
764 	cafe_writel(cafe, ctrl | 0x0a, GLOBAL_CTRL);  in cafe_nand_probe()
765 	cafe_writel(cafe, 0, NAND_DMA_CTRL);  in cafe_nand_probe()
767 	cafe_writel(cafe, 0x7006, GLOBAL_CTRL);  in cafe_nand_probe()
768 	cafe_writel(cafe, 0x700a, GLOBAL_CTRL);  in cafe_nand_probe()
771 	cafe_writel(cafe, 0x80000007, GLOBAL_IRQ_MASK);  in cafe_nand_probe()
777 	cafe->usedma = 0;  in cafe_nand_probe()
788 	err = mtd_device_parse_register(mtd, part_probes, NULL, NULL, 0);  in cafe_nand_probe()
849 	cafe_writel(cafe, 0, NAND_RESET);  in cafe_nand_resume()
850 	cafe_writel(cafe, 0xffffffff, NAND_IRQ_MASK);  in cafe_nand_resume()
853 	cafe_writel(cafe, timing[0], NAND_TIMING1);  in cafe_nand_resume()
859 	ctrl &= 0xffffeff0;  in cafe_nand_resume()
860 	ctrl |= 0x00007000;  in cafe_nand_resume()
861 	cafe_writel(cafe, ctrl | 0x05, GLOBAL_CTRL);  in cafe_nand_resume()
862 	cafe_writel(cafe, ctrl | 0x0a, GLOBAL_CTRL);  in cafe_nand_resume()
863 	cafe_writel(cafe, 0, NAND_DMA_CTRL);  in cafe_nand_resume()
864 	cafe_writel(cafe, 0x7006, GLOBAL_CTRL);  in cafe_nand_resume()
865 	cafe_writel(cafe, 0x700a, GLOBAL_CTRL);  in cafe_nand_resume()
868 	cafe_writel(cafe, cafe->dmaaddr & 0xffffffff, NAND_DMA_ADDR0);  in cafe_nand_resume()
873 		cafe_writel(cafe, 0, NAND_DMA_ADDR1);  in cafe_nand_resume()
876 	cafe_writel(cafe, 0x80000007, GLOBAL_IRQ_MASK);  in cafe_nand_resume()
877 	return 0;  in cafe_nand_resume()