Lines Matching +full:sh +full:- +full:mmcif
1 // SPDX-License-Identifier: GPL-2.0
3 * MMCIF eMMC driver.
10 * The MMCIF driver is now processing MMC requests asynchronously, according
13 * The MMCIF driver processes MMC requests in up to 3 stages: command, optional
23 * request- and stage-specific handler methods.
39 #include <linux/dma-mapping.h>
46 #include <linux/mmc/slot-gpio.h>
250 { .compatible = "renesas,sh-mmcif" },
255 #define sh_mmcif_host_to_dev(host) (&host->pd->dev)
260 writel(val | readl(host->addr + reg), host->addr + reg); in sh_mmcif_bitset()
266 writel(~val & readl(host->addr + reg), host->addr + reg); in sh_mmcif_bitclr()
272 struct mmc_request *mrq = host->mrq; in sh_mmcif_dma_complete()
277 if (WARN(!mrq || !mrq->data, "%s: NULL data in DMA completion!\n", in sh_mmcif_dma_complete()
281 complete(&host->dma_complete); in sh_mmcif_dma_complete()
286 struct mmc_data *data = host->mrq->data; in sh_mmcif_start_dma_rx()
287 struct scatterlist *sg = data->sg; in sh_mmcif_start_dma_rx()
289 struct dma_chan *chan = host->chan_rx; in sh_mmcif_start_dma_rx()
291 dma_cookie_t cookie = -EINVAL; in sh_mmcif_start_dma_rx()
294 ret = dma_map_sg(chan->device->dev, sg, data->sg_len, in sh_mmcif_start_dma_rx()
297 host->dma_active = true; in sh_mmcif_start_dma_rx()
303 desc->callback = sh_mmcif_dma_complete; in sh_mmcif_start_dma_rx()
304 desc->callback_param = host; in sh_mmcif_start_dma_rx()
309 dev_dbg(dev, "%s(): mapped %d -> %d, cookie %d\n", in sh_mmcif_start_dma_rx()
310 __func__, data->sg_len, ret, cookie); in sh_mmcif_start_dma_rx()
315 ret = -EIO; in sh_mmcif_start_dma_rx()
316 host->chan_rx = NULL; in sh_mmcif_start_dma_rx()
317 host->dma_active = false; in sh_mmcif_start_dma_rx()
320 chan = host->chan_tx; in sh_mmcif_start_dma_rx()
322 host->chan_tx = NULL; in sh_mmcif_start_dma_rx()
331 desc, cookie, data->sg_len); in sh_mmcif_start_dma_rx()
336 struct mmc_data *data = host->mrq->data; in sh_mmcif_start_dma_tx()
337 struct scatterlist *sg = data->sg; in sh_mmcif_start_dma_tx()
339 struct dma_chan *chan = host->chan_tx; in sh_mmcif_start_dma_tx()
341 dma_cookie_t cookie = -EINVAL; in sh_mmcif_start_dma_tx()
344 ret = dma_map_sg(chan->device->dev, sg, data->sg_len, in sh_mmcif_start_dma_tx()
347 host->dma_active = true; in sh_mmcif_start_dma_tx()
353 desc->callback = sh_mmcif_dma_complete; in sh_mmcif_start_dma_tx()
354 desc->callback_param = host; in sh_mmcif_start_dma_tx()
359 dev_dbg(dev, "%s(): mapped %d -> %d, cookie %d\n", in sh_mmcif_start_dma_tx()
360 __func__, data->sg_len, ret, cookie); in sh_mmcif_start_dma_tx()
365 ret = -EIO; in sh_mmcif_start_dma_tx()
366 host->chan_tx = NULL; in sh_mmcif_start_dma_tx()
367 host->dma_active = false; in sh_mmcif_start_dma_tx()
370 chan = host->chan_rx; in sh_mmcif_start_dma_tx()
372 host->chan_rx = NULL; in sh_mmcif_start_dma_tx()
404 res = platform_get_resource(host->pd, IORESOURCE_MEM, 0); in sh_mmcif_dma_slave_config()
406 return -EINVAL; in sh_mmcif_dma_slave_config()
411 cfg.src_addr = res->start + MMCIF_CE_DATA; in sh_mmcif_dma_slave_config()
414 cfg.dst_addr = res->start + MMCIF_CE_DATA; in sh_mmcif_dma_slave_config()
424 host->dma_active = false; in sh_mmcif_request_dma()
427 if (IS_ENABLED(CONFIG_SUPERH) && dev->platform_data) { in sh_mmcif_request_dma()
428 struct sh_mmcif_plat_data *pdata = dev->platform_data; in sh_mmcif_request_dma()
430 host->chan_tx = sh_mmcif_request_dma_pdata(host, in sh_mmcif_request_dma()
431 pdata->slave_id_tx); in sh_mmcif_request_dma()
432 host->chan_rx = sh_mmcif_request_dma_pdata(host, in sh_mmcif_request_dma()
433 pdata->slave_id_rx); in sh_mmcif_request_dma()
435 host->chan_tx = dma_request_chan(dev, "tx"); in sh_mmcif_request_dma()
436 if (IS_ERR(host->chan_tx)) in sh_mmcif_request_dma()
437 host->chan_tx = NULL; in sh_mmcif_request_dma()
438 host->chan_rx = dma_request_chan(dev, "rx"); in sh_mmcif_request_dma()
439 if (IS_ERR(host->chan_rx)) in sh_mmcif_request_dma()
440 host->chan_rx = NULL; in sh_mmcif_request_dma()
443 if (!host->chan_tx || !host->chan_rx || in sh_mmcif_request_dma()
444 sh_mmcif_dma_slave_config(host, host->chan_tx, DMA_MEM_TO_DEV) || in sh_mmcif_request_dma()
445 sh_mmcif_dma_slave_config(host, host->chan_rx, DMA_DEV_TO_MEM)) in sh_mmcif_request_dma()
448 dev_dbg(dev, "%s: got channel TX %p RX %p\n", __func__, host->chan_tx, in sh_mmcif_request_dma()
449 host->chan_rx); in sh_mmcif_request_dma()
454 if (host->chan_tx) in sh_mmcif_request_dma()
455 dma_release_channel(host->chan_tx); in sh_mmcif_request_dma()
456 if (host->chan_rx) in sh_mmcif_request_dma()
457 dma_release_channel(host->chan_rx); in sh_mmcif_request_dma()
458 host->chan_tx = host->chan_rx = NULL; in sh_mmcif_request_dma()
465 if (host->chan_tx) { in sh_mmcif_release_dma()
466 struct dma_chan *chan = host->chan_tx; in sh_mmcif_release_dma()
467 host->chan_tx = NULL; in sh_mmcif_release_dma()
470 if (host->chan_rx) { in sh_mmcif_release_dma()
471 struct dma_chan *chan = host->chan_rx; in sh_mmcif_release_dma()
472 host->chan_rx = NULL; in sh_mmcif_release_dma()
476 host->dma_active = false; in sh_mmcif_release_dma()
482 struct sh_mmcif_plat_data *p = dev->platform_data; in sh_mmcif_clock_control()
483 bool sup_pclk = p ? p->sup_pclk : false; in sh_mmcif_clock_control()
484 unsigned int current_clk = clk_get_rate(host->clk); in sh_mmcif_clock_control()
493 if (host->clkdiv_map) { in sh_mmcif_clock_control()
500 for (i = 31; i >= 0; i--) { in sh_mmcif_clock_control()
501 if (!((1 << i) & host->clkdiv_map)) in sh_mmcif_clock_control()
506 * -> parent_freq = clk x div in sh_mmcif_clock_control()
510 freq = clk_round_rate(host->clk, clk * div); in sh_mmcif_clock_control()
512 diff = (myclk > clk) ? myclk - clk : clk - myclk; in sh_mmcif_clock_control()
524 clk_set_rate(host->clk, best_freq); in sh_mmcif_clock_control()
529 clkdiv = (fls(DIV_ROUND_UP(current_clk, clk) - 1) - 1) << 16; in sh_mmcif_clock_control()
540 tmp = 0x010f0000 & sh_mmcif_readl(host->addr, MMCIF_CE_CLK_CTRL); in sh_mmcif_sync_reset()
542 sh_mmcif_writel(host->addr, MMCIF_CE_VERSION, SOFT_RST_ON); in sh_mmcif_sync_reset()
543 sh_mmcif_writel(host->addr, MMCIF_CE_VERSION, SOFT_RST_OFF); in sh_mmcif_sync_reset()
544 if (host->ccs_enable) in sh_mmcif_sync_reset()
546 if (host->clk_ctrl2_enable) in sh_mmcif_sync_reset()
547 sh_mmcif_writel(host->addr, MMCIF_CE_CLK_CTRL2, 0x0F0F0000); in sh_mmcif_sync_reset()
560 host->sd_error = false; in sh_mmcif_error_manage()
562 state1 = sh_mmcif_readl(host->addr, MMCIF_CE_HOST_STS1); in sh_mmcif_error_manage()
563 state2 = sh_mmcif_readl(host->addr, MMCIF_CE_HOST_STS2); in sh_mmcif_error_manage()
570 for (timeout = 10000; timeout; timeout--) { in sh_mmcif_error_manage()
571 if (!(sh_mmcif_readl(host->addr, MMCIF_CE_HOST_STS1) in sh_mmcif_error_manage()
579 return -EIO; in sh_mmcif_error_manage()
583 return -EIO; in sh_mmcif_error_manage()
588 host->state, host->wait_for); in sh_mmcif_error_manage()
589 ret = -EIO; in sh_mmcif_error_manage()
592 host->state, host->wait_for); in sh_mmcif_error_manage()
593 ret = -ETIMEDOUT; in sh_mmcif_error_manage()
596 host->state, host->wait_for); in sh_mmcif_error_manage()
597 ret = -EIO; in sh_mmcif_error_manage()
605 struct mmc_data *data = mrq->data; in sh_mmcif_single_read()
607 host->blocksize = (sh_mmcif_readl(host->addr, MMCIF_CE_BLOCK_SET) & in sh_mmcif_single_read()
610 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, in sh_mmcif_single_read()
613 host->wait_for = MMCIF_WAIT_FOR_READ; in sh_mmcif_single_read()
621 struct sg_mapping_iter *sgm = &host->sg_miter; in sh_mmcif_read_block()
623 struct mmc_data *data = host->mrq->data; in sh_mmcif_read_block()
627 if (host->sd_error) { in sh_mmcif_read_block()
629 data->error = sh_mmcif_error_manage(host); in sh_mmcif_read_block()
630 dev_dbg(dev, "%s(): %d\n", __func__, data->error); in sh_mmcif_read_block()
640 p = sgm->addr; in sh_mmcif_read_block()
642 for (i = 0; i < host->blocksize / 4; i++) in sh_mmcif_read_block()
643 *p++ = sh_mmcif_readl(host->addr, MMCIF_CE_DATA); in sh_mmcif_read_block()
645 sg_miter_stop(&host->sg_miter); in sh_mmcif_read_block()
649 host->wait_for = MMCIF_WAIT_FOR_READ_END; in sh_mmcif_read_block()
657 struct sg_mapping_iter *sgm = &host->sg_miter; in sh_mmcif_multi_read()
658 struct mmc_data *data = mrq->data; in sh_mmcif_multi_read()
660 if (!data->sg_len || !data->sg->length) in sh_mmcif_multi_read()
663 host->blocksize = sh_mmcif_readl(host->addr, MMCIF_CE_BLOCK_SET) & in sh_mmcif_multi_read()
666 sg_miter_start(sgm, data->sg, data->sg_len, in sh_mmcif_multi_read()
675 host->wait_for = MMCIF_WAIT_FOR_MREAD; in sh_mmcif_multi_read()
682 struct sg_mapping_iter *sgm = &host->sg_miter; in sh_mmcif_mread_block()
684 struct mmc_data *data = host->mrq->data; in sh_mmcif_mread_block()
688 if (host->sd_error) { in sh_mmcif_mread_block()
690 data->error = sh_mmcif_error_manage(host); in sh_mmcif_mread_block()
691 dev_dbg(dev, "%s(): %d\n", __func__, data->error); in sh_mmcif_mread_block()
695 p = sgm->addr; in sh_mmcif_mread_block()
697 for (i = 0; i < host->blocksize / 4; i++) in sh_mmcif_mread_block()
698 *p++ = sh_mmcif_readl(host->addr, MMCIF_CE_DATA); in sh_mmcif_mread_block()
700 sgm->consumed = host->blocksize; in sh_mmcif_mread_block()
715 struct mmc_data *data = mrq->data; in sh_mmcif_single_write()
717 host->blocksize = (sh_mmcif_readl(host->addr, MMCIF_CE_BLOCK_SET) & in sh_mmcif_single_write()
720 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, in sh_mmcif_single_write()
723 host->wait_for = MMCIF_WAIT_FOR_WRITE; in sh_mmcif_single_write()
731 struct sg_mapping_iter *sgm = &host->sg_miter; in sh_mmcif_write_block()
733 struct mmc_data *data = host->mrq->data; in sh_mmcif_write_block()
737 if (host->sd_error) { in sh_mmcif_write_block()
739 data->error = sh_mmcif_error_manage(host); in sh_mmcif_write_block()
740 dev_dbg(dev, "%s(): %d\n", __func__, data->error); in sh_mmcif_write_block()
750 p = sgm->addr; in sh_mmcif_write_block()
752 for (i = 0; i < host->blocksize / 4; i++) in sh_mmcif_write_block()
753 sh_mmcif_writel(host->addr, MMCIF_CE_DATA, *p++); in sh_mmcif_write_block()
755 sg_miter_stop(&host->sg_miter); in sh_mmcif_write_block()
759 host->wait_for = MMCIF_WAIT_FOR_WRITE_END; in sh_mmcif_write_block()
767 struct sg_mapping_iter *sgm = &host->sg_miter; in sh_mmcif_multi_write()
768 struct mmc_data *data = mrq->data; in sh_mmcif_multi_write()
770 if (!data->sg_len || !data->sg->length) in sh_mmcif_multi_write()
773 host->blocksize = sh_mmcif_readl(host->addr, MMCIF_CE_BLOCK_SET) & in sh_mmcif_multi_write()
776 sg_miter_start(sgm, data->sg, data->sg_len, in sh_mmcif_multi_write()
785 host->wait_for = MMCIF_WAIT_FOR_MWRITE; in sh_mmcif_multi_write()
792 struct sg_mapping_iter *sgm = &host->sg_miter; in sh_mmcif_mwrite_block()
794 struct mmc_data *data = host->mrq->data; in sh_mmcif_mwrite_block()
798 if (host->sd_error) { in sh_mmcif_mwrite_block()
800 data->error = sh_mmcif_error_manage(host); in sh_mmcif_mwrite_block()
801 dev_dbg(dev, "%s(): %d\n", __func__, data->error); in sh_mmcif_mwrite_block()
805 p = sgm->addr; in sh_mmcif_mwrite_block()
807 for (i = 0; i < host->blocksize / 4; i++) in sh_mmcif_mwrite_block()
808 sh_mmcif_writel(host->addr, MMCIF_CE_DATA, *p++); in sh_mmcif_mwrite_block()
810 sgm->consumed = host->blocksize; in sh_mmcif_mwrite_block()
825 if (cmd->flags & MMC_RSP_136) { in sh_mmcif_get_response()
826 cmd->resp[0] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP3); in sh_mmcif_get_response()
827 cmd->resp[1] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP2); in sh_mmcif_get_response()
828 cmd->resp[2] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP1); in sh_mmcif_get_response()
829 cmd->resp[3] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP0); in sh_mmcif_get_response()
831 cmd->resp[0] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP0); in sh_mmcif_get_response()
837 cmd->resp[0] = sh_mmcif_readl(host->addr, MMCIF_CE_RESP_CMD12); in sh_mmcif_get_cmd12response()
844 struct mmc_data *data = mrq->data; in sh_mmcif_set_cmd()
845 struct mmc_command *cmd = mrq->cmd; in sh_mmcif_set_cmd()
846 u32 opc = cmd->opcode; in sh_mmcif_set_cmd()
872 switch (host->bus_width) { in sh_mmcif_set_cmd()
886 switch (host->timing) { in sh_mmcif_set_cmd()
891 * capability. MMCIF implementations with this in sh_mmcif_set_cmd()
906 data->blocks << 16); in sh_mmcif_set_cmd()
944 return -EINVAL; in sh_mmcif_data_trans()
951 struct mmc_command *cmd = mrq->cmd; in sh_mmcif_start_cmd()
956 if (cmd->flags & MMC_RSP_BUSY) in sh_mmcif_start_cmd()
961 if (host->ccs_enable) in sh_mmcif_start_cmd()
964 if (mrq->data) { in sh_mmcif_start_cmd()
965 sh_mmcif_writel(host->addr, MMCIF_CE_BLOCK_SET, 0); in sh_mmcif_start_cmd()
966 sh_mmcif_writel(host->addr, MMCIF_CE_BLOCK_SET, in sh_mmcif_start_cmd()
967 mrq->data->blksz); in sh_mmcif_start_cmd()
971 if (host->ccs_enable) in sh_mmcif_start_cmd()
972 sh_mmcif_writel(host->addr, MMCIF_CE_INT, 0xD80430C0); in sh_mmcif_start_cmd()
974 sh_mmcif_writel(host->addr, MMCIF_CE_INT, 0xD80430C0 | INT_CCS); in sh_mmcif_start_cmd()
975 sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, mask); in sh_mmcif_start_cmd()
977 sh_mmcif_writel(host->addr, MMCIF_CE_ARG, cmd->arg); in sh_mmcif_start_cmd()
979 spin_lock_irqsave(&host->lock, flags); in sh_mmcif_start_cmd()
980 sh_mmcif_writel(host->addr, MMCIF_CE_CMD_SET, opc); in sh_mmcif_start_cmd()
982 host->wait_for = MMCIF_WAIT_FOR_CMD; in sh_mmcif_start_cmd()
983 schedule_delayed_work(&host->timeout_work, host->timeout); in sh_mmcif_start_cmd()
984 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_start_cmd()
992 switch (mrq->cmd->opcode) { in sh_mmcif_stop_cmd()
1001 mrq->stop->error = sh_mmcif_error_manage(host); in sh_mmcif_stop_cmd()
1005 host->wait_for = MMCIF_WAIT_FOR_STOP; in sh_mmcif_stop_cmd()
1014 spin_lock_irqsave(&host->lock, flags); in sh_mmcif_request()
1015 if (host->state != STATE_IDLE) { in sh_mmcif_request()
1017 __func__, host->state); in sh_mmcif_request()
1018 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_request()
1019 mrq->cmd->error = -EAGAIN; in sh_mmcif_request()
1024 host->state = STATE_REQUEST; in sh_mmcif_request()
1025 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_request()
1027 host->mrq = mrq; in sh_mmcif_request()
1036 if (host->mmc->f_max) { in sh_mmcif_clk_setup()
1039 f_max = host->mmc->f_max; in sh_mmcif_clk_setup()
1041 f_min = clk_round_rate(host->clk, f_min_old / 2); in sh_mmcif_clk_setup()
1048 * This driver assumes this SoC is R-Car Gen2 or later in sh_mmcif_clk_setup()
1050 host->clkdiv_map = 0x3ff; in sh_mmcif_clk_setup()
1052 host->mmc->f_max = f_max >> ffs(host->clkdiv_map); in sh_mmcif_clk_setup()
1053 host->mmc->f_min = f_min >> fls(host->clkdiv_map); in sh_mmcif_clk_setup()
1055 unsigned int clk = clk_get_rate(host->clk); in sh_mmcif_clk_setup()
1057 host->mmc->f_max = clk / 2; in sh_mmcif_clk_setup()
1058 host->mmc->f_min = clk / 512; in sh_mmcif_clk_setup()
1062 host->mmc->f_max, host->mmc->f_min); in sh_mmcif_clk_setup()
1071 spin_lock_irqsave(&host->lock, flags); in sh_mmcif_set_ios()
1072 if (host->state != STATE_IDLE) { in sh_mmcif_set_ios()
1074 __func__, host->state); in sh_mmcif_set_ios()
1075 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_set_ios()
1079 host->state = STATE_IOS; in sh_mmcif_set_ios()
1080 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_set_ios()
1082 switch (ios->power_mode) { in sh_mmcif_set_ios()
1084 if (!IS_ERR(mmc->supply.vmmc)) in sh_mmcif_set_ios()
1085 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); in sh_mmcif_set_ios()
1086 if (!host->power) { in sh_mmcif_set_ios()
1087 clk_prepare_enable(host->clk); in sh_mmcif_set_ios()
1091 host->power = true; in sh_mmcif_set_ios()
1095 if (!IS_ERR(mmc->supply.vmmc)) in sh_mmcif_set_ios()
1096 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); in sh_mmcif_set_ios()
1097 if (host->power) { in sh_mmcif_set_ios()
1101 clk_disable_unprepare(host->clk); in sh_mmcif_set_ios()
1102 host->power = false; in sh_mmcif_set_ios()
1106 sh_mmcif_clock_control(host, ios->clock); in sh_mmcif_set_ios()
1110 host->timing = ios->timing; in sh_mmcif_set_ios()
1111 host->bus_width = ios->bus_width; in sh_mmcif_set_ios()
1112 host->state = STATE_IDLE; in sh_mmcif_set_ios()
1123 struct mmc_command *cmd = host->mrq->cmd; in sh_mmcif_end_cmd()
1124 struct mmc_data *data = host->mrq->data; in sh_mmcif_end_cmd()
1128 if (host->sd_error) { in sh_mmcif_end_cmd()
1129 switch (cmd->opcode) { in sh_mmcif_end_cmd()
1133 cmd->error = -ETIMEDOUT; in sh_mmcif_end_cmd()
1136 cmd->error = sh_mmcif_error_manage(host); in sh_mmcif_end_cmd()
1140 cmd->opcode, cmd->error); in sh_mmcif_end_cmd()
1141 host->sd_error = false; in sh_mmcif_end_cmd()
1144 if (!(cmd->flags & MMC_RSP_PRESENT)) { in sh_mmcif_end_cmd()
1145 cmd->error = 0; in sh_mmcif_end_cmd()
1158 init_completion(&host->dma_complete); in sh_mmcif_end_cmd()
1160 if (data->flags & MMC_DATA_READ) { in sh_mmcif_end_cmd()
1161 if (host->chan_rx) in sh_mmcif_end_cmd()
1164 if (host->chan_tx) in sh_mmcif_end_cmd()
1168 if (!host->dma_active) { in sh_mmcif_end_cmd()
1169 data->error = sh_mmcif_data_trans(host, host->mrq, cmd->opcode); in sh_mmcif_end_cmd()
1170 return !data->error; in sh_mmcif_end_cmd()
1174 time = wait_for_completion_interruptible_timeout(&host->dma_complete, in sh_mmcif_end_cmd()
1175 host->timeout); in sh_mmcif_end_cmd()
1177 if (data->flags & MMC_DATA_READ) in sh_mmcif_end_cmd()
1178 dma_unmap_sg(host->chan_rx->device->dev, in sh_mmcif_end_cmd()
1179 data->sg, data->sg_len, in sh_mmcif_end_cmd()
1182 dma_unmap_sg(host->chan_tx->device->dev, in sh_mmcif_end_cmd()
1183 data->sg, data->sg_len, in sh_mmcif_end_cmd()
1186 if (host->sd_error) { in sh_mmcif_end_cmd()
1187 dev_err(host->mmc->parent, in sh_mmcif_end_cmd()
1190 data->error = sh_mmcif_error_manage(host); in sh_mmcif_end_cmd()
1192 dev_err(host->mmc->parent, "DMA timeout!\n"); in sh_mmcif_end_cmd()
1193 data->error = -ETIMEDOUT; in sh_mmcif_end_cmd()
1195 dev_err(host->mmc->parent, in sh_mmcif_end_cmd()
1197 data->error = time; in sh_mmcif_end_cmd()
1201 host->dma_active = false; in sh_mmcif_end_cmd()
1203 if (data->error) { in sh_mmcif_end_cmd()
1204 data->bytes_xfered = 0; in sh_mmcif_end_cmd()
1206 if (data->flags & MMC_DATA_READ) in sh_mmcif_end_cmd()
1207 dmaengine_terminate_sync(host->chan_rx); in sh_mmcif_end_cmd()
1209 dmaengine_terminate_sync(host->chan_tx); in sh_mmcif_end_cmd()
1224 spin_lock_irqsave(&host->lock, flags); in sh_mmcif_irqt()
1225 wait_work = host->wait_for; in sh_mmcif_irqt()
1226 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_irqt()
1228 cancel_delayed_work_sync(&host->timeout_work); in sh_mmcif_irqt()
1230 mutex_lock(&host->thread_lock); in sh_mmcif_irqt()
1232 mrq = host->mrq; in sh_mmcif_irqt()
1235 host->state, host->wait_for); in sh_mmcif_irqt()
1236 mutex_unlock(&host->thread_lock); in sh_mmcif_irqt()
1242 * request has to be completed - successfully or not in sh_mmcif_irqt()
1247 mutex_unlock(&host->thread_lock); in sh_mmcif_irqt()
1270 if (host->sd_error) { in sh_mmcif_irqt()
1271 mrq->stop->error = sh_mmcif_error_manage(host); in sh_mmcif_irqt()
1272 dev_dbg(dev, "%s(): %d\n", __func__, mrq->stop->error); in sh_mmcif_irqt()
1275 sh_mmcif_get_cmd12response(host, mrq->stop); in sh_mmcif_irqt()
1276 mrq->stop->error = 0; in sh_mmcif_irqt()
1280 if (host->sd_error) { in sh_mmcif_irqt()
1281 mrq->data->error = sh_mmcif_error_manage(host); in sh_mmcif_irqt()
1282 dev_dbg(dev, "%s(): %d\n", __func__, mrq->data->error); in sh_mmcif_irqt()
1290 schedule_delayed_work(&host->timeout_work, host->timeout); in sh_mmcif_irqt()
1292 mutex_unlock(&host->thread_lock); in sh_mmcif_irqt()
1296 if (host->wait_for != MMCIF_WAIT_FOR_STOP) { in sh_mmcif_irqt()
1297 struct mmc_data *data = mrq->data; in sh_mmcif_irqt()
1298 if (!mrq->cmd->error && data && !data->error) in sh_mmcif_irqt()
1299 data->bytes_xfered = in sh_mmcif_irqt()
1300 data->blocks * data->blksz; in sh_mmcif_irqt()
1302 if (mrq->stop && !mrq->cmd->error && (!data || !data->error)) { in sh_mmcif_irqt()
1304 if (!mrq->stop->error) { in sh_mmcif_irqt()
1305 schedule_delayed_work(&host->timeout_work, host->timeout); in sh_mmcif_irqt()
1306 mutex_unlock(&host->thread_lock); in sh_mmcif_irqt()
1312 host->wait_for = MMCIF_WAIT_FOR_REQUEST; in sh_mmcif_irqt()
1313 host->state = STATE_IDLE; in sh_mmcif_irqt()
1314 host->mrq = NULL; in sh_mmcif_irqt()
1315 mmc_request_done(host->mmc, mrq); in sh_mmcif_irqt()
1317 mutex_unlock(&host->thread_lock); in sh_mmcif_irqt()
1328 state = sh_mmcif_readl(host->addr, MMCIF_CE_INT); in sh_mmcif_intr()
1329 mask = sh_mmcif_readl(host->addr, MMCIF_CE_INT_MASK); in sh_mmcif_intr()
1330 if (host->ccs_enable) in sh_mmcif_intr()
1331 sh_mmcif_writel(host->addr, MMCIF_CE_INT, ~(state & mask)); in sh_mmcif_intr()
1333 sh_mmcif_writel(host->addr, MMCIF_CE_INT, INT_CCS | ~(state & mask)); in sh_mmcif_intr()
1341 host->sd_error = true; in sh_mmcif_intr()
1345 if (!host->mrq) in sh_mmcif_intr()
1347 if (!host->dma_active) in sh_mmcif_intr()
1349 else if (host->sd_error) in sh_mmcif_intr()
1362 struct mmc_request *mrq = host->mrq; in sh_mmcif_timeout_work()
1366 if (host->dying) in sh_mmcif_timeout_work()
1370 spin_lock_irqsave(&host->lock, flags); in sh_mmcif_timeout_work()
1371 if (host->state == STATE_IDLE) { in sh_mmcif_timeout_work()
1372 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_timeout_work()
1377 host->wait_for, mrq->cmd->opcode); in sh_mmcif_timeout_work()
1379 host->state = STATE_TIMEOUT; in sh_mmcif_timeout_work()
1380 spin_unlock_irqrestore(&host->lock, flags); in sh_mmcif_timeout_work()
1386 switch (host->wait_for) { in sh_mmcif_timeout_work()
1388 mrq->cmd->error = sh_mmcif_error_manage(host); in sh_mmcif_timeout_work()
1391 mrq->stop->error = sh_mmcif_error_manage(host); in sh_mmcif_timeout_work()
1399 mrq->data->error = sh_mmcif_error_manage(host); in sh_mmcif_timeout_work()
1405 host->state = STATE_IDLE; in sh_mmcif_timeout_work()
1406 host->wait_for = MMCIF_WAIT_FOR_REQUEST; in sh_mmcif_timeout_work()
1407 host->mrq = NULL; in sh_mmcif_timeout_work()
1408 mmc_request_done(host->mmc, mrq); in sh_mmcif_timeout_work()
1414 struct sh_mmcif_plat_data *pd = dev->platform_data; in sh_mmcif_init_ocr()
1415 struct mmc_host *mmc = host->mmc; in sh_mmcif_init_ocr()
1422 if (!mmc->ocr_avail) in sh_mmcif_init_ocr()
1423 mmc->ocr_avail = pd->ocr; in sh_mmcif_init_ocr()
1424 else if (pd->ocr) in sh_mmcif_init_ocr()
1433 struct device *dev = &pdev->dev; in sh_mmcif_probe()
1434 struct sh_mmcif_plat_data *pd = dev->platform_data; in sh_mmcif_probe()
1449 return -ENOMEM; in sh_mmcif_probe()
1456 host->mmc = mmc; in sh_mmcif_probe()
1457 host->addr = reg; in sh_mmcif_probe()
1458 host->timeout = msecs_to_jiffies(10000); in sh_mmcif_probe()
1459 host->ccs_enable = true; in sh_mmcif_probe()
1460 host->clk_ctrl2_enable = false; in sh_mmcif_probe()
1462 host->pd = pdev; in sh_mmcif_probe()
1464 spin_lock_init(&host->lock); in sh_mmcif_probe()
1466 mmc->ops = &sh_mmcif_ops; in sh_mmcif_probe()
1469 mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_WAIT_WHILE_BUSY; in sh_mmcif_probe()
1470 mmc->caps2 |= MMC_CAP2_NO_SD | MMC_CAP2_NO_SDIO; in sh_mmcif_probe()
1471 mmc->max_busy_timeout = 10000; in sh_mmcif_probe()
1473 if (pd && pd->caps) in sh_mmcif_probe()
1474 mmc->caps |= pd->caps; in sh_mmcif_probe()
1475 mmc->max_segs = 32; in sh_mmcif_probe()
1476 mmc->max_blk_size = 512; in sh_mmcif_probe()
1477 mmc->max_req_size = PAGE_SIZE * mmc->max_segs; in sh_mmcif_probe()
1478 mmc->max_blk_count = mmc->max_req_size / mmc->max_blk_size; in sh_mmcif_probe()
1479 mmc->max_seg_size = mmc->max_req_size; in sh_mmcif_probe()
1483 host->clk = devm_clk_get(dev, NULL); in sh_mmcif_probe()
1484 if (IS_ERR(host->clk)) { in sh_mmcif_probe()
1485 ret = PTR_ERR(host->clk); in sh_mmcif_probe()
1490 ret = clk_prepare_enable(host->clk); in sh_mmcif_probe()
1497 host->power = false; in sh_mmcif_probe()
1503 INIT_DELAYED_WORK(&host->timeout_work, sh_mmcif_timeout_work); in sh_mmcif_probe()
1506 sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL); in sh_mmcif_probe()
1525 mutex_init(&host->thread_lock); in sh_mmcif_probe()
1534 sh_mmcif_readl(host->addr, MMCIF_CE_VERSION) & 0xffff, in sh_mmcif_probe()
1535 clk_get_rate(host->clk) / 1000000UL); in sh_mmcif_probe()
1538 clk_disable_unprepare(host->clk); in sh_mmcif_probe()
1542 clk_disable_unprepare(host->clk); in sh_mmcif_probe()
1554 host->dying = true; in sh_mmcif_remove()
1555 clk_prepare_enable(host->clk); in sh_mmcif_remove()
1556 pm_runtime_get_sync(&pdev->dev); in sh_mmcif_remove()
1558 dev_pm_qos_hide_latency_limit(&pdev->dev); in sh_mmcif_remove()
1560 mmc_remove_host(host->mmc); in sh_mmcif_remove()
1561 sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL); in sh_mmcif_remove()
1566 * (a query on the linux-mmc mailing list didn't bring any replies). in sh_mmcif_remove()
1568 cancel_delayed_work_sync(&host->timeout_work); in sh_mmcif_remove()
1570 clk_disable_unprepare(host->clk); in sh_mmcif_remove()
1571 mmc_free_host(host->mmc); in sh_mmcif_remove()
1572 pm_runtime_put_sync(&pdev->dev); in sh_mmcif_remove()
1573 pm_runtime_disable(&pdev->dev); in sh_mmcif_remove()
1582 sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL); in sh_mmcif_suspend()
1611 MODULE_DESCRIPTION("SuperH on-chip MMC/eMMC interface driver");