Lines Matching +full:hs200 +full:- +full:cmd +full:- +full:int +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
5 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
9 * - JMicron (hardware and technical support)
13 #include <linux/delay.h>
19 #include <linux/dma-mapping.h>
33 #include <linux/mmc/slot-gpio.h>
40 pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
43 pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
47 static unsigned int debug_quirks = 0;
48 static unsigned int debug_quirks2;
50 static bool sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd);
71 SDHCI_DUMP("Wake-up: 0x%08x | Clock: 0x%08x\n", in sdhci_dumpregs()
74 SDHCI_DUMP("Timeout: 0x%08x | Int stat: 0x%08x\n", in sdhci_dumpregs()
77 SDHCI_DUMP("Int enab: 0x%08x | Sig enab: 0x%08x\n", in sdhci_dumpregs()
80 SDHCI_DUMP("ACmd stat: 0x%08x | Slot int: 0x%08x\n", in sdhci_dumpregs()
86 SDHCI_DUMP("Cmd: 0x%08x | Max curr: 0x%08x\n", in sdhci_dumpregs()
98 if (host->flags & SDHCI_USE_ADMA) { in sdhci_dumpregs()
99 if (host->flags & SDHCI_USE_64_BIT_DMA) { in sdhci_dumpregs()
111 if (host->ops->dump_uhs2_regs) in sdhci_dumpregs()
112 host->ops->dump_uhs2_regs(host); in sdhci_dumpregs()
114 if (host->ops->dump_vendor_regs) in sdhci_dumpregs()
115 host->ops->dump_vendor_regs(host); in sdhci_dumpregs()
145 host->v4_mode = true; in sdhci_enable_v4_mode()
150 bool sdhci_data_line_cmd(struct mmc_command *cmd) in sdhci_data_line_cmd() argument
152 return cmd->data || cmd->flags & MMC_RSP_BUSY; in sdhci_data_line_cmd()
160 if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) || in sdhci_set_card_detection()
161 !mmc_card_is_removable(host->mmc) || mmc_can_gpio_cd(host->mmc)) in sdhci_set_card_detection()
168 host->ier |= present ? SDHCI_INT_CARD_REMOVE : in sdhci_set_card_detection()
171 host->ier &= ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); in sdhci_set_card_detection()
174 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_card_detection()
175 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_card_detection()
190 if (host->bus_on) in sdhci_runtime_pm_bus_on()
192 host->bus_on = true; in sdhci_runtime_pm_bus_on()
193 pm_runtime_get_noresume(mmc_dev(host->mmc)); in sdhci_runtime_pm_bus_on()
198 if (!host->bus_on) in sdhci_runtime_pm_bus_off()
200 host->bus_on = false; in sdhci_runtime_pm_bus_off()
201 pm_runtime_put_noidle(mmc_dev(host->mmc)); in sdhci_runtime_pm_bus_off()
211 host->clock = 0; in sdhci_reset()
212 /* Reset-all turns off SD Bus Power */ in sdhci_reset()
213 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) in sdhci_reset()
228 mmc_hostname(host->mmc), (int)mask); in sdhci_reset()
240 if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) { in sdhci_do_reset()
241 struct mmc_host *mmc = host->mmc; in sdhci_do_reset()
243 if (!mmc->ops->get_cd(mmc)) in sdhci_do_reset()
247 host->ops->reset(host, mask); in sdhci_do_reset()
256 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_reset_for_all()
257 if (host->ops->enable_dma) in sdhci_reset_for_all()
258 host->ops->enable_dma(host); in sdhci_reset_for_all()
261 host->preset_enabled = false; in sdhci_reset_for_all()
276 if (host->quirks2 & SDHCI_QUIRK2_ISSUE_CMD_DAT_RESET_TOGETHER) { in sdhci_reset_for_reason()
302 host->ier = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT | in sdhci_set_default_irqs()
308 if (host->tuning_mode == SDHCI_TUNING_MODE_2 || in sdhci_set_default_irqs()
309 host->tuning_mode == SDHCI_TUNING_MODE_3) in sdhci_set_default_irqs()
310 host->ier |= SDHCI_INT_RETUNE; in sdhci_set_default_irqs()
312 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_default_irqs()
313 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_default_irqs()
321 if (host->version < SDHCI_SPEC_200) in sdhci_config_dma()
332 if (!(host->flags & SDHCI_REQ_USE_DMA)) in sdhci_config_dma()
336 if (host->flags & SDHCI_USE_ADMA) in sdhci_config_dma()
339 if (host->flags & SDHCI_USE_64_BIT_DMA) { in sdhci_config_dma()
341 * If v4 mode, all supported DMA can be 64-bit addressing if in sdhci_config_dma()
342 * controller supports 64-bit system address, otherwise only in sdhci_config_dma()
343 * ADMA can support 64-bit addressing. in sdhci_config_dma()
345 if (host->v4_mode) { in sdhci_config_dma()
349 } else if (host->flags & SDHCI_USE_ADMA) { in sdhci_config_dma()
362 static void sdhci_init(struct sdhci_host *host, int soft) in sdhci_init()
364 struct mmc_host *mmc = host->mmc; in sdhci_init()
372 if (host->v4_mode) in sdhci_init()
375 spin_lock_irqsave(&host->lock, flags); in sdhci_init()
377 spin_unlock_irqrestore(&host->lock, flags); in sdhci_init()
379 host->cqe_on = false; in sdhci_init()
383 host->clock = 0; in sdhci_init()
384 host->reinit_uhs = true; in sdhci_init()
385 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_init()
391 u32 cd = host->ier & (SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT); in sdhci_reinit()
402 if (cd != (host->ier & (SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT))) in sdhci_reinit()
403 mmc_detect_change(host->mmc, msecs_to_jiffies(200)); in sdhci_reinit()
410 if (host->quirks & SDHCI_QUIRK_NO_LED) in __sdhci_led_activate()
422 if (host->quirks & SDHCI_QUIRK_NO_LED) in __sdhci_led_deactivate()
437 spin_lock_irqsave(&host->lock, flags); in sdhci_led_control()
439 if (host->runtime_suspended) in sdhci_led_control()
447 spin_unlock_irqrestore(&host->lock, flags); in sdhci_led_control()
450 static int sdhci_led_register(struct sdhci_host *host) in sdhci_led_register()
452 struct mmc_host *mmc = host->mmc; in sdhci_led_register()
454 if (host->quirks & SDHCI_QUIRK_NO_LED) in sdhci_led_register()
457 snprintf(host->led_name, sizeof(host->led_name), in sdhci_led_register()
460 host->led.name = host->led_name; in sdhci_led_register()
461 host->led.brightness = LED_OFF; in sdhci_led_register()
462 host->led.default_trigger = mmc_hostname(mmc); in sdhci_led_register()
463 host->led.brightness_set = sdhci_led_control; in sdhci_led_register()
465 return led_classdev_register(mmc_dev(mmc), &host->led); in sdhci_led_register()
470 if (host->quirks & SDHCI_QUIRK_NO_LED) in sdhci_led_unregister()
473 led_classdev_unregister(&host->led); in sdhci_led_unregister()
486 static inline int sdhci_led_register(struct sdhci_host *host) in sdhci_led_register()
510 if (sdhci_data_line_cmd(mrq->cmd)) in sdhci_mod_timer()
511 mod_timer(&host->data_timer, timeout); in sdhci_mod_timer()
513 mod_timer(&host->timer, timeout); in sdhci_mod_timer()
519 if (sdhci_data_line_cmd(mrq->cmd)) in sdhci_del_timer()
520 del_timer(&host->data_timer); in sdhci_del_timer()
522 del_timer(&host->timer); in sdhci_del_timer()
527 return host->cmd || host->data_cmd; in sdhci_has_requests()
544 blksize = host->data->blksz; in sdhci_read_block_pio()
548 BUG_ON(!sg_miter_next(&host->sg_miter)); in sdhci_read_block_pio()
550 len = min(host->sg_miter.length, blksize); in sdhci_read_block_pio()
552 blksize -= len; in sdhci_read_block_pio()
553 host->sg_miter.consumed = len; in sdhci_read_block_pio()
555 buf = host->sg_miter.addr; in sdhci_read_block_pio()
567 chunk--; in sdhci_read_block_pio()
568 len--; in sdhci_read_block_pio()
572 sg_miter_stop(&host->sg_miter); in sdhci_read_block_pio()
583 blksize = host->data->blksz; in sdhci_write_block_pio()
588 BUG_ON(!sg_miter_next(&host->sg_miter)); in sdhci_write_block_pio()
590 len = min(host->sg_miter.length, blksize); in sdhci_write_block_pio()
592 blksize -= len; in sdhci_write_block_pio()
593 host->sg_miter.consumed = len; in sdhci_write_block_pio()
595 buf = host->sg_miter.addr; in sdhci_write_block_pio()
602 len--; in sdhci_write_block_pio()
612 sg_miter_stop(&host->sg_miter); in sdhci_write_block_pio()
619 if (host->blocks == 0) in sdhci_transfer_pio()
622 if (host->data->flags & MMC_DATA_READ) in sdhci_transfer_pio()
632 if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) && in sdhci_transfer_pio()
633 (host->data->blocks == 1)) in sdhci_transfer_pio()
637 if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY) in sdhci_transfer_pio()
640 if (host->data->flags & MMC_DATA_READ) in sdhci_transfer_pio()
645 host->blocks--; in sdhci_transfer_pio()
646 if (host->blocks == 0) in sdhci_transfer_pio()
653 static int sdhci_pre_dma_transfer(struct sdhci_host *host, in sdhci_pre_dma_transfer()
654 struct mmc_data *data, int cookie) in sdhci_pre_dma_transfer()
656 int sg_count; in sdhci_pre_dma_transfer()
662 if (data->host_cookie == COOKIE_PRE_MAPPED) in sdhci_pre_dma_transfer()
663 return data->sg_count; in sdhci_pre_dma_transfer()
666 if (host->bounce_buffer) { in sdhci_pre_dma_transfer()
667 unsigned int length = data->blksz * data->blocks; in sdhci_pre_dma_transfer()
669 if (length > host->bounce_buffer_size) { in sdhci_pre_dma_transfer()
671 mmc_hostname(host->mmc), length, in sdhci_pre_dma_transfer()
672 host->bounce_buffer_size); in sdhci_pre_dma_transfer()
673 return -EIO; in sdhci_pre_dma_transfer()
677 if (host->ops->copy_to_bounce_buffer) { in sdhci_pre_dma_transfer()
678 host->ops->copy_to_bounce_buffer(host, in sdhci_pre_dma_transfer()
681 sg_copy_to_buffer(data->sg, data->sg_len, in sdhci_pre_dma_transfer()
682 host->bounce_buffer, length); in sdhci_pre_dma_transfer()
686 dma_sync_single_for_device(mmc_dev(host->mmc), in sdhci_pre_dma_transfer()
687 host->bounce_addr, in sdhci_pre_dma_transfer()
688 host->bounce_buffer_size, in sdhci_pre_dma_transfer()
694 sg_count = dma_map_sg(mmc_dev(host->mmc), in sdhci_pre_dma_transfer()
695 data->sg, data->sg_len, in sdhci_pre_dma_transfer()
700 return -ENOSPC; in sdhci_pre_dma_transfer()
702 data->sg_count = sg_count; in sdhci_pre_dma_transfer()
703 data->host_cookie = cookie; in sdhci_pre_dma_transfer()
710 return kmap_local_page(sg_page(sg)) + sg->offset; in sdhci_kmap_atomic()
719 dma_addr_t addr, int len, unsigned int cmd) in sdhci_adma_write_desc() argument
723 /* 32-bit and 64-bit descriptors have these members in same position */ in sdhci_adma_write_desc()
724 dma_desc->cmd = cpu_to_le16(cmd); in sdhci_adma_write_desc()
725 dma_desc->len = cpu_to_le16(len); in sdhci_adma_write_desc()
726 dma_desc->addr_lo = cpu_to_le32(lower_32_bits(addr)); in sdhci_adma_write_desc()
728 if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_adma_write_desc()
729 dma_desc->addr_hi = cpu_to_le32(upper_32_bits(addr)); in sdhci_adma_write_desc()
731 *desc += host->desc_sz; in sdhci_adma_write_desc()
737 int len, unsigned int cmd) in __sdhci_adma_write_desc() argument
739 if (host->ops->adma_write_desc) in __sdhci_adma_write_desc()
740 host->ops->adma_write_desc(host, desc, addr, len, cmd); in __sdhci_adma_write_desc()
742 sdhci_adma_write_desc(host, desc, addr, len, cmd); in __sdhci_adma_write_desc()
749 /* 32-bit and 64-bit descriptors have 'cmd' in same position */ in sdhci_adma_mark_end()
750 dma_desc->cmd |= cpu_to_le16(ADMA2_END); in sdhci_adma_mark_end()
754 struct mmc_data *data, int sg_count) in sdhci_adma_table_pre()
760 int len, offset, i; in sdhci_adma_table_pre()
767 host->sg_count = sg_count; in sdhci_adma_table_pre()
769 desc = host->adma_table; in sdhci_adma_table_pre()
770 align = host->align_buffer; in sdhci_adma_table_pre()
772 align_addr = host->align_addr; in sdhci_adma_table_pre()
774 for_each_sg(data->sg, sg, host->sg_count, i) { in sdhci_adma_table_pre()
780 * be 32-bit aligned. If they aren't, then we use a bounce in sdhci_adma_table_pre()
784 offset = (SDHCI_ADMA2_ALIGN - (addr & SDHCI_ADMA2_MASK)) & in sdhci_adma_table_pre()
787 if (data->flags & MMC_DATA_WRITE) { in sdhci_adma_table_pre()
803 len -= offset; in sdhci_adma_table_pre()
812 while (len > host->max_adma) { in sdhci_adma_table_pre()
813 int n = 32 * 1024; /* 32KiB*/ in sdhci_adma_table_pre()
817 len -= n; in sdhci_adma_table_pre()
829 WARN_ON((desc - host->adma_table) >= host->adma_table_sz); in sdhci_adma_table_pre()
832 if (host->quirks & SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC) { in sdhci_adma_table_pre()
834 if (desc != host->adma_table) { in sdhci_adma_table_pre()
835 desc -= host->desc_sz; in sdhci_adma_table_pre()
839 /* Add a terminating entry - nop, end, valid */ in sdhci_adma_table_pre()
848 int i, size; in sdhci_adma_table_post()
852 if (data->flags & MMC_DATA_READ) { in sdhci_adma_table_post()
856 for_each_sg(data->sg, sg, host->sg_count, i) in sdhci_adma_table_post()
863 dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg, in sdhci_adma_table_post()
864 data->sg_len, DMA_FROM_DEVICE); in sdhci_adma_table_post()
866 align = host->align_buffer; in sdhci_adma_table_post()
868 for_each_sg(data->sg, sg, host->sg_count, i) { in sdhci_adma_table_post()
870 size = SDHCI_ADMA2_ALIGN - in sdhci_adma_table_post()
887 if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_set_adma_addr()
893 if (host->bounce_buffer) in sdhci_sdma_address()
894 return host->bounce_addr; in sdhci_sdma_address()
896 return sg_dma_address(host->data->sg); in sdhci_sdma_address()
901 if (host->v4_mode) in sdhci_set_sdma_addr()
907 static unsigned int sdhci_target_timeout(struct sdhci_host *host, in sdhci_target_timeout()
908 struct mmc_command *cmd, in sdhci_target_timeout() argument
911 unsigned int target_timeout; in sdhci_target_timeout()
915 target_timeout = cmd->busy_timeout * 1000; in sdhci_target_timeout()
917 target_timeout = DIV_ROUND_UP(data->timeout_ns, 1000); in sdhci_target_timeout()
918 if (host->clock && data->timeout_clks) { in sdhci_target_timeout()
922 * data->timeout_clks is in units of clock cycles. in sdhci_target_timeout()
923 * host->clock is in Hz. target_timeout is in us. in sdhci_target_timeout()
926 val = 1000000ULL * data->timeout_clks; in sdhci_target_timeout()
927 if (do_div(val, host->clock)) in sdhci_target_timeout()
937 struct mmc_command *cmd) in sdhci_calc_sw_timeout() argument
939 struct mmc_data *data = cmd->data; in sdhci_calc_sw_timeout()
940 struct mmc_host *mmc = host->mmc; in sdhci_calc_sw_timeout()
941 struct mmc_ios *ios = &mmc->ios; in sdhci_calc_sw_timeout()
942 unsigned char bus_width = 1 << ios->bus_width; in sdhci_calc_sw_timeout()
943 unsigned int blksz; in sdhci_calc_sw_timeout()
944 unsigned int freq; in sdhci_calc_sw_timeout()
948 target_timeout = sdhci_target_timeout(host, cmd, data); in sdhci_calc_sw_timeout()
952 blksz = data->blksz; in sdhci_calc_sw_timeout()
953 freq = mmc->actual_clock ? : host->clock; in sdhci_calc_sw_timeout()
959 host->data_timeout = data->blocks * target_timeout + in sdhci_calc_sw_timeout()
962 host->data_timeout = target_timeout; in sdhci_calc_sw_timeout()
965 if (host->data_timeout) in sdhci_calc_sw_timeout()
966 host->data_timeout += MMC_CMD_TRANSFER_TIME; in sdhci_calc_sw_timeout()
969 static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_command *cmd, in sdhci_calc_timeout() argument
981 * longer to time out, but that's much better than having a too-short in sdhci_calc_timeout()
984 if (host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL) in sdhci_calc_timeout()
985 return host->max_timeout_count; in sdhci_calc_timeout()
988 if (cmd == NULL) in sdhci_calc_timeout()
989 return host->max_timeout_count; in sdhci_calc_timeout()
991 data = cmd->data; in sdhci_calc_timeout()
993 if (!data && !cmd->busy_timeout) in sdhci_calc_timeout()
994 return host->max_timeout_count; in sdhci_calc_timeout()
997 target_timeout = sdhci_target_timeout(host, cmd, data); in sdhci_calc_timeout()
1001 * We do this in steps in order to fit inside a 32 bit int. in sdhci_calc_timeout()
1005 * (2) host->timeout_clk < 2^16 in sdhci_calc_timeout()
1010 current_timeout = (1 << 13) * 1000 / host->timeout_clk; in sdhci_calc_timeout()
1014 if (count > host->max_timeout_count) { in sdhci_calc_timeout()
1015 if (!(host->quirks2 & SDHCI_QUIRK2_DISABLE_HW_TIMEOUT)) in sdhci_calc_timeout()
1016 DBG("Too large timeout 0x%x requested for CMD%d!\n", in sdhci_calc_timeout()
1017 count, cmd->opcode); in sdhci_calc_timeout()
1018 count = host->max_timeout_count; in sdhci_calc_timeout()
1032 if (host->flags & SDHCI_REQ_USE_DMA) in sdhci_set_transfer_irqs()
1033 host->ier = (host->ier & ~pio_irqs) | dma_irqs; in sdhci_set_transfer_irqs()
1035 host->ier = (host->ier & ~dma_irqs) | pio_irqs; in sdhci_set_transfer_irqs()
1037 if (host->flags & (SDHCI_AUTO_CMD23 | SDHCI_AUTO_CMD12)) in sdhci_set_transfer_irqs()
1038 host->ier |= SDHCI_INT_AUTO_CMD_ERR; in sdhci_set_transfer_irqs()
1040 host->ier &= ~SDHCI_INT_AUTO_CMD_ERR; in sdhci_set_transfer_irqs()
1042 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_transfer_irqs()
1043 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_transfer_irqs()
1049 host->ier |= SDHCI_INT_DATA_TIMEOUT; in sdhci_set_data_timeout_irq()
1051 host->ier &= ~SDHCI_INT_DATA_TIMEOUT; in sdhci_set_data_timeout_irq()
1052 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_set_data_timeout_irq()
1053 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_set_data_timeout_irq()
1057 void __sdhci_set_timeout(struct sdhci_host *host, struct mmc_command *cmd) in __sdhci_set_timeout() argument
1060 u8 count = sdhci_calc_timeout(host, cmd, &too_big); in __sdhci_set_timeout()
1063 host->quirks2 & SDHCI_QUIRK2_DISABLE_HW_TIMEOUT) { in __sdhci_set_timeout()
1064 sdhci_calc_sw_timeout(host, cmd); in __sdhci_set_timeout()
1066 } else if (!(host->ier & SDHCI_INT_DATA_TIMEOUT)) { in __sdhci_set_timeout()
1074 static void sdhci_set_timeout(struct sdhci_host *host, struct mmc_command *cmd) in sdhci_set_timeout() argument
1076 if (host->ops->set_timeout) in sdhci_set_timeout()
1077 host->ops->set_timeout(host, cmd); in sdhci_set_timeout()
1079 __sdhci_set_timeout(host, cmd); in sdhci_set_timeout()
1084 WARN_ON(host->data); in sdhci_initialize_data()
1087 BUG_ON(data->blksz * data->blocks > 524288); in sdhci_initialize_data()
1088 BUG_ON(data->blksz > host->mmc->max_blk_size); in sdhci_initialize_data()
1089 BUG_ON(data->blocks > 65535); in sdhci_initialize_data()
1091 host->data = data; in sdhci_initialize_data()
1092 host->data_early = 0; in sdhci_initialize_data()
1093 host->data->bytes_xfered = 0; in sdhci_initialize_data()
1102 SDHCI_MAKE_BLKSZ(host->sdma_boundary, data->blksz), in sdhci_set_block_info()
1105 * For Version 4.10 onwards, if v4 mode is enabled, 32-bit Block Count in sdhci_set_block_info()
1106 * can be supported, in that case 16-bit block count register must be 0. in sdhci_set_block_info()
1108 if (host->version >= SDHCI_SPEC_410 && host->v4_mode && in sdhci_set_block_info()
1109 (host->quirks2 & SDHCI_QUIRK2_USE_32BIT_BLK_CNT)) { in sdhci_set_block_info()
1112 sdhci_writew(host, data->blocks, SDHCI_32BIT_BLK_CNT); in sdhci_set_block_info()
1114 sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); in sdhci_set_block_info()
1120 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_prepare_dma()
1122 unsigned int length_mask, offset_mask; in sdhci_prepare_dma()
1123 int i; in sdhci_prepare_dma()
1125 host->flags |= SDHCI_REQ_USE_DMA; in sdhci_prepare_dma()
1136 if (host->flags & SDHCI_USE_ADMA) { in sdhci_prepare_dma()
1137 if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) { in sdhci_prepare_dma()
1147 if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) in sdhci_prepare_dma()
1149 if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) in sdhci_prepare_dma()
1154 for_each_sg(data->sg, sg, data->sg_len, i) { in sdhci_prepare_dma()
1155 if (sg->length & length_mask) { in sdhci_prepare_dma()
1157 sg->length); in sdhci_prepare_dma()
1158 host->flags &= ~SDHCI_REQ_USE_DMA; in sdhci_prepare_dma()
1161 if (sg->offset & offset_mask) { in sdhci_prepare_dma()
1163 host->flags &= ~SDHCI_REQ_USE_DMA; in sdhci_prepare_dma()
1172 if (host->flags & SDHCI_REQ_USE_DMA) { in sdhci_prepare_dma()
1173 int sg_cnt = sdhci_pre_dma_transfer(host, data, COOKIE_MAPPED); in sdhci_prepare_dma()
1181 host->flags &= ~SDHCI_REQ_USE_DMA; in sdhci_prepare_dma()
1182 } else if (host->flags & SDHCI_USE_ADMA) { in sdhci_prepare_dma()
1184 sdhci_set_adma_addr(host, host->adma_addr); in sdhci_prepare_dma()
1191 if (!(host->flags & SDHCI_REQ_USE_DMA)) { in sdhci_prepare_dma()
1192 int flags; in sdhci_prepare_dma()
1195 if (host->data->flags & MMC_DATA_READ) in sdhci_prepare_dma()
1199 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in sdhci_prepare_dma()
1200 host->blocks = data->blocks; in sdhci_prepare_dma()
1207 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) in sdhci_prepare_data() argument
1209 struct mmc_data *data = cmd->data; in sdhci_prepare_data()
1220 static int sdhci_external_dma_init(struct sdhci_host *host) in sdhci_external_dma_init()
1222 int ret = 0; in sdhci_external_dma_init()
1223 struct mmc_host *mmc = host->mmc; in sdhci_external_dma_init()
1225 host->tx_chan = dma_request_chan(mmc_dev(mmc), "tx"); in sdhci_external_dma_init()
1226 if (IS_ERR(host->tx_chan)) { in sdhci_external_dma_init()
1227 ret = PTR_ERR(host->tx_chan); in sdhci_external_dma_init()
1228 if (ret != -EPROBE_DEFER) in sdhci_external_dma_init()
1230 host->tx_chan = NULL; in sdhci_external_dma_init()
1234 host->rx_chan = dma_request_chan(mmc_dev(mmc), "rx"); in sdhci_external_dma_init()
1235 if (IS_ERR(host->rx_chan)) { in sdhci_external_dma_init()
1236 if (host->tx_chan) { in sdhci_external_dma_init()
1237 dma_release_channel(host->tx_chan); in sdhci_external_dma_init()
1238 host->tx_chan = NULL; in sdhci_external_dma_init()
1241 ret = PTR_ERR(host->rx_chan); in sdhci_external_dma_init()
1242 if (ret != -EPROBE_DEFER) in sdhci_external_dma_init()
1244 host->rx_chan = NULL; in sdhci_external_dma_init()
1253 return data->flags & MMC_DATA_WRITE ? host->tx_chan : host->rx_chan; in sdhci_external_dma_channel()
1256 static int sdhci_external_dma_setup(struct sdhci_host *host, in sdhci_external_dma_setup()
1257 struct mmc_command *cmd) in sdhci_external_dma_setup() argument
1259 int ret, i; in sdhci_external_dma_setup()
1262 struct mmc_data *data = cmd->data; in sdhci_external_dma_setup()
1266 int sg_cnt; in sdhci_external_dma_setup()
1268 if (!host->mapbase) in sdhci_external_dma_setup()
1269 return -EINVAL; in sdhci_external_dma_setup()
1272 cfg.src_addr = host->mapbase + SDHCI_BUFFER; in sdhci_external_dma_setup()
1273 cfg.dst_addr = host->mapbase + SDHCI_BUFFER; in sdhci_external_dma_setup()
1276 cfg.src_maxburst = data->blksz / 4; in sdhci_external_dma_setup()
1277 cfg.dst_maxburst = data->blksz / 4; in sdhci_external_dma_setup()
1280 for (i = 0; i < data->sg_len; i++) { in sdhci_external_dma_setup()
1281 if ((data->sg + i)->length % data->blksz) in sdhci_external_dma_setup()
1282 return -EINVAL; in sdhci_external_dma_setup()
1293 return -EINVAL; in sdhci_external_dma_setup()
1295 dir = data->flags & MMC_DATA_WRITE ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM; in sdhci_external_dma_setup()
1296 desc = dmaengine_prep_slave_sg(chan, data->sg, data->sg_len, dir, in sdhci_external_dma_setup()
1299 return -EINVAL; in sdhci_external_dma_setup()
1301 desc->callback = NULL; in sdhci_external_dma_setup()
1302 desc->callback_param = NULL; in sdhci_external_dma_setup()
1313 if (host->tx_chan) { in sdhci_external_dma_release()
1314 dma_release_channel(host->tx_chan); in sdhci_external_dma_release()
1315 host->tx_chan = NULL; in sdhci_external_dma_release()
1318 if (host->rx_chan) { in sdhci_external_dma_release()
1319 dma_release_channel(host->rx_chan); in sdhci_external_dma_release()
1320 host->rx_chan = NULL; in sdhci_external_dma_release()
1327 struct mmc_command *cmd) in __sdhci_external_dma_prepare_data() argument
1329 struct mmc_data *data = cmd->data; in __sdhci_external_dma_prepare_data()
1333 host->flags |= SDHCI_REQ_USE_DMA; in __sdhci_external_dma_prepare_data()
1340 struct mmc_command *cmd) in sdhci_external_dma_prepare_data() argument
1342 if (!sdhci_external_dma_setup(host, cmd)) { in sdhci_external_dma_prepare_data()
1343 __sdhci_external_dma_prepare_data(host, cmd); in sdhci_external_dma_prepare_data()
1347 mmc_hostname(host->mmc)); in sdhci_external_dma_prepare_data()
1348 sdhci_prepare_data(host, cmd); in sdhci_external_dma_prepare_data()
1353 struct mmc_command *cmd) in sdhci_external_dma_pre_transfer() argument
1357 if (!cmd->data) in sdhci_external_dma_pre_transfer()
1360 chan = sdhci_external_dma_channel(host, cmd->data); in sdhci_external_dma_pre_transfer()
1367 static inline int sdhci_external_dma_init(struct sdhci_host *host) in sdhci_external_dma_init()
1369 return -EOPNOTSUPP; in sdhci_external_dma_init()
1377 struct mmc_command *cmd) in sdhci_external_dma_prepare_data() argument
1384 struct mmc_command *cmd) in sdhci_external_dma_pre_transfer() argument
1398 host->use_external_dma = en; in sdhci_switch_external_dma()
1405 return !mrq->sbc && (host->flags & SDHCI_AUTO_CMD12) && in sdhci_auto_cmd12()
1406 !mrq->cap_cmd_during_tfr; in sdhci_auto_cmd12()
1412 return mrq->sbc && (host->flags & SDHCI_AUTO_CMD23); in sdhci_auto_cmd23()
1418 return mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23); in sdhci_manual_cmd23()
1422 struct mmc_command *cmd, in sdhci_auto_cmd_select() argument
1425 bool use_cmd12 = sdhci_auto_cmd12(host, cmd->mrq) && in sdhci_auto_cmd_select()
1426 (cmd->opcode != SD_IO_RW_EXTENDED); in sdhci_auto_cmd_select()
1427 bool use_cmd23 = sdhci_auto_cmd23(host, cmd->mrq); in sdhci_auto_cmd_select()
1431 * In case of Version 4.10 or later, use of 'Auto CMD Auto in sdhci_auto_cmd_select()
1434 * here because some controllers (e.g sdhci-of-dwmshc) expect it. in sdhci_auto_cmd_select()
1436 if (host->version >= SDHCI_SPEC_410 && host->v4_mode && in sdhci_auto_cmd_select()
1452 * on successful completion (so no Auto-CMD12). in sdhci_auto_cmd_select()
1461 struct mmc_command *cmd) in sdhci_set_transfer_mode() argument
1464 struct mmc_data *data = cmd->data; in sdhci_set_transfer_mode()
1467 if (host->quirks2 & in sdhci_set_transfer_mode()
1470 if (!mmc_op_tuning(cmd->opcode)) in sdhci_set_transfer_mode()
1473 /* clear Auto CMD settings for no data CMDs */ in sdhci_set_transfer_mode()
1481 WARN_ON(!host->data); in sdhci_set_transfer_mode()
1483 if (!(host->quirks2 & SDHCI_QUIRK2_SUPPORT_SINGLE)) in sdhci_set_transfer_mode()
1486 if (mmc_op_multi(cmd->opcode) || data->blocks > 1) { in sdhci_set_transfer_mode()
1488 sdhci_auto_cmd_select(host, cmd, &mode); in sdhci_set_transfer_mode()
1489 if (sdhci_auto_cmd23(host, cmd->mrq)) in sdhci_set_transfer_mode()
1490 sdhci_writel(host, cmd->mrq->sbc->arg, SDHCI_ARGUMENT2); in sdhci_set_transfer_mode()
1493 if (data->flags & MMC_DATA_READ) in sdhci_set_transfer_mode()
1495 if (host->flags & SDHCI_REQ_USE_DMA) in sdhci_set_transfer_mode()
1503 return (!(host->flags & SDHCI_DEVICE_DEAD) && in sdhci_needs_reset()
1504 ((mrq->cmd && mrq->cmd->error) || in sdhci_needs_reset()
1505 (mrq->sbc && mrq->sbc->error) || in sdhci_needs_reset()
1506 (mrq->data && mrq->data->stop && mrq->data->stop->error) || in sdhci_needs_reset()
1507 (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))); in sdhci_needs_reset()
1513 int i; in sdhci_set_mrq_done()
1516 if (host->mrqs_done[i] == mrq) { in sdhci_set_mrq_done()
1523 if (!host->mrqs_done[i]) { in sdhci_set_mrq_done()
1524 host->mrqs_done[i] = mrq; in sdhci_set_mrq_done()
1534 if (host->cmd && host->cmd->mrq == mrq) in __sdhci_finish_mrq()
1535 host->cmd = NULL; in __sdhci_finish_mrq()
1537 if (host->data_cmd && host->data_cmd->mrq == mrq) in __sdhci_finish_mrq()
1538 host->data_cmd = NULL; in __sdhci_finish_mrq()
1540 if (host->deferred_cmd && host->deferred_cmd->mrq == mrq) in __sdhci_finish_mrq()
1541 host->deferred_cmd = NULL; in __sdhci_finish_mrq()
1543 if (host->data && host->data->mrq == mrq) in __sdhci_finish_mrq()
1544 host->data = NULL; in __sdhci_finish_mrq()
1547 host->pending_reset = true; in __sdhci_finish_mrq()
1562 queue_work(host->complete_wq, &host->complete_work); in sdhci_finish_mrq()
1568 struct mmc_command *data_cmd = host->data_cmd; in __sdhci_finish_data_common()
1569 struct mmc_data *data = host->data; in __sdhci_finish_data_common()
1571 host->data = NULL; in __sdhci_finish_data_common()
1572 host->data_cmd = NULL; in __sdhci_finish_data_common()
1578 if (data->error) { in __sdhci_finish_data_common()
1580 host->pending_reset = true; in __sdhci_finish_data_common()
1581 else if (!host->cmd || host->cmd == data_cmd) in __sdhci_finish_data_common()
1587 if ((host->flags & (SDHCI_REQ_USE_DMA | SDHCI_USE_ADMA)) == in __sdhci_finish_data_common()
1598 if (data->error) in __sdhci_finish_data_common()
1599 data->bytes_xfered = 0; in __sdhci_finish_data_common()
1601 data->bytes_xfered = data->blksz * data->blocks; in __sdhci_finish_data_common()
1607 struct mmc_data *data = host->data; in __sdhci_finish_data()
1612 * Need to send CMD12 if - in __sdhci_finish_data()
1613 * a) open-ended multiblock transfer not using auto CMD12 (no CMD23) in __sdhci_finish_data()
1616 if (data->stop && in __sdhci_finish_data()
1617 ((!data->mrq->sbc && !sdhci_auto_cmd12(host, data->mrq)) || in __sdhci_finish_data()
1618 data->error)) { in __sdhci_finish_data()
1624 if (data->mrq->cap_cmd_during_tfr) { in __sdhci_finish_data()
1625 __sdhci_finish_mrq(host, data->mrq); in __sdhci_finish_data()
1628 host->cmd = NULL; in __sdhci_finish_data()
1629 if (!sdhci_send_command(host, data->stop)) { in __sdhci_finish_data()
1635 data->stop->error = -EIO; in __sdhci_finish_data()
1636 __sdhci_finish_mrq(host, data->mrq); in __sdhci_finish_data()
1638 WARN_ON(host->deferred_cmd); in __sdhci_finish_data()
1639 host->deferred_cmd = data->stop; in __sdhci_finish_data()
1644 __sdhci_finish_mrq(host, data->mrq); in __sdhci_finish_data()
1653 static bool sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) in sdhci_send_command() argument
1655 int flags; in sdhci_send_command()
1659 WARN_ON(host->cmd); in sdhci_send_command()
1662 cmd->error = 0; in sdhci_send_command()
1664 if ((host->quirks2 & SDHCI_QUIRK2_STOP_WITH_TC) && in sdhci_send_command()
1665 cmd->opcode == MMC_STOP_TRANSMISSION) in sdhci_send_command()
1666 cmd->flags |= MMC_RSP_BUSY; in sdhci_send_command()
1669 if (sdhci_data_line_cmd(cmd)) in sdhci_send_command()
1674 if (cmd->mrq->data && (cmd == cmd->mrq->data->stop)) in sdhci_send_command()
1680 host->cmd = cmd; in sdhci_send_command()
1681 host->data_timeout = 0; in sdhci_send_command()
1682 if (sdhci_data_line_cmd(cmd)) { in sdhci_send_command()
1683 WARN_ON(host->data_cmd); in sdhci_send_command()
1684 host->data_cmd = cmd; in sdhci_send_command()
1685 sdhci_set_timeout(host, cmd); in sdhci_send_command()
1688 if (cmd->data) { in sdhci_send_command()
1689 if (host->use_external_dma) in sdhci_send_command()
1690 sdhci_external_dma_prepare_data(host, cmd); in sdhci_send_command()
1692 sdhci_prepare_data(host, cmd); in sdhci_send_command()
1695 sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); in sdhci_send_command()
1697 sdhci_set_transfer_mode(host, cmd); in sdhci_send_command()
1699 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) { in sdhci_send_command()
1702 * This does not happen in practice because 136-bit response in sdhci_send_command()
1706 cmd->flags &= ~MMC_RSP_BUSY; in sdhci_send_command()
1709 if (!(cmd->flags & MMC_RSP_PRESENT)) in sdhci_send_command()
1711 else if (cmd->flags & MMC_RSP_136) in sdhci_send_command()
1713 else if (cmd->flags & MMC_RSP_BUSY) in sdhci_send_command()
1718 if (cmd->flags & MMC_RSP_CRC) in sdhci_send_command()
1720 if (cmd->flags & MMC_RSP_OPCODE) in sdhci_send_command()
1724 if (cmd->data || mmc_op_tuning(cmd->opcode)) in sdhci_send_command()
1728 if (host->data_timeout) in sdhci_send_command()
1729 timeout += nsecs_to_jiffies(host->data_timeout); in sdhci_send_command()
1730 else if (!cmd->data && cmd->busy_timeout > 9000) in sdhci_send_command()
1731 timeout += DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ; in sdhci_send_command()
1734 sdhci_mod_timer(host, cmd->mrq, timeout); in sdhci_send_command()
1736 if (host->use_external_dma) in sdhci_send_command()
1737 sdhci_external_dma_pre_transfer(host, cmd); in sdhci_send_command()
1739 sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); in sdhci_send_command()
1745 struct mmc_command *cmd, bool present) in sdhci_present_error() argument
1747 if (!present || host->flags & SDHCI_DEVICE_DEAD) { in sdhci_present_error()
1748 cmd->error = -ENOMEDIUM; in sdhci_present_error()
1757 struct mmc_command *cmd, in sdhci_send_command_retry() argument
1759 __releases(host->lock) in sdhci_send_command_retry()
1760 __acquires(host->lock) in sdhci_send_command_retry()
1762 struct mmc_command *deferred_cmd = host->deferred_cmd; in sdhci_send_command_retry()
1763 int timeout = 10; /* Approx. 10 ms */ in sdhci_send_command_retry()
1766 while (!sdhci_send_command(host, cmd)) { in sdhci_send_command_retry()
1767 if (!timeout--) { in sdhci_send_command_retry()
1769 mmc_hostname(host->mmc)); in sdhci_send_command_retry()
1772 cmd->error = -EIO; in sdhci_send_command_retry()
1776 spin_unlock_irqrestore(&host->lock, flags); in sdhci_send_command_retry()
1780 present = host->mmc->ops->get_cd(host->mmc); in sdhci_send_command_retry()
1782 spin_lock_irqsave(&host->lock, flags); in sdhci_send_command_retry()
1785 if (cmd == deferred_cmd && cmd != host->deferred_cmd) in sdhci_send_command_retry()
1788 if (sdhci_present_error(host, cmd, present)) in sdhci_send_command_retry()
1792 if (cmd == host->deferred_cmd) in sdhci_send_command_retry()
1793 host->deferred_cmd = NULL; in sdhci_send_command_retry()
1798 static void sdhci_read_rsp_136(struct sdhci_host *host, struct mmc_command *cmd) in sdhci_read_rsp_136() argument
1800 int i, reg; in sdhci_read_rsp_136()
1803 reg = SDHCI_RESPONSE + (3 - i) * 4; in sdhci_read_rsp_136()
1804 cmd->resp[i] = sdhci_readl(host, reg); in sdhci_read_rsp_136()
1807 if (host->quirks2 & SDHCI_QUIRK2_RSP_136_HAS_CRC) in sdhci_read_rsp_136()
1812 cmd->resp[i] <<= 8; in sdhci_read_rsp_136()
1814 cmd->resp[i] |= cmd->resp[i + 1] >> 24; in sdhci_read_rsp_136()
1820 struct mmc_command *cmd = host->cmd; in sdhci_finish_command() local
1822 host->cmd = NULL; in sdhci_finish_command()
1824 if (cmd->flags & MMC_RSP_PRESENT) { in sdhci_finish_command()
1825 if (cmd->flags & MMC_RSP_136) { in sdhci_finish_command()
1826 sdhci_read_rsp_136(host, cmd); in sdhci_finish_command()
1828 cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE); in sdhci_finish_command()
1832 if (cmd->mrq->cap_cmd_during_tfr && cmd == cmd->mrq->cmd) in sdhci_finish_command()
1833 mmc_command_done(host->mmc, cmd->mrq); in sdhci_finish_command()
1845 if (cmd->flags & MMC_RSP_BUSY) { in sdhci_finish_command()
1846 if (cmd->data) { in sdhci_finish_command()
1848 } else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ) && in sdhci_finish_command()
1849 cmd == host->data_cmd) { in sdhci_finish_command()
1856 if (cmd == cmd->mrq->sbc) { in sdhci_finish_command()
1857 if (!sdhci_send_command(host, cmd->mrq->cmd)) { in sdhci_finish_command()
1858 WARN_ON(host->deferred_cmd); in sdhci_finish_command()
1859 host->deferred_cmd = cmd->mrq->cmd; in sdhci_finish_command()
1864 if (host->data && host->data_early) in sdhci_finish_command()
1867 if (!cmd->data) in sdhci_finish_command()
1868 __sdhci_finish_mrq(host, cmd->mrq); in sdhci_finish_command()
1876 switch (host->timing) { in sdhci_get_preset_value()
1908 pr_warn("%s: Invalid UHS-I mode selected\n", in sdhci_get_preset_value()
1909 mmc_hostname(host->mmc)); in sdhci_get_preset_value()
1916 u16 sdhci_calc_clk(struct sdhci_host *host, unsigned int clock, in sdhci_calc_clk()
1917 unsigned int *actual_clock) in sdhci_calc_clk()
1919 int div = 0; /* Initialized for compiler warning */ in sdhci_calc_clk()
1920 int real_div = div, clk_mul = 1; in sdhci_calc_clk()
1924 if (host->version >= SDHCI_SPEC_300) { in sdhci_calc_clk()
1925 if (host->preset_enabled) { in sdhci_calc_clk()
1931 if (host->clk_mul && in sdhci_calc_clk()
1935 clk_mul = host->clk_mul; in sdhci_calc_clk()
1937 real_div = max_t(int, 1, div << 1); in sdhci_calc_clk()
1946 if (host->clk_mul) { in sdhci_calc_clk()
1948 if ((host->max_clk * host->clk_mul / div) in sdhci_calc_clk()
1952 if ((host->max_clk * host->clk_mul / div) <= clock) { in sdhci_calc_clk()
1959 clk_mul = host->clk_mul; in sdhci_calc_clk()
1960 div--; in sdhci_calc_clk()
1970 if (!host->clk_mul || switch_base_clk) { in sdhci_calc_clk()
1972 if (host->max_clk <= clock) in sdhci_calc_clk()
1977 if ((host->max_clk / div) <= clock) in sdhci_calc_clk()
1983 if ((host->quirks2 & SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN) in sdhci_calc_clk()
1984 && !div && host->max_clk <= 25000000) in sdhci_calc_clk()
1990 if ((host->max_clk / div) <= clock) in sdhci_calc_clk()
1999 *actual_clock = (host->max_clk * clk_mul) / real_div; in sdhci_calc_clk()
2025 mmc_hostname(host->mmc)); in sdhci_enable_clk()
2033 if (host->version >= SDHCI_SPEC_410 && host->v4_mode) { in sdhci_enable_clk()
2048 mmc_hostname(host->mmc)); in sdhci_enable_clk()
2062 void sdhci_set_clock(struct sdhci_host *host, unsigned int clock) in sdhci_set_clock()
2066 host->mmc->actual_clock = 0; in sdhci_set_clock()
2073 clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); in sdhci_set_clock()
2081 struct mmc_host *mmc = host->mmc; in sdhci_set_power_reg()
2083 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); in sdhci_set_power_reg()
2130 mmc_hostname(host->mmc), vdd); in sdhci_set_power_noreg()
2134 if (host->pwr == pwr) in sdhci_set_power_noreg()
2137 host->pwr = pwr; in sdhci_set_power_noreg()
2141 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) in sdhci_set_power_noreg()
2148 if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE)) in sdhci_set_power_noreg()
2156 if (host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER) in sdhci_set_power_noreg()
2163 if (host->quirks2 & SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON) in sdhci_set_power_noreg()
2167 * Some controllers need an extra 10ms delay of 10ms before in sdhci_set_power_noreg()
2170 if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER) in sdhci_set_power_noreg()
2179 if (IS_ERR(host->mmc->supply.vmmc)) in sdhci_set_power()
2196 if (!IS_ERR(host->mmc->supply.vmmc)) { in sdhci_set_power_and_bus_voltage()
2197 struct mmc_host *mmc = host->mmc; in sdhci_set_power_and_bus_voltage()
2199 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); in sdhci_set_power_and_bus_voltage()
2214 struct mmc_command *cmd; in sdhci_request() local
2219 present = mmc->ops->get_cd(mmc); in sdhci_request()
2221 spin_lock_irqsave(&host->lock, flags); in sdhci_request()
2225 if (sdhci_present_error(host, mrq->cmd, present)) in sdhci_request()
2228 cmd = sdhci_manual_cmd23(host, mrq) ? mrq->sbc : mrq->cmd; in sdhci_request()
2230 if (!sdhci_send_command_retry(host, cmd, flags)) in sdhci_request()
2233 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request()
2239 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request()
2243 int sdhci_request_atomic(struct mmc_host *mmc, struct mmc_request *mrq) in sdhci_request_atomic()
2246 struct mmc_command *cmd; in sdhci_request_atomic() local
2248 int ret = 0; in sdhci_request_atomic()
2250 spin_lock_irqsave(&host->lock, flags); in sdhci_request_atomic()
2252 if (sdhci_present_error(host, mrq->cmd, true)) { in sdhci_request_atomic()
2257 cmd = sdhci_manual_cmd23(host, mrq) ? mrq->sbc : mrq->cmd; in sdhci_request_atomic()
2263 * again in non-atomic context. So we should not finish this request in sdhci_request_atomic()
2266 if (!sdhci_send_command(host, cmd)) in sdhci_request_atomic()
2267 ret = -EBUSY; in sdhci_request_atomic()
2272 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_atomic()
2277 void sdhci_set_bus_width(struct sdhci_host *host, int width) in sdhci_set_bus_width()
2286 if (host->mmc->caps & MMC_CAP_8_BIT_DATA) in sdhci_set_bus_width()
2317 ctrl_2 |= SDHCI_CTRL_HS400; /* Non-standard */ in sdhci_set_uhs_signaling()
2338 return !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN) && in sdhci_preset_needed()
2349 return !host->preset_enabled && in sdhci_presetable_values_change()
2350 (sdhci_preset_needed(host, ios->timing) || host->drv_type != ios->drv_type); in sdhci_presetable_values_change()
2361 if (ios->power_mode == MMC_POWER_OFF) { in sdhci_set_ios_common()
2366 if (host->version >= SDHCI_SPEC_300 && in sdhci_set_ios_common()
2367 (ios->power_mode == MMC_POWER_UP) && in sdhci_set_ios_common()
2368 !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) in sdhci_set_ios_common()
2371 if (!ios->clock || ios->clock != host->clock) { in sdhci_set_ios_common()
2372 host->ops->set_clock(host, ios->clock); in sdhci_set_ios_common()
2373 host->clock = ios->clock; in sdhci_set_ios_common()
2375 if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK && in sdhci_set_ios_common()
2376 host->clock) { in sdhci_set_ios_common()
2377 host->timeout_clk = mmc->actual_clock ? in sdhci_set_ios_common()
2378 mmc->actual_clock / 1000 : in sdhci_set_ios_common()
2379 host->clock / 1000; in sdhci_set_ios_common()
2380 mmc->max_busy_timeout = in sdhci_set_ios_common()
2381 host->ops->get_max_timeout_count ? in sdhci_set_ios_common()
2382 host->ops->get_max_timeout_count(host) : in sdhci_set_ios_common()
2384 mmc->max_busy_timeout /= host->timeout_clk; in sdhci_set_ios_common()
2393 bool reinit_uhs = host->reinit_uhs; in sdhci_set_ios()
2397 host->reinit_uhs = false; in sdhci_set_ios()
2399 if (ios->power_mode == MMC_POWER_UNDEFINED) in sdhci_set_ios()
2402 if (host->flags & SDHCI_DEVICE_DEAD) { in sdhci_set_ios()
2403 if (!IS_ERR(mmc->supply.vmmc) && in sdhci_set_ios()
2404 ios->power_mode == MMC_POWER_OFF) in sdhci_set_ios()
2405 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); in sdhci_set_ios()
2409 turning_on_clk = ios->clock != host->clock && ios->clock && !host->clock; in sdhci_set_ios()
2413 if (host->ops->set_power) in sdhci_set_ios()
2414 host->ops->set_power(host, ios->power_mode, ios->vdd); in sdhci_set_ios()
2416 sdhci_set_power(host, ios->power_mode, ios->vdd); in sdhci_set_ios()
2418 if (host->ops->platform_send_init_74_clocks) in sdhci_set_ios()
2419 host->ops->platform_send_init_74_clocks(host, ios->power_mode); in sdhci_set_ios()
2421 host->ops->set_bus_width(host, ios->bus_width); in sdhci_set_ios()
2429 host->timing == ios->timing && in sdhci_set_ios()
2430 host->version >= SDHCI_SPEC_300 && in sdhci_set_ios()
2436 if (!(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT)) { in sdhci_set_ios()
2437 if (ios->timing == MMC_TIMING_SD_HS || in sdhci_set_ios()
2438 ios->timing == MMC_TIMING_MMC_HS || in sdhci_set_ios()
2439 ios->timing == MMC_TIMING_MMC_HS400 || in sdhci_set_ios()
2440 ios->timing == MMC_TIMING_MMC_HS200 || in sdhci_set_ios()
2441 ios->timing == MMC_TIMING_MMC_DDR52 || in sdhci_set_ios()
2442 ios->timing == MMC_TIMING_UHS_SDR50 || in sdhci_set_ios()
2443 ios->timing == MMC_TIMING_UHS_SDR104 || in sdhci_set_ios()
2444 ios->timing == MMC_TIMING_UHS_DDR50 || in sdhci_set_ios()
2445 ios->timing == MMC_TIMING_UHS_SDR25) in sdhci_set_ios()
2451 if (host->version >= SDHCI_SPEC_300) { in sdhci_set_ios()
2468 if (!host->preset_enabled) { in sdhci_set_ios()
2475 if (ios->drv_type == MMC_SET_DRIVER_TYPE_A) in sdhci_set_ios()
2477 else if (ios->drv_type == MMC_SET_DRIVER_TYPE_B) in sdhci_set_ios()
2479 else if (ios->drv_type == MMC_SET_DRIVER_TYPE_C) in sdhci_set_ios()
2481 else if (ios->drv_type == MMC_SET_DRIVER_TYPE_D) in sdhci_set_ios()
2490 host->drv_type = ios->drv_type; in sdhci_set_ios()
2493 host->ops->set_uhs_signaling(host, ios->timing); in sdhci_set_ios()
2494 host->timing = ios->timing; in sdhci_set_ios()
2496 if (sdhci_preset_needed(host, ios->timing)) { in sdhci_set_ios()
2501 ios->drv_type = FIELD_GET(SDHCI_PRESET_DRV_MASK, in sdhci_set_ios()
2503 host->drv_type = ios->drv_type; in sdhci_set_ios()
2506 /* Re-enable SD Clock */ in sdhci_set_ios()
2507 host->ops->set_clock(host, host->clock); in sdhci_set_ios()
2513 static int sdhci_get_cd(struct mmc_host *mmc) in sdhci_get_cd()
2516 int gpio_cd = mmc_gpio_get_cd(mmc); in sdhci_get_cd()
2518 if (host->flags & SDHCI_DEVICE_DEAD) in sdhci_get_cd()
2533 if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) in sdhci_get_cd()
2540 int sdhci_get_cd_nogpio(struct mmc_host *mmc) in sdhci_get_cd_nogpio()
2544 int ret = 0; in sdhci_get_cd_nogpio()
2546 spin_lock_irqsave(&host->lock, flags); in sdhci_get_cd_nogpio()
2548 if (host->flags & SDHCI_DEVICE_DEAD) in sdhci_get_cd_nogpio()
2553 spin_unlock_irqrestore(&host->lock, flags); in sdhci_get_cd_nogpio()
2559 int sdhci_get_ro(struct mmc_host *mmc) in sdhci_get_ro()
2563 int is_readonly; in sdhci_get_ro()
2565 if (host->flags & SDHCI_DEVICE_DEAD) { in sdhci_get_ro()
2567 } else if (host->ops->get_ro) { in sdhci_get_ro()
2568 is_readonly = host->ops->get_ro(host); in sdhci_get_ro()
2572 allow_invert = !(mmc->caps2 & MMC_CAP2_RO_ACTIVE_HIGH); in sdhci_get_ro()
2581 (host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT)) in sdhci_get_ro()
2592 if (host->ops && host->ops->hw_reset) in sdhci_hw_reset()
2593 host->ops->hw_reset(host); in sdhci_hw_reset()
2596 static void sdhci_enable_sdio_irq_nolock(struct sdhci_host *host, int enable) in sdhci_enable_sdio_irq_nolock()
2598 if (!(host->flags & SDHCI_DEVICE_DEAD)) { in sdhci_enable_sdio_irq_nolock()
2600 host->ier |= SDHCI_INT_CARD_INT; in sdhci_enable_sdio_irq_nolock()
2602 host->ier &= ~SDHCI_INT_CARD_INT; in sdhci_enable_sdio_irq_nolock()
2604 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_enable_sdio_irq_nolock()
2605 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_enable_sdio_irq_nolock()
2609 void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable) in sdhci_enable_sdio_irq()
2617 spin_lock_irqsave(&host->lock, flags); in sdhci_enable_sdio_irq()
2619 spin_unlock_irqrestore(&host->lock, flags); in sdhci_enable_sdio_irq()
2631 spin_lock_irqsave(&host->lock, flags); in sdhci_ack_sdio_irq()
2633 spin_unlock_irqrestore(&host->lock, flags); in sdhci_ack_sdio_irq()
2636 int sdhci_start_signal_voltage_switch(struct mmc_host *mmc, in sdhci_start_signal_voltage_switch()
2641 int ret; in sdhci_start_signal_voltage_switch()
2647 if (host->version < SDHCI_SPEC_300) in sdhci_start_signal_voltage_switch()
2652 switch (ios->signal_voltage) { in sdhci_start_signal_voltage_switch()
2654 if (!(host->flags & SDHCI_SIGNALING_330)) in sdhci_start_signal_voltage_switch()
2655 return -EINVAL; in sdhci_start_signal_voltage_switch()
2660 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_start_signal_voltage_switch()
2665 return -EIO; in sdhci_start_signal_voltage_switch()
2679 return -EAGAIN; in sdhci_start_signal_voltage_switch()
2681 if (!(host->flags & SDHCI_SIGNALING_180)) in sdhci_start_signal_voltage_switch()
2682 return -EINVAL; in sdhci_start_signal_voltage_switch()
2683 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_start_signal_voltage_switch()
2688 return -EIO; in sdhci_start_signal_voltage_switch()
2700 if (host->ops->voltage_switch) in sdhci_start_signal_voltage_switch()
2701 host->ops->voltage_switch(host); in sdhci_start_signal_voltage_switch()
2711 return -EAGAIN; in sdhci_start_signal_voltage_switch()
2713 if (!(host->flags & SDHCI_SIGNALING_120)) in sdhci_start_signal_voltage_switch()
2714 return -EINVAL; in sdhci_start_signal_voltage_switch()
2715 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_start_signal_voltage_switch()
2720 return -EIO; in sdhci_start_signal_voltage_switch()
2731 static int sdhci_card_busy(struct mmc_host *mmc) in sdhci_card_busy()
2742 static int sdhci_prepare_hs400_tuning(struct mmc_host *mmc, struct mmc_ios *ios) in sdhci_prepare_hs400_tuning()
2747 spin_lock_irqsave(&host->lock, flags); in sdhci_prepare_hs400_tuning()
2748 host->flags |= SDHCI_HS400_TUNING; in sdhci_prepare_hs400_tuning()
2749 spin_unlock_irqrestore(&host->lock, flags); in sdhci_prepare_hs400_tuning()
2760 if (host->quirks2 & SDHCI_QUIRK2_TUNING_WORK_AROUND) in sdhci_start_tuning()
2781 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_end_tuning()
2782 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_end_tuning()
2805 mmc_send_abort_tuning(host->mmc, opcode); in sdhci_abort_tuning()
2812 * automatically) so mmc_send_tuning() will return -EIO. Also the tuning command
2818 struct mmc_host *mmc = host->mmc; in sdhci_send_tuning()
2819 struct mmc_command cmd = {}; in sdhci_send_tuning() local
2822 u32 b = host->sdma_boundary; in sdhci_send_tuning()
2824 spin_lock_irqsave(&host->lock, flags); in sdhci_send_tuning()
2826 cmd.opcode = opcode; in sdhci_send_tuning()
2827 cmd.flags = MMC_RSP_R1 | MMC_CMD_ADTC; in sdhci_send_tuning()
2828 cmd.mrq = &mrq; in sdhci_send_tuning()
2830 mrq.cmd = &cmd; in sdhci_send_tuning()
2836 if (cmd.opcode == MMC_SEND_TUNING_BLOCK_HS200 && in sdhci_send_tuning()
2837 mmc->ios.bus_width == MMC_BUS_WIDTH_8) in sdhci_send_tuning()
2850 if (!sdhci_send_command_retry(host, &cmd, flags)) { in sdhci_send_tuning()
2851 spin_unlock_irqrestore(&host->lock, flags); in sdhci_send_tuning()
2852 host->tuning_done = 0; in sdhci_send_tuning()
2856 host->cmd = NULL; in sdhci_send_tuning()
2860 host->tuning_done = 0; in sdhci_send_tuning()
2862 spin_unlock_irqrestore(&host->lock, flags); in sdhci_send_tuning()
2865 wait_event_timeout(host->buf_ready_int, (host->tuning_done == 1), in sdhci_send_tuning()
2871 int __sdhci_execute_tuning(struct sdhci_host *host, u32 opcode) in __sdhci_execute_tuning()
2873 int i; in __sdhci_execute_tuning()
2879 for (i = 0; i < host->tuning_loop_count; i++) { in __sdhci_execute_tuning()
2884 if (!host->tuning_done) { in __sdhci_execute_tuning()
2886 mmc_hostname(host->mmc)); in __sdhci_execute_tuning()
2888 return -ETIMEDOUT; in __sdhci_execute_tuning()
2891 /* Spec does not require a delay between tuning cycles */ in __sdhci_execute_tuning()
2892 if (host->tuning_delay > 0) in __sdhci_execute_tuning()
2893 mdelay(host->tuning_delay); in __sdhci_execute_tuning()
2905 mmc_hostname(host->mmc)); in __sdhci_execute_tuning()
2907 return -EAGAIN; in __sdhci_execute_tuning()
2911 int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) in sdhci_execute_tuning()
2914 int err = 0; in sdhci_execute_tuning()
2915 unsigned int tuning_count = 0; in sdhci_execute_tuning()
2918 hs400_tuning = host->flags & SDHCI_HS400_TUNING; in sdhci_execute_tuning()
2920 if (host->tuning_mode == SDHCI_TUNING_MODE_1) in sdhci_execute_tuning()
2921 tuning_count = host->tuning_count; in sdhci_execute_tuning()
2927 * If the Host Controller supports the HS200 mode then the in sdhci_execute_tuning()
2930 switch (host->timing) { in sdhci_execute_tuning()
2931 /* HS400 tuning is done in HS200 mode */ in sdhci_execute_tuning()
2933 err = -EINVAL; in sdhci_execute_tuning()
2938 * Periodic re-tuning for HS400 is not expected to be needed, so in sdhci_execute_tuning()
2950 if (host->flags & SDHCI_SDR50_NEEDS_TUNING) in sdhci_execute_tuning()
2958 if (host->ops->platform_execute_tuning) { in sdhci_execute_tuning()
2959 err = host->ops->platform_execute_tuning(host, opcode); in sdhci_execute_tuning()
2963 mmc->retune_period = tuning_count; in sdhci_execute_tuning()
2965 if (host->tuning_delay < 0) in sdhci_execute_tuning()
2966 host->tuning_delay = opcode == MMC_SEND_TUNING_BLOCK; in sdhci_execute_tuning()
2970 host->tuning_err = __sdhci_execute_tuning(host, opcode); in sdhci_execute_tuning()
2974 host->flags &= ~SDHCI_HS400_TUNING; in sdhci_execute_tuning()
2983 if (host->version < SDHCI_SPEC_300) in sdhci_enable_preset_value()
2990 if (host->preset_enabled != enable) { in sdhci_enable_preset_value()
3001 host->flags |= SDHCI_PV_ENABLED; in sdhci_enable_preset_value()
3003 host->flags &= ~SDHCI_PV_ENABLED; in sdhci_enable_preset_value()
3005 host->preset_enabled = enable; in sdhci_enable_preset_value()
3011 int err) in sdhci_post_req()
3013 struct mmc_data *data = mrq->data; in sdhci_post_req()
3015 if (data->host_cookie != COOKIE_UNMAPPED) in sdhci_post_req()
3016 dma_unmap_sg(mmc_dev(mmc), data->sg, data->sg_len, in sdhci_post_req()
3019 data->host_cookie = COOKIE_UNMAPPED; in sdhci_post_req()
3026 mrq->data->host_cookie = COOKIE_UNMAPPED; in sdhci_pre_req()
3029 * No pre-mapping in the pre hook if we're using the bounce buffer, in sdhci_pre_req()
3033 if (host->flags & SDHCI_REQ_USE_DMA && !host->bounce_buffer) in sdhci_pre_req()
3034 sdhci_pre_dma_transfer(host, mrq->data, COOKIE_PRE_MAPPED); in sdhci_pre_req()
3037 static void sdhci_error_out_mrqs(struct sdhci_host *host, int err) in sdhci_error_out_mrqs()
3039 if (host->data_cmd) { in sdhci_error_out_mrqs()
3040 host->data_cmd->error = err; in sdhci_error_out_mrqs()
3041 sdhci_finish_mrq(host, host->data_cmd->mrq); in sdhci_error_out_mrqs()
3044 if (host->cmd) { in sdhci_error_out_mrqs()
3045 host->cmd->error = err; in sdhci_error_out_mrqs()
3046 sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_error_out_mrqs()
3054 int present; in sdhci_card_event()
3057 if (host->ops->card_event) in sdhci_card_event()
3058 host->ops->card_event(host); in sdhci_card_event()
3060 present = mmc->ops->get_cd(mmc); in sdhci_card_event()
3062 spin_lock_irqsave(&host->lock, flags); in sdhci_card_event()
3073 sdhci_error_out_mrqs(host, -ENOMEDIUM); in sdhci_card_event()
3076 spin_unlock_irqrestore(&host->lock, flags); in sdhci_card_event()
3104 struct mmc_data *data = mrq->data; in sdhci_request_done_dma()
3106 if (data && data->host_cookie == COOKIE_MAPPED) { in sdhci_request_done_dma()
3107 if (host->bounce_buffer) { in sdhci_request_done_dma()
3113 unsigned int length = data->bytes_xfered; in sdhci_request_done_dma()
3115 if (length > host->bounce_buffer_size) { in sdhci_request_done_dma()
3117 mmc_hostname(host->mmc), in sdhci_request_done_dma()
3118 host->bounce_buffer_size, in sdhci_request_done_dma()
3119 data->bytes_xfered); in sdhci_request_done_dma()
3121 length = host->bounce_buffer_size; in sdhci_request_done_dma()
3123 dma_sync_single_for_cpu(mmc_dev(host->mmc), in sdhci_request_done_dma()
3124 host->bounce_addr, in sdhci_request_done_dma()
3125 host->bounce_buffer_size, in sdhci_request_done_dma()
3127 sg_copy_from_buffer(data->sg, in sdhci_request_done_dma()
3128 data->sg_len, in sdhci_request_done_dma()
3129 host->bounce_buffer, in sdhci_request_done_dma()
3133 dma_sync_single_for_cpu(mmc_dev(host->mmc), in sdhci_request_done_dma()
3134 host->bounce_addr, in sdhci_request_done_dma()
3135 host->bounce_buffer_size, in sdhci_request_done_dma()
3140 dma_unmap_sg(mmc_dev(host->mmc), data->sg, in sdhci_request_done_dma()
3141 data->sg_len, in sdhci_request_done_dma()
3144 data->host_cookie = COOKIE_UNMAPPED; in sdhci_request_done_dma()
3153 int i; in sdhci_request_done()
3155 spin_lock_irqsave(&host->lock, flags); in sdhci_request_done()
3158 mrq = host->mrqs_done[i]; in sdhci_request_done()
3164 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3176 * also be in mrqs_done, otherwise host->cmd and host->data_cmd in sdhci_request_done()
3179 if (host->cmd || host->data_cmd) { in sdhci_request_done()
3180 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3185 if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) in sdhci_request_done()
3187 host->ops->set_clock(host, host->clock); in sdhci_request_done()
3191 host->pending_reset = false; in sdhci_request_done()
3199 if (host->flags & SDHCI_REQ_USE_DMA) { in sdhci_request_done()
3200 struct mmc_data *data = mrq->data; in sdhci_request_done()
3202 if (host->use_external_dma && data && in sdhci_request_done()
3203 (mrq->cmd->error || data->error)) { in sdhci_request_done()
3206 host->mrqs_done[i] = NULL; in sdhci_request_done()
3207 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3209 spin_lock_irqsave(&host->lock, flags); in sdhci_request_done()
3216 host->mrqs_done[i] = NULL; in sdhci_request_done()
3218 spin_unlock_irqrestore(&host->lock, flags); in sdhci_request_done()
3220 if (host->ops->request_done) in sdhci_request_done()
3221 host->ops->request_done(host, mrq); in sdhci_request_done()
3223 mmc_request_done(host->mmc, mrq); in sdhci_request_done()
3245 spin_lock_irqsave(&host->lock, flags); in sdhci_timeout_timer()
3247 if (host->cmd && !sdhci_data_line_cmd(host->cmd)) { in sdhci_timeout_timer()
3248 pr_err("%s: Timeout waiting for hardware cmd interrupt.\n", in sdhci_timeout_timer()
3249 mmc_hostname(host->mmc)); in sdhci_timeout_timer()
3253 host->cmd->error = -ETIMEDOUT; in sdhci_timeout_timer()
3254 sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_timeout_timer()
3257 spin_unlock_irqrestore(&host->lock, flags); in sdhci_timeout_timer()
3267 spin_lock_irqsave(&host->lock, flags); in sdhci_timeout_data_timer()
3269 if (host->data || host->data_cmd || in sdhci_timeout_data_timer()
3270 (host->cmd && sdhci_data_line_cmd(host->cmd))) { in sdhci_timeout_data_timer()
3272 mmc_hostname(host->mmc)); in sdhci_timeout_data_timer()
3276 if (host->data) { in sdhci_timeout_data_timer()
3277 host->data->error = -ETIMEDOUT; in sdhci_timeout_data_timer()
3279 queue_work(host->complete_wq, &host->complete_work); in sdhci_timeout_data_timer()
3280 } else if (host->data_cmd) { in sdhci_timeout_data_timer()
3281 host->data_cmd->error = -ETIMEDOUT; in sdhci_timeout_data_timer()
3282 sdhci_finish_mrq(host, host->data_cmd->mrq); in sdhci_timeout_data_timer()
3284 host->cmd->error = -ETIMEDOUT; in sdhci_timeout_data_timer()
3285 sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_timeout_data_timer()
3289 spin_unlock_irqrestore(&host->lock, flags); in sdhci_timeout_data_timer()
3300 /* Handle auto-CMD12 error */ in sdhci_cmd_irq()
3301 if (intmask & SDHCI_INT_AUTO_CMD_ERR && host->data_cmd) { in sdhci_cmd_irq()
3302 struct mmc_request *mrq = host->data_cmd->mrq; in sdhci_cmd_irq()
3304 int data_err_bit = (auto_cmd_status & SDHCI_AUTO_CMD_TIMEOUT) ? in sdhci_cmd_irq()
3308 /* Treat auto-CMD12 error the same as data error */ in sdhci_cmd_irq()
3309 if (!mrq->sbc && (host->flags & SDHCI_AUTO_CMD12)) { in sdhci_cmd_irq()
3315 if (!host->cmd) { in sdhci_cmd_irq()
3317 * SDHCI recovers from errors by resetting the cmd and data in sdhci_cmd_irq()
3321 if (host->pending_reset) in sdhci_cmd_irq()
3324 mmc_hostname(host->mmc), (unsigned)intmask); in sdhci_cmd_irq()
3333 host->cmd->error = -ETIMEDOUT; in sdhci_cmd_irq()
3336 host->cmd->error = -EILSEQ; in sdhci_cmd_irq()
3337 if (!mmc_op_tuning(host->cmd->opcode)) in sdhci_cmd_irq()
3341 if (host->cmd->data && in sdhci_cmd_irq()
3344 host->cmd = NULL; in sdhci_cmd_irq()
3349 __sdhci_finish_mrq(host, host->cmd->mrq); in sdhci_cmd_irq()
3353 /* Handle auto-CMD23 error */ in sdhci_cmd_irq()
3355 struct mmc_request *mrq = host->cmd->mrq; in sdhci_cmd_irq()
3357 int err = (auto_cmd_status & SDHCI_AUTO_CMD_TIMEOUT) ? in sdhci_cmd_irq()
3358 -ETIMEDOUT : in sdhci_cmd_irq()
3359 -EILSEQ; in sdhci_cmd_irq()
3364 mrq->sbc->error = err; in sdhci_cmd_irq()
3376 void *desc = host->adma_table; in sdhci_adma_show_error()
3377 dma_addr_t dma = host->adma_addr; in sdhci_adma_show_error()
3384 if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_adma_show_error()
3387 le32_to_cpu(dma_desc->addr_hi), in sdhci_adma_show_error()
3388 le32_to_cpu(dma_desc->addr_lo), in sdhci_adma_show_error()
3389 le16_to_cpu(dma_desc->len), in sdhci_adma_show_error()
3390 le16_to_cpu(dma_desc->cmd)); in sdhci_adma_show_error()
3394 le32_to_cpu(dma_desc->addr_lo), in sdhci_adma_show_error()
3395 le16_to_cpu(dma_desc->len), in sdhci_adma_show_error()
3396 le16_to_cpu(dma_desc->cmd)); in sdhci_adma_show_error()
3398 desc += host->desc_sz; in sdhci_adma_show_error()
3399 dma += host->desc_sz; in sdhci_adma_show_error()
3401 if (dma_desc->cmd & cpu_to_le16(ADMA2_END)) in sdhci_adma_show_error()
3415 if (intmask & SDHCI_INT_DATA_AVAIL && !host->data) { in sdhci_data_irq()
3417 host->tuning_done = 1; in sdhci_data_irq()
3418 wake_up(&host->buf_ready_int); in sdhci_data_irq()
3423 if (!host->data) { in sdhci_data_irq()
3424 struct mmc_command *data_cmd = host->data_cmd; in sdhci_data_irq()
3431 if (data_cmd && (data_cmd->flags & MMC_RSP_BUSY)) { in sdhci_data_irq()
3433 host->data_cmd = NULL; in sdhci_data_irq()
3434 data_cmd->error = -ETIMEDOUT; in sdhci_data_irq()
3436 __sdhci_finish_mrq(host, data_cmd->mrq); in sdhci_data_irq()
3440 host->data_cmd = NULL; in sdhci_data_irq()
3442 * Some cards handle busy-end interrupt in sdhci_data_irq()
3446 if (host->cmd == data_cmd) in sdhci_data_irq()
3449 __sdhci_finish_mrq(host, data_cmd->mrq); in sdhci_data_irq()
3455 * SDHCI recovers from errors by resetting the cmd and data in sdhci_data_irq()
3459 if (host->pending_reset) in sdhci_data_irq()
3463 mmc_hostname(host->mmc), (unsigned)intmask); in sdhci_data_irq()
3471 host->data->error = -ETIMEDOUT; in sdhci_data_irq()
3474 host->data->error = -EILSEQ; in sdhci_data_irq()
3480 host->data->error = -EILSEQ; in sdhci_data_irq()
3490 pr_err("%s: ADMA error: 0x%08x\n", mmc_hostname(host->mmc), in sdhci_data_irq()
3494 host->data->error = -EIO; in sdhci_data_irq()
3495 if (host->ops->adma_workaround) in sdhci_data_irq()
3496 host->ops->adma_workaround(host, intmask); in sdhci_data_irq()
3499 if (host->data->error) in sdhci_data_irq()
3518 dmanow = dmastart + host->data->bytes_xfered; in sdhci_data_irq()
3523 ~((dma_addr_t)SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) + in sdhci_data_irq()
3525 host->data->bytes_xfered = dmanow - dmastart; in sdhci_data_irq()
3527 &dmastart, host->data->bytes_xfered, &dmanow); in sdhci_data_irq()
3532 if (host->cmd == host->data_cmd) { in sdhci_data_irq()
3538 host->data_early = 1; in sdhci_data_irq()
3549 struct mmc_data *data = mrq->data; in sdhci_defer_done()
3551 return host->pending_reset || host->always_defer_done || in sdhci_defer_done()
3552 ((host->flags & SDHCI_REQ_USE_DMA) && data && in sdhci_defer_done()
3553 data->host_cookie == COOKIE_MAPPED); in sdhci_defer_done()
3556 static irqreturn_t sdhci_irq(int irq, void *dev_id) in sdhci_irq()
3562 int max_loops = 16; in sdhci_irq()
3563 int i; in sdhci_irq()
3565 spin_lock(&host->lock); in sdhci_irq()
3567 if (host->runtime_suspended) { in sdhci_irq()
3568 spin_unlock(&host->lock); in sdhci_irq()
3581 if (host->ops->irq) { in sdhci_irq()
3582 intmask = host->ops->irq(host, intmask); in sdhci_irq()
3607 host->ier &= ~(SDHCI_INT_CARD_INSERT | in sdhci_irq()
3609 host->ier |= present ? SDHCI_INT_CARD_REMOVE : in sdhci_irq()
3611 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_irq()
3612 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_irq()
3617 host->thread_isr |= intmask & (SDHCI_INT_CARD_INSERT | in sdhci_irq()
3630 mmc_hostname(host->mmc)); in sdhci_irq()
3633 mmc_retune_needed(host->mmc); in sdhci_irq()
3636 (host->ier & SDHCI_INT_CARD_INT)) { in sdhci_irq()
3638 sdio_signal_irq(host->mmc); in sdhci_irq()
3655 } while (intmask && --max_loops); in sdhci_irq()
3659 struct mmc_request *mrq = host->mrqs_done[i]; in sdhci_irq()
3668 host->mrqs_done[i] = NULL; in sdhci_irq()
3672 if (host->deferred_cmd) in sdhci_irq()
3675 spin_unlock(&host->lock); in sdhci_irq()
3682 if (host->ops->request_done) in sdhci_irq()
3683 host->ops->request_done(host, mrqs_done[i]); in sdhci_irq()
3685 mmc_request_done(host->mmc, mrqs_done[i]); in sdhci_irq()
3690 mmc_hostname(host->mmc), unexpected); in sdhci_irq()
3698 irqreturn_t sdhci_thread_irq(int irq, void *dev_id) in sdhci_thread_irq()
3701 struct mmc_command *cmd; in sdhci_thread_irq() local
3708 spin_lock_irqsave(&host->lock, flags); in sdhci_thread_irq()
3710 isr = host->thread_isr; in sdhci_thread_irq()
3711 host->thread_isr = 0; in sdhci_thread_irq()
3713 cmd = host->deferred_cmd; in sdhci_thread_irq()
3714 if (cmd && !sdhci_send_command_retry(host, cmd, flags)) in sdhci_thread_irq()
3715 sdhci_finish_mrq(host, cmd->mrq); in sdhci_thread_irq()
3717 spin_unlock_irqrestore(&host->lock, flags); in sdhci_thread_irq()
3720 struct mmc_host *mmc = host->mmc; in sdhci_thread_irq()
3722 mmc->ops->card_event(mmc); in sdhci_thread_irq()
3740 return mmc_card_is_removable(host->mmc) && in sdhci_cd_irq_can_wakeup()
3741 !(host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && in sdhci_cd_irq_can_wakeup()
3742 !mmc_can_gpio_cd(host->mmc); in sdhci_cd_irq_can_wakeup()
3747 * the Interrupt Status Enable register too. See 'Table 1-6: Wakeup Signal
3766 if (mmc_card_wake_sdio_irq(host->mmc)) { in sdhci_enable_irq_wakeups()
3781 host->irq_wake_enabled = !enable_irq_wake(host->irq); in sdhci_enable_irq_wakeups()
3783 return host->irq_wake_enabled; in sdhci_enable_irq_wakeups()
3796 disable_irq_wake(host->irq); in sdhci_disable_irq_wakeups()
3798 host->irq_wake_enabled = false; in sdhci_disable_irq_wakeups()
3801 int sdhci_suspend_host(struct sdhci_host *host) in sdhci_suspend_host()
3805 mmc_retune_timer_stop(host->mmc); in sdhci_suspend_host()
3807 if (!device_may_wakeup(mmc_dev(host->mmc)) || in sdhci_suspend_host()
3809 host->ier = 0; in sdhci_suspend_host()
3812 free_irq(host->irq, host); in sdhci_suspend_host()
3820 int sdhci_resume_host(struct sdhci_host *host) in sdhci_resume_host()
3822 struct mmc_host *mmc = host->mmc; in sdhci_resume_host()
3823 int ret = 0; in sdhci_resume_host()
3825 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_resume_host()
3826 if (host->ops->enable_dma) in sdhci_resume_host()
3827 host->ops->enable_dma(host); in sdhci_resume_host()
3830 if ((mmc->pm_flags & MMC_PM_KEEP_POWER) && in sdhci_resume_host()
3831 (host->quirks2 & SDHCI_QUIRK2_HOST_OFF_CARD_ON)) { in sdhci_resume_host()
3834 host->pwr = 0; in sdhci_resume_host()
3835 host->clock = 0; in sdhci_resume_host()
3836 host->reinit_uhs = true; in sdhci_resume_host()
3837 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_resume_host()
3839 sdhci_init(host, (mmc->pm_flags & MMC_PM_KEEP_POWER)); in sdhci_resume_host()
3842 if (host->irq_wake_enabled) { in sdhci_resume_host()
3845 ret = request_threaded_irq(host->irq, sdhci_irq, in sdhci_resume_host()
3859 int sdhci_runtime_suspend_host(struct sdhci_host *host) in sdhci_runtime_suspend_host()
3863 mmc_retune_timer_stop(host->mmc); in sdhci_runtime_suspend_host()
3865 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_suspend_host()
3866 host->ier &= SDHCI_INT_CARD_INT; in sdhci_runtime_suspend_host()
3867 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_runtime_suspend_host()
3868 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_runtime_suspend_host()
3869 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_suspend_host()
3871 synchronize_hardirq(host->irq); in sdhci_runtime_suspend_host()
3873 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_suspend_host()
3874 host->runtime_suspended = true; in sdhci_runtime_suspend_host()
3875 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_suspend_host()
3881 int sdhci_runtime_resume_host(struct sdhci_host *host, int soft_reset) in sdhci_runtime_resume_host()
3883 struct mmc_host *mmc = host->mmc; in sdhci_runtime_resume_host()
3885 int host_flags = host->flags; in sdhci_runtime_resume_host()
3888 if (host->ops->enable_dma) in sdhci_runtime_resume_host()
3889 host->ops->enable_dma(host); in sdhci_runtime_resume_host()
3894 if (mmc->ios.power_mode != MMC_POWER_UNDEFINED && in sdhci_runtime_resume_host()
3895 mmc->ios.power_mode != MMC_POWER_OFF) { in sdhci_runtime_resume_host()
3896 /* Force clock and power re-program */ in sdhci_runtime_resume_host()
3897 host->pwr = 0; in sdhci_runtime_resume_host()
3898 host->clock = 0; in sdhci_runtime_resume_host()
3899 host->reinit_uhs = true; in sdhci_runtime_resume_host()
3900 mmc->ops->start_signal_voltage_switch(mmc, &mmc->ios); in sdhci_runtime_resume_host()
3901 mmc->ops->set_ios(mmc, &mmc->ios); in sdhci_runtime_resume_host()
3904 !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) { in sdhci_runtime_resume_host()
3905 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_resume_host()
3907 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_resume_host()
3910 if ((mmc->caps2 & MMC_CAP2_HS400_ES) && in sdhci_runtime_resume_host()
3911 mmc->ops->hs400_enhanced_strobe) in sdhci_runtime_resume_host()
3912 mmc->ops->hs400_enhanced_strobe(mmc, &mmc->ios); in sdhci_runtime_resume_host()
3915 spin_lock_irqsave(&host->lock, flags); in sdhci_runtime_resume_host()
3917 host->runtime_suspended = false; in sdhci_runtime_resume_host()
3926 spin_unlock_irqrestore(&host->lock, flags); in sdhci_runtime_resume_host()
3946 spin_lock_irqsave(&host->lock, flags); in sdhci_cqe_enable()
3953 * for cmd queuing to fetch both command and transfer descriptors. in sdhci_cqe_enable()
3955 if (host->v4_mode && (host->caps1 & SDHCI_CAN_DO_ADMA3)) in sdhci_cqe_enable()
3957 else if (host->flags & SDHCI_USE_64_BIT_DMA) in sdhci_cqe_enable()
3963 sdhci_writew(host, SDHCI_MAKE_BLKSZ(host->sdma_boundary, 512), in sdhci_cqe_enable()
3969 host->ier = host->cqe_ier; in sdhci_cqe_enable()
3971 sdhci_writel(host, host->ier, SDHCI_INT_ENABLE); in sdhci_cqe_enable()
3972 sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE); in sdhci_cqe_enable()
3974 host->cqe_on = true; in sdhci_cqe_enable()
3977 mmc_hostname(mmc), host->ier, in sdhci_cqe_enable()
3980 spin_unlock_irqrestore(&host->lock, flags); in sdhci_cqe_enable()
3989 spin_lock_irqsave(&host->lock, flags); in sdhci_cqe_disable()
3993 host->cqe_on = false; in sdhci_cqe_disable()
3999 mmc_hostname(mmc), host->ier, in sdhci_cqe_disable()
4002 spin_unlock_irqrestore(&host->lock, flags); in sdhci_cqe_disable()
4006 bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error, in sdhci_cqe_irq()
4007 int *data_error) in sdhci_cqe_irq()
4011 if (!host->cqe_on) in sdhci_cqe_irq()
4015 *cmd_error = -EILSEQ; in sdhci_cqe_irq()
4019 *cmd_error = -ETIMEDOUT; in sdhci_cqe_irq()
4025 *data_error = -EILSEQ; in sdhci_cqe_irq()
4029 *data_error = -ETIMEDOUT; in sdhci_cqe_irq()
4032 *data_error = -EIO; in sdhci_cqe_irq()
4038 mask = intmask & host->cqe_ier; in sdhci_cqe_irq()
4043 mmc_hostname(host->mmc)); in sdhci_cqe_irq()
4045 intmask &= ~(host->cqe_ier | SDHCI_INT_ERROR); in sdhci_cqe_irq()
4049 mmc_hostname(host->mmc), intmask); in sdhci_cqe_irq()
4074 return ERR_PTR(-ENOMEM); in sdhci_alloc_host()
4077 host->mmc = mmc; in sdhci_alloc_host()
4078 host->mmc_host_ops = sdhci_ops; in sdhci_alloc_host()
4079 mmc->ops = &host->mmc_host_ops; in sdhci_alloc_host()
4081 host->flags = SDHCI_SIGNALING_330; in sdhci_alloc_host()
4083 host->cqe_ier = SDHCI_CQE_INT_MASK; in sdhci_alloc_host()
4084 host->cqe_err_ier = SDHCI_CQE_INT_ERR_MASK; in sdhci_alloc_host()
4086 host->tuning_delay = -1; in sdhci_alloc_host()
4087 host->tuning_loop_count = MAX_TUNING_LOOP; in sdhci_alloc_host()
4089 host->sdma_boundary = SDHCI_DEFAULT_BOUNDARY_ARG; in sdhci_alloc_host()
4096 host->adma_table_cnt = SDHCI_MAX_SEGS * 2 + 1; in sdhci_alloc_host()
4097 host->max_adma = 65536; in sdhci_alloc_host()
4099 host->max_timeout_count = 0xE; in sdhci_alloc_host()
4101 host->complete_work_fn = sdhci_complete_work; in sdhci_alloc_host()
4102 host->thread_irq_fn = sdhci_thread_irq; in sdhci_alloc_host()
4109 static int sdhci_set_dma_mask(struct sdhci_host *host) in sdhci_set_dma_mask()
4111 struct mmc_host *mmc = host->mmc; in sdhci_set_dma_mask()
4113 int ret = -EINVAL; in sdhci_set_dma_mask()
4115 if (host->quirks2 & SDHCI_QUIRK2_BROKEN_64_BIT_DMA) in sdhci_set_dma_mask()
4116 host->flags &= ~SDHCI_USE_64_BIT_DMA; in sdhci_set_dma_mask()
4118 /* Try 64-bit mask if hardware is capable of it */ in sdhci_set_dma_mask()
4119 if (host->flags & SDHCI_USE_64_BIT_DMA) { in sdhci_set_dma_mask()
4122 pr_warn("%s: Failed to set 64-bit DMA mask.\n", in sdhci_set_dma_mask()
4124 host->flags &= ~SDHCI_USE_64_BIT_DMA; in sdhci_set_dma_mask()
4128 /* 32-bit mask as default & fallback */ in sdhci_set_dma_mask()
4132 pr_warn("%s: Failed to set 32-bit DMA mask.\n", in sdhci_set_dma_mask()
4146 if (host->read_caps) in __sdhci_read_caps()
4149 host->read_caps = true; in __sdhci_read_caps()
4152 host->quirks = debug_quirks; in __sdhci_read_caps()
4155 host->quirks2 = debug_quirks2; in __sdhci_read_caps()
4159 if (host->v4_mode) in __sdhci_read_caps()
4162 device_property_read_u64(mmc_dev(host->mmc), in __sdhci_read_caps()
4163 "sdhci-caps-mask", &dt_caps_mask); in __sdhci_read_caps()
4164 device_property_read_u64(mmc_dev(host->mmc), in __sdhci_read_caps()
4165 "sdhci-caps", &dt_caps); in __sdhci_read_caps()
4168 host->version = (v & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT; in __sdhci_read_caps()
4171 host->caps = *caps; in __sdhci_read_caps()
4173 host->caps = sdhci_readl(host, SDHCI_CAPABILITIES); in __sdhci_read_caps()
4174 host->caps &= ~lower_32_bits(dt_caps_mask); in __sdhci_read_caps()
4175 host->caps |= lower_32_bits(dt_caps); in __sdhci_read_caps()
4178 if (host->version < SDHCI_SPEC_300) in __sdhci_read_caps()
4182 host->caps1 = *caps1; in __sdhci_read_caps()
4184 host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); in __sdhci_read_caps()
4185 host->caps1 &= ~upper_32_bits(dt_caps_mask); in __sdhci_read_caps()
4186 host->caps1 |= upper_32_bits(dt_caps); in __sdhci_read_caps()
4193 struct mmc_host *mmc = host->mmc; in sdhci_allocate_bounce_buffer()
4194 unsigned int max_blocks; in sdhci_allocate_bounce_buffer()
4195 unsigned int bounce_size; in sdhci_allocate_bounce_buffer()
4196 int ret; in sdhci_allocate_bounce_buffer()
4209 if (mmc->max_req_size < bounce_size) in sdhci_allocate_bounce_buffer()
4210 bounce_size = mmc->max_req_size; in sdhci_allocate_bounce_buffer()
4218 host->bounce_buffer = devm_kmalloc(mmc_dev(mmc), in sdhci_allocate_bounce_buffer()
4221 if (!host->bounce_buffer) { in sdhci_allocate_bounce_buffer()
4227 * mmc->max_segs == 1. in sdhci_allocate_bounce_buffer()
4232 host->bounce_addr = dma_map_single(mmc_dev(mmc), in sdhci_allocate_bounce_buffer()
4233 host->bounce_buffer, in sdhci_allocate_bounce_buffer()
4236 ret = dma_mapping_error(mmc_dev(mmc), host->bounce_addr); in sdhci_allocate_bounce_buffer()
4238 devm_kfree(mmc_dev(mmc), host->bounce_buffer); in sdhci_allocate_bounce_buffer()
4239 host->bounce_buffer = NULL; in sdhci_allocate_bounce_buffer()
4244 host->bounce_buffer_size = bounce_size; in sdhci_allocate_bounce_buffer()
4247 mmc->max_segs = max_blocks; in sdhci_allocate_bounce_buffer()
4248 mmc->max_seg_size = bounce_size; in sdhci_allocate_bounce_buffer()
4249 mmc->max_req_size = bounce_size; in sdhci_allocate_bounce_buffer()
4259 * version 4.10 in Capabilities Register is used as 64-bit System in sdhci_can_64bit_dma()
4262 if (host->version >= SDHCI_SPEC_410 && host->v4_mode) in sdhci_can_64bit_dma()
4263 return host->caps & SDHCI_CAN_64BIT_V4; in sdhci_can_64bit_dma()
4265 return host->caps & SDHCI_CAN_64BIT; in sdhci_can_64bit_dma()
4268 int sdhci_setup_host(struct sdhci_host *host) in sdhci_setup_host()
4272 unsigned int ocr_avail; in sdhci_setup_host()
4273 unsigned int override_timeout_clk; in sdhci_setup_host()
4275 int ret = 0; in sdhci_setup_host()
4280 return -EINVAL; in sdhci_setup_host()
4282 mmc = host->mmc; in sdhci_setup_host()
4290 if (!mmc->supply.vqmmc) { in sdhci_setup_host()
4306 override_timeout_clk = host->timeout_clk; in sdhci_setup_host()
4308 if (host->version > SDHCI_SPEC_420) { in sdhci_setup_host()
4310 mmc_hostname(mmc), host->version); in sdhci_setup_host()
4313 if (host->quirks & SDHCI_QUIRK_FORCE_DMA) in sdhci_setup_host()
4314 host->flags |= SDHCI_USE_SDMA; in sdhci_setup_host()
4315 else if (!(host->caps & SDHCI_CAN_DO_SDMA)) in sdhci_setup_host()
4318 host->flags |= SDHCI_USE_SDMA; in sdhci_setup_host()
4320 if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) && in sdhci_setup_host()
4321 (host->flags & SDHCI_USE_SDMA)) { in sdhci_setup_host()
4323 host->flags &= ~SDHCI_USE_SDMA; in sdhci_setup_host()
4326 if ((host->version >= SDHCI_SPEC_200) && in sdhci_setup_host()
4327 (host->caps & SDHCI_CAN_DO_ADMA2)) in sdhci_setup_host()
4328 host->flags |= SDHCI_USE_ADMA; in sdhci_setup_host()
4330 if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) && in sdhci_setup_host()
4331 (host->flags & SDHCI_USE_ADMA)) { in sdhci_setup_host()
4333 host->flags &= ~SDHCI_USE_ADMA; in sdhci_setup_host()
4337 host->flags |= SDHCI_USE_64_BIT_DMA; in sdhci_setup_host()
4339 if (host->use_external_dma) { in sdhci_setup_host()
4341 if (ret == -EPROBE_DEFER) in sdhci_setup_host()
4351 host->flags &= ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); in sdhci_setup_host()
4354 if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { in sdhci_setup_host()
4355 if (host->ops->set_dma_mask) in sdhci_setup_host()
4356 ret = host->ops->set_dma_mask(host); in sdhci_setup_host()
4360 if (!ret && host->ops->enable_dma) in sdhci_setup_host()
4361 ret = host->ops->enable_dma(host); in sdhci_setup_host()
4364 pr_warn("%s: No suitable DMA available - falling back to PIO\n", in sdhci_setup_host()
4366 host->flags &= ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); in sdhci_setup_host()
4372 /* SDMA does not support 64-bit DMA if v4 mode not set */ in sdhci_setup_host()
4373 if ((host->flags & SDHCI_USE_64_BIT_DMA) && !host->v4_mode) in sdhci_setup_host()
4374 host->flags &= ~SDHCI_USE_SDMA; in sdhci_setup_host()
4376 if (host->flags & SDHCI_USE_ADMA) { in sdhci_setup_host()
4380 if (!(host->flags & SDHCI_USE_64_BIT_DMA)) in sdhci_setup_host()
4381 host->alloc_desc_sz = SDHCI_ADMA2_32_DESC_SZ; in sdhci_setup_host()
4382 else if (!host->alloc_desc_sz) in sdhci_setup_host()
4383 host->alloc_desc_sz = SDHCI_ADMA2_64_DESC_SZ(host); in sdhci_setup_host()
4385 host->desc_sz = host->alloc_desc_sz; in sdhci_setup_host()
4386 host->adma_table_sz = host->adma_table_cnt * host->desc_sz; in sdhci_setup_host()
4388 host->align_buffer_sz = SDHCI_MAX_SEGS * SDHCI_ADMA2_ALIGN; in sdhci_setup_host()
4390 * Use zalloc to zero the reserved high 32-bits of 128-bit in sdhci_setup_host()
4394 host->align_buffer_sz + host->adma_table_sz, in sdhci_setup_host()
4397 pr_warn("%s: Unable to allocate ADMA buffers - falling back to standard DMA\n", in sdhci_setup_host()
4399 host->flags &= ~SDHCI_USE_ADMA; in sdhci_setup_host()
4400 } else if ((dma + host->align_buffer_sz) & in sdhci_setup_host()
4401 (SDHCI_ADMA2_DESC_ALIGN - 1)) { in sdhci_setup_host()
4404 host->flags &= ~SDHCI_USE_ADMA; in sdhci_setup_host()
4405 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_setup_host()
4406 host->adma_table_sz, buf, dma); in sdhci_setup_host()
4408 host->align_buffer = buf; in sdhci_setup_host()
4409 host->align_addr = dma; in sdhci_setup_host()
4411 host->adma_table = buf + host->align_buffer_sz; in sdhci_setup_host()
4412 host->adma_addr = dma + host->align_buffer_sz; in sdhci_setup_host()
4421 if (!(host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA))) { in sdhci_setup_host()
4422 host->dma_mask = DMA_BIT_MASK(64); in sdhci_setup_host()
4423 mmc_dev(mmc)->dma_mask = &host->dma_mask; in sdhci_setup_host()
4426 if (host->version >= SDHCI_SPEC_300) in sdhci_setup_host()
4427 host->max_clk = FIELD_GET(SDHCI_CLOCK_V3_BASE_MASK, host->caps); in sdhci_setup_host()
4429 host->max_clk = FIELD_GET(SDHCI_CLOCK_BASE_MASK, host->caps); in sdhci_setup_host()
4431 host->max_clk *= 1000000; in sdhci_setup_host()
4432 if (host->max_clk == 0 || host->quirks & in sdhci_setup_host()
4434 if (!host->ops->get_max_clock) { in sdhci_setup_host()
4437 ret = -ENODEV; in sdhci_setup_host()
4440 host->max_clk = host->ops->get_max_clock(host); in sdhci_setup_host()
4447 host->clk_mul = FIELD_GET(SDHCI_CLOCK_MUL_MASK, host->caps1); in sdhci_setup_host()
4455 if (host->clk_mul) in sdhci_setup_host()
4456 host->clk_mul += 1; in sdhci_setup_host()
4461 max_clk = host->max_clk; in sdhci_setup_host()
4463 if (host->ops->get_min_clock) in sdhci_setup_host()
4464 mmc->f_min = host->ops->get_min_clock(host); in sdhci_setup_host()
4465 else if (host->version >= SDHCI_SPEC_300) { in sdhci_setup_host()
4466 if (host->clk_mul) in sdhci_setup_host()
4467 max_clk = host->max_clk * host->clk_mul; in sdhci_setup_host()
4472 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300; in sdhci_setup_host()
4474 mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200; in sdhci_setup_host()
4476 if (!mmc->f_max || mmc->f_max > max_clk) in sdhci_setup_host()
4477 mmc->f_max = max_clk; in sdhci_setup_host()
4479 if (!(host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) { in sdhci_setup_host()
4480 host->timeout_clk = FIELD_GET(SDHCI_TIMEOUT_CLK_MASK, host->caps); in sdhci_setup_host()
4482 if (host->caps & SDHCI_TIMEOUT_CLK_UNIT) in sdhci_setup_host()
4483 host->timeout_clk *= 1000; in sdhci_setup_host()
4485 if (host->timeout_clk == 0) { in sdhci_setup_host()
4486 if (!host->ops->get_timeout_clock) { in sdhci_setup_host()
4489 ret = -ENODEV; in sdhci_setup_host()
4493 host->timeout_clk = in sdhci_setup_host()
4494 DIV_ROUND_UP(host->ops->get_timeout_clock(host), in sdhci_setup_host()
4499 host->timeout_clk = override_timeout_clk; in sdhci_setup_host()
4501 mmc->max_busy_timeout = host->ops->get_max_timeout_count ? in sdhci_setup_host()
4502 host->ops->get_max_timeout_count(host) : 1 << 27; in sdhci_setup_host()
4503 mmc->max_busy_timeout /= host->timeout_clk; in sdhci_setup_host()
4506 if (host->quirks2 & SDHCI_QUIRK2_DISABLE_HW_TIMEOUT && in sdhci_setup_host()
4507 !host->ops->get_max_timeout_count) in sdhci_setup_host()
4508 mmc->max_busy_timeout = 0; in sdhci_setup_host()
4510 mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_CMD23; in sdhci_setup_host()
4511 mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD; in sdhci_setup_host()
4513 if (host->quirks & SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12) in sdhci_setup_host()
4514 host->flags |= SDHCI_AUTO_CMD12; in sdhci_setup_host()
4517 * For v3 mode, Auto-CMD23 stuff only works in ADMA or PIO. in sdhci_setup_host()
4518 * For v4 mode, SDMA may use Auto-CMD23 as well. in sdhci_setup_host()
4520 if ((host->version >= SDHCI_SPEC_300) && in sdhci_setup_host()
4521 ((host->flags & SDHCI_USE_ADMA) || in sdhci_setup_host()
4522 !(host->flags & SDHCI_USE_SDMA) || host->v4_mode) && in sdhci_setup_host()
4523 !(host->quirks2 & SDHCI_QUIRK2_ACMD23_BROKEN)) { in sdhci_setup_host()
4524 host->flags |= SDHCI_AUTO_CMD23; in sdhci_setup_host()
4525 DBG("Auto-CMD23 available\n"); in sdhci_setup_host()
4527 DBG("Auto-CMD23 unavailable\n"); in sdhci_setup_host()
4531 * A controller may support 8-bit width, but the board itself in sdhci_setup_host()
4533 * 8-bit width must set "mmc->caps |= MMC_CAP_8_BIT_DATA;" in in sdhci_setup_host()
4535 * won't assume 8-bit width for hosts without that CAP. in sdhci_setup_host()
4537 if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) in sdhci_setup_host()
4538 mmc->caps |= MMC_CAP_4_BIT_DATA; in sdhci_setup_host()
4540 if (host->quirks2 & SDHCI_QUIRK2_HOST_NO_CMD23) in sdhci_setup_host()
4541 mmc->caps &= ~MMC_CAP_CMD23; in sdhci_setup_host()
4543 if (host->caps & SDHCI_CAN_DO_HISPD) in sdhci_setup_host()
4544 mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; in sdhci_setup_host()
4546 if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && in sdhci_setup_host()
4549 mmc->caps |= MMC_CAP_NEEDS_POLL; in sdhci_setup_host()
4551 if (!IS_ERR(mmc->supply.vqmmc)) { in sdhci_setup_host()
4553 ret = regulator_enable(mmc->supply.vqmmc); in sdhci_setup_host()
4554 host->sdhci_core_to_disable_vqmmc = !ret; in sdhci_setup_host()
4558 if (!regulator_is_supported_voltage(mmc->supply.vqmmc, 1700000, in sdhci_setup_host()
4560 host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | in sdhci_setup_host()
4565 if (!regulator_is_supported_voltage(mmc->supply.vqmmc, 2700000, in sdhci_setup_host()
4567 host->flags &= ~SDHCI_SIGNALING_330; in sdhci_setup_host()
4572 mmc->supply.vqmmc = ERR_PTR(-EINVAL); in sdhci_setup_host()
4577 if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V) { in sdhci_setup_host()
4578 host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | in sdhci_setup_host()
4581 * The SDHCI controller in a SoC might support HS200/HS400 in sdhci_setup_host()
4582 * (indicated using mmc-hs200-1_8v/mmc-hs400-1_8v dt property), in sdhci_setup_host()
4584 * connected to 1.8v then HS200/HS400 cannot be supported. in sdhci_setup_host()
4585 * Disable HS200/HS400 if the board does not have 1.8v connected in sdhci_setup_host()
4588 mmc->caps2 &= ~(MMC_CAP2_HSX00_1_8V | MMC_CAP2_HS400_ES); in sdhci_setup_host()
4589 mmc->caps &= ~(MMC_CAP_1_8V_DDR | MMC_CAP_UHS); in sdhci_setup_host()
4592 /* Any UHS-I mode in caps implies SDR12 and SDR25 support. */ in sdhci_setup_host()
4593 if (host->caps1 & (SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | in sdhci_setup_host()
4595 mmc->caps |= MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25; in sdhci_setup_host()
4598 if (host->caps1 & SDHCI_SUPPORT_SDR104) { in sdhci_setup_host()
4599 mmc->caps |= MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_SDR50; in sdhci_setup_host()
4601 * field can be promoted to support HS200. in sdhci_setup_host()
4603 if (!(host->quirks2 & SDHCI_QUIRK2_BROKEN_HS200)) in sdhci_setup_host()
4604 mmc->caps2 |= MMC_CAP2_HS200; in sdhci_setup_host()
4605 } else if (host->caps1 & SDHCI_SUPPORT_SDR50) { in sdhci_setup_host()
4606 mmc->caps |= MMC_CAP_UHS_SDR50; in sdhci_setup_host()
4609 if (host->quirks2 & SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 && in sdhci_setup_host()
4610 (host->caps1 & SDHCI_SUPPORT_HS400)) in sdhci_setup_host()
4611 mmc->caps2 |= MMC_CAP2_HS400; in sdhci_setup_host()
4613 if ((mmc->caps2 & MMC_CAP2_HSX00_1_2V) && in sdhci_setup_host()
4614 (IS_ERR(mmc->supply.vqmmc) || in sdhci_setup_host()
4615 !regulator_is_supported_voltage(mmc->supply.vqmmc, 1100000, in sdhci_setup_host()
4617 mmc->caps2 &= ~MMC_CAP2_HSX00_1_2V; in sdhci_setup_host()
4619 if ((host->caps1 & SDHCI_SUPPORT_DDR50) && in sdhci_setup_host()
4620 !(host->quirks2 & SDHCI_QUIRK2_BROKEN_DDR50)) in sdhci_setup_host()
4621 mmc->caps |= MMC_CAP_UHS_DDR50; in sdhci_setup_host()
4624 if (host->caps1 & SDHCI_USE_SDR50_TUNING) in sdhci_setup_host()
4625 host->flags |= SDHCI_SDR50_NEEDS_TUNING; in sdhci_setup_host()
4628 if (host->caps1 & SDHCI_DRIVER_TYPE_A) in sdhci_setup_host()
4629 mmc->caps |= MMC_CAP_DRIVER_TYPE_A; in sdhci_setup_host()
4630 if (host->caps1 & SDHCI_DRIVER_TYPE_C) in sdhci_setup_host()
4631 mmc->caps |= MMC_CAP_DRIVER_TYPE_C; in sdhci_setup_host()
4632 if (host->caps1 & SDHCI_DRIVER_TYPE_D) in sdhci_setup_host()
4633 mmc->caps |= MMC_CAP_DRIVER_TYPE_D; in sdhci_setup_host()
4635 /* Initial value for re-tuning timer count */ in sdhci_setup_host()
4636 host->tuning_count = FIELD_GET(SDHCI_RETUNING_TIMER_COUNT_MASK, in sdhci_setup_host()
4637 host->caps1); in sdhci_setup_host()
4640 * In case Re-tuning Timer is not disabled, the actual value of in sdhci_setup_host()
4641 * re-tuning timer will be 2 ^ (n - 1). in sdhci_setup_host()
4643 if (host->tuning_count) in sdhci_setup_host()
4644 host->tuning_count = 1 << (host->tuning_count - 1); in sdhci_setup_host()
4646 /* Re-tuning mode supported by the Host Controller */ in sdhci_setup_host()
4647 host->tuning_mode = FIELD_GET(SDHCI_RETUNING_MODE_MASK, host->caps1); in sdhci_setup_host()
4659 if (!max_current_caps && !IS_ERR(mmc->supply.vmmc)) { in sdhci_setup_host()
4660 int curr = regulator_get_current_limit(mmc->supply.vmmc); in sdhci_setup_host()
4675 if (host->caps & SDHCI_CAN_VDD_330) { in sdhci_setup_host()
4678 mmc->max_current_330 = FIELD_GET(SDHCI_MAX_CURRENT_330_MASK, in sdhci_setup_host()
4682 if (host->caps & SDHCI_CAN_VDD_300) { in sdhci_setup_host()
4685 mmc->max_current_300 = FIELD_GET(SDHCI_MAX_CURRENT_300_MASK, in sdhci_setup_host()
4689 if (host->caps & SDHCI_CAN_VDD_180) { in sdhci_setup_host()
4692 mmc->max_current_180 = FIELD_GET(SDHCI_MAX_CURRENT_180_MASK, in sdhci_setup_host()
4698 if (host->ocr_mask) in sdhci_setup_host()
4699 ocr_avail = host->ocr_mask; in sdhci_setup_host()
4702 if (mmc->ocr_avail) in sdhci_setup_host()
4703 ocr_avail = mmc->ocr_avail; in sdhci_setup_host()
4705 mmc->ocr_avail = ocr_avail; in sdhci_setup_host()
4706 mmc->ocr_avail_sdio = ocr_avail; in sdhci_setup_host()
4707 if (host->ocr_avail_sdio) in sdhci_setup_host()
4708 mmc->ocr_avail_sdio &= host->ocr_avail_sdio; in sdhci_setup_host()
4709 mmc->ocr_avail_sd = ocr_avail; in sdhci_setup_host()
4710 if (host->ocr_avail_sd) in sdhci_setup_host()
4711 mmc->ocr_avail_sd &= host->ocr_avail_sd; in sdhci_setup_host()
4713 mmc->ocr_avail_sd &= ~MMC_VDD_165_195; in sdhci_setup_host()
4714 mmc->ocr_avail_mmc = ocr_avail; in sdhci_setup_host()
4715 if (host->ocr_avail_mmc) in sdhci_setup_host()
4716 mmc->ocr_avail_mmc &= host->ocr_avail_mmc; in sdhci_setup_host()
4718 if (mmc->ocr_avail == 0) { in sdhci_setup_host()
4721 ret = -ENODEV; in sdhci_setup_host()
4725 if ((mmc->caps & (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | in sdhci_setup_host()
4728 (mmc->caps2 & (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V))) in sdhci_setup_host()
4729 host->flags |= SDHCI_SIGNALING_180; in sdhci_setup_host()
4731 if (mmc->caps2 & MMC_CAP2_HSX00_1_2V) in sdhci_setup_host()
4732 host->flags |= SDHCI_SIGNALING_120; in sdhci_setup_host()
4734 spin_lock_init(&host->lock); in sdhci_setup_host()
4741 mmc->max_req_size = 524288; in sdhci_setup_host()
4747 if (host->flags & SDHCI_USE_ADMA) { in sdhci_setup_host()
4748 mmc->max_segs = SDHCI_MAX_SEGS; in sdhci_setup_host()
4749 } else if (host->flags & SDHCI_USE_SDMA) { in sdhci_setup_host()
4750 mmc->max_segs = 1; in sdhci_setup_host()
4751 mmc->max_req_size = min_t(size_t, mmc->max_req_size, in sdhci_setup_host()
4754 mmc->max_segs = SDHCI_MAX_SEGS; in sdhci_setup_host()
4762 if (host->flags & SDHCI_USE_ADMA) { in sdhci_setup_host()
4763 if (host->quirks & SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC) { in sdhci_setup_host()
4764 host->max_adma = 65532; /* 32-bit alignment */ in sdhci_setup_host()
4765 mmc->max_seg_size = 65535; in sdhci_setup_host()
4770 * descriptor (16-bit field), but some controllers do in sdhci_setup_host()
4779 if (mmc->max_seg_size < PAGE_SIZE) in sdhci_setup_host()
4780 mmc->max_seg_size = PAGE_SIZE; in sdhci_setup_host()
4782 mmc->max_seg_size = 65536; in sdhci_setup_host()
4785 mmc->max_seg_size = mmc->max_req_size; in sdhci_setup_host()
4792 if (host->quirks & SDHCI_QUIRK_FORCE_BLK_SZ_2048) { in sdhci_setup_host()
4793 mmc->max_blk_size = 2; in sdhci_setup_host()
4795 mmc->max_blk_size = (host->caps & SDHCI_MAX_BLOCK_MASK) >> in sdhci_setup_host()
4797 if (mmc->max_blk_size >= 3) { in sdhci_setup_host()
4800 mmc->max_blk_size = 0; in sdhci_setup_host()
4804 mmc->max_blk_size = 512 << mmc->max_blk_size; in sdhci_setup_host()
4809 mmc->max_blk_count = (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535; in sdhci_setup_host()
4811 if (mmc->max_segs == 1) in sdhci_setup_host()
4812 /* This may alter mmc->*_blk_* parameters */ in sdhci_setup_host()
4818 if (host->sdhci_core_to_disable_vqmmc) in sdhci_setup_host()
4819 regulator_disable(mmc->supply.vqmmc); in sdhci_setup_host()
4821 if (host->align_buffer) in sdhci_setup_host()
4822 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_setup_host()
4823 host->adma_table_sz, host->align_buffer, in sdhci_setup_host()
4824 host->align_addr); in sdhci_setup_host()
4825 host->adma_table = NULL; in sdhci_setup_host()
4826 host->align_buffer = NULL; in sdhci_setup_host()
4834 struct mmc_host *mmc = host->mmc; in sdhci_cleanup_host()
4836 if (host->sdhci_core_to_disable_vqmmc) in sdhci_cleanup_host()
4837 regulator_disable(mmc->supply.vqmmc); in sdhci_cleanup_host()
4839 if (host->align_buffer) in sdhci_cleanup_host()
4840 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_cleanup_host()
4841 host->adma_table_sz, host->align_buffer, in sdhci_cleanup_host()
4842 host->align_addr); in sdhci_cleanup_host()
4844 if (host->use_external_dma) in sdhci_cleanup_host()
4847 host->adma_table = NULL; in sdhci_cleanup_host()
4848 host->align_buffer = NULL; in sdhci_cleanup_host()
4852 int __sdhci_add_host(struct sdhci_host *host) in __sdhci_add_host()
4854 unsigned int flags = WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_HIGHPRI; in __sdhci_add_host()
4855 struct mmc_host *mmc = host->mmc; in __sdhci_add_host()
4856 int ret; in __sdhci_add_host()
4858 if ((mmc->caps2 & MMC_CAP2_CQE) && in __sdhci_add_host()
4859 (host->quirks & SDHCI_QUIRK_BROKEN_CQE)) { in __sdhci_add_host()
4860 mmc->caps2 &= ~MMC_CAP2_CQE; in __sdhci_add_host()
4861 mmc->cqe_ops = NULL; in __sdhci_add_host()
4864 host->complete_wq = alloc_workqueue("sdhci", flags, 0); in __sdhci_add_host()
4865 if (!host->complete_wq) in __sdhci_add_host()
4866 return -ENOMEM; in __sdhci_add_host()
4868 INIT_WORK(&host->complete_work, host->complete_work_fn); in __sdhci_add_host()
4870 timer_setup(&host->timer, sdhci_timeout_timer, 0); in __sdhci_add_host()
4871 timer_setup(&host->data_timer, sdhci_timeout_data_timer, 0); in __sdhci_add_host()
4873 init_waitqueue_head(&host->buf_ready_int); in __sdhci_add_host()
4877 ret = request_threaded_irq(host->irq, sdhci_irq, host->thread_irq_fn, in __sdhci_add_host()
4881 mmc_hostname(mmc), host->irq, ret); in __sdhci_add_host()
4897 mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)), in __sdhci_add_host()
4898 host->use_external_dma ? "External DMA" : in __sdhci_add_host()
4899 (host->flags & SDHCI_USE_ADMA) ? in __sdhci_add_host()
4900 (host->flags & SDHCI_USE_64_BIT_DMA) ? "ADMA 64-bit" : "ADMA" : in __sdhci_add_host()
4901 (host->flags & SDHCI_USE_SDMA) ? "DMA" : "PIO"); in __sdhci_add_host()
4913 free_irq(host->irq, host); in __sdhci_add_host()
4915 destroy_workqueue(host->complete_wq); in __sdhci_add_host()
4921 int sdhci_add_host(struct sdhci_host *host) in sdhci_add_host()
4923 int ret; in sdhci_add_host()
4942 void sdhci_remove_host(struct sdhci_host *host, int dead) in sdhci_remove_host()
4944 struct mmc_host *mmc = host->mmc; in sdhci_remove_host()
4948 spin_lock_irqsave(&host->lock, flags); in sdhci_remove_host()
4950 host->flags |= SDHCI_DEVICE_DEAD; in sdhci_remove_host()
4955 sdhci_error_out_mrqs(host, -ENOMEDIUM); in sdhci_remove_host()
4958 spin_unlock_irqrestore(&host->lock, flags); in sdhci_remove_host()
4972 free_irq(host->irq, host); in sdhci_remove_host()
4974 del_timer_sync(&host->timer); in sdhci_remove_host()
4975 del_timer_sync(&host->data_timer); in sdhci_remove_host()
4977 destroy_workqueue(host->complete_wq); in sdhci_remove_host()
4979 if (host->sdhci_core_to_disable_vqmmc) in sdhci_remove_host()
4980 regulator_disable(mmc->supply.vqmmc); in sdhci_remove_host()
4982 if (host->align_buffer) in sdhci_remove_host()
4983 dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + in sdhci_remove_host()
4984 host->adma_table_sz, host->align_buffer, in sdhci_remove_host()
4985 host->align_addr); in sdhci_remove_host()
4987 if (host->use_external_dma) in sdhci_remove_host()
4990 host->adma_table = NULL; in sdhci_remove_host()
4991 host->align_buffer = NULL; in sdhci_remove_host()
4998 mmc_free_host(host->mmc); in sdhci_free_host()
5009 static int __init sdhci_drv_init(void) in sdhci_drv_init()