1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Realtek PCI-Express SD/MMC Card Interface driver
4  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
53 	return &(host->pdev->dev);  in sdmmc_dev()
58 	rtsx_pci_write_register(host->pcr, CARD_STOP,  in sd_clear_error()
65 	u16 len = end - start + 1;  in dump_reg_range()
71 		int n = min(8, len - i);  in dump_reg_range()
75 			rtsx_pci_read_register(host->pcr, start + i + j,  in dump_reg_range()
93 	return rtsx_pci_readl(host->pcr, RTSX_BIPR) & SD_EXIST;  in sd_get_cd_int()
99 		SD_CMD_START | cmd->opcode);  in sd_cmd_set_sd_cmd()
100 	rtsx_pci_write_be32(pcr, SD_CMD1, cmd->arg);  in sd_cmd_set_sd_cmd()
125 		return -EINVAL;  in sd_response_type()
139  * sd_pre_dma_transfer - do dma_map_sg() or using cookie
143  *	0 - do dma_map_sg()
144  *	1 - using cookie
149 	struct rtsx_pcr *pcr = host->pcr;  in sd_pre_dma_transfer()
150 	int read = data->flags & MMC_DATA_READ;  in sd_pre_dma_transfer()
154 	if (!pre && data->host_cookie && data->host_cookie != host->cookie) {  in sd_pre_dma_transfer()
156 			"error: data->host_cookie = %d, host->cookie = %d\n",  in sd_pre_dma_transfer()
157 			data->host_cookie, host->cookie);  in sd_pre_dma_transfer()
158 		data->host_cookie = 0;  in sd_pre_dma_transfer()
161 	if (pre || data->host_cookie != host->cookie) {  in sd_pre_dma_transfer()
162 		count = rtsx_pci_dma_map_sg(pcr, data->sg, data->sg_len, read);  in sd_pre_dma_transfer()
164 		count = host->cookie_sg_count;  in sd_pre_dma_transfer()
169 		host->cookie_sg_count = count;  in sd_pre_dma_transfer()
170 		if (++host->cookie < 0)  in sd_pre_dma_transfer()
171 			host->cookie = 1;  in sd_pre_dma_transfer()
172 		data->host_cookie = host->cookie;  in sd_pre_dma_transfer()
174 		host->sg_count = count;  in sd_pre_dma_transfer()
183 	struct mmc_data *data = mrq->data;  in sdmmc_pre_req()
185 	if (data->host_cookie) {  in sdmmc_pre_req()
187 			"error: reset data->host_cookie = %d\n",  in sdmmc_pre_req()
188 			data->host_cookie);  in sdmmc_pre_req()
189 		data->host_cookie = 0;  in sdmmc_pre_req()
193 	dev_dbg(sdmmc_dev(host), "pre dma sg: %d\n", host->cookie_sg_count);  in sdmmc_pre_req()
200 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_post_req()
201 	struct mmc_data *data = mrq->data;  in sdmmc_post_req()
202 	int read = data->flags & MMC_DATA_READ;  in sdmmc_post_req()
204 	rtsx_pci_dma_unmap_sg(pcr, data->sg, data->sg_len, read);  in sdmmc_post_req()
205 	data->host_cookie = 0;  in sdmmc_post_req()
211 	struct rtsx_pcr *pcr = host->pcr;  in sd_send_cmd_get_rsp()
212 	u8 cmd_idx = (u8)cmd->opcode;  in sd_send_cmd_get_rsp()
213 	u32 arg = cmd->arg;  in sd_send_cmd_get_rsp()
232 		timeout = cmd->busy_timeout ? cmd->busy_timeout : 3000;  in sd_send_cmd_get_rsp()
234 	if (cmd->opcode == SD_SWITCH_VOLTAGE) {  in sd_send_cmd_get_rsp()
255 		/* Read data from ping-pong buffer */  in sd_send_cmd_get_rsp()
285 		err = -EILSEQ;  in sd_send_cmd_get_rsp()
293 			err = -EILSEQ;  in sd_send_cmd_get_rsp()
301 		 * The controller offloads the last byte {CRC-7, end bit 1'b1}  in sd_send_cmd_get_rsp()
308 			cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4);  in sd_send_cmd_get_rsp()
309 			dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n",  in sd_send_cmd_get_rsp()
310 					i, cmd->resp[i]);  in sd_send_cmd_get_rsp()
313 		cmd->resp[0] = get_unaligned_be32(ptr + 1);  in sd_send_cmd_get_rsp()
314 		dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",  in sd_send_cmd_get_rsp()
315 				cmd->resp[0]);  in sd_send_cmd_get_rsp()
319 	cmd->error = err;  in sd_send_cmd_get_rsp()
329 	struct rtsx_pcr *pcr = host->pcr;  in sd_read_data()
334 		__func__, cmd->opcode, cmd->arg);  in sd_read_data()
339 	if (cmd->opcode == MMC_SEND_TUNING_BLOCK)  in sd_read_data()
383 	struct rtsx_pcr *pcr = host->pcr;  in sd_write_data()
387 		__func__, cmd->opcode, cmd->arg);  in sd_write_data()
393 	if (cmd->error)  in sd_write_data()
394 		return cmd->error;  in sd_write_data()
429 	struct rtsx_pcr *pcr = host->pcr;  in sd_read_long_data()
430 	struct mmc_host *mmc = host->mmc;  in sd_read_long_data()
431 	struct mmc_card *card = mmc->card;  in sd_read_long_data()
432 	struct mmc_command *cmd = mrq->cmd;  in sd_read_long_data()
433 	struct mmc_data *data = mrq->data;  in sd_read_long_data()
438 	size_t data_len = data->blksz * data->blocks;  in sd_read_long_data()
441 		__func__, cmd->opcode, cmd->arg);  in sd_read_long_data()
452 	sd_cmd_set_data_len(pcr, data->blocks, data->blksz);  in sd_read_long_data()
474 	err = rtsx_pci_dma_transfer(pcr, data->sg, host->sg_count, 1, 10000);  in sd_read_long_data()
487 	struct rtsx_pcr *pcr = host->pcr;  in sd_write_long_data()
488 	struct mmc_host *mmc = host->mmc;  in sd_write_long_data()
489 	struct mmc_card *card = mmc->card;  in sd_write_long_data()
490 	struct mmc_command *cmd = mrq->cmd;  in sd_write_long_data()
491 	struct mmc_data *data = mrq->data;  in sd_write_long_data()
495 	size_t data_len = data->blksz * data->blocks;  in sd_write_long_data()
498 	if (cmd->error)  in sd_write_long_data()
499 		return cmd->error;  in sd_write_long_data()
502 		__func__, cmd->opcode, cmd->arg);  in sd_write_long_data()
511 	sd_cmd_set_data_len(pcr, data->blocks, data->blksz);  in sd_write_long_data()
532 	err = rtsx_pci_dma_transfer(pcr, data->sg, host->sg_count, 0, 10000);  in sd_write_long_data()
543 	rtsx_pci_write_register(host->pcr, SD_CFG1,  in sd_enable_initial_mode()
549 	rtsx_pci_write_register(host->pcr, SD_CFG1,  in sd_disable_initial_mode()
555 	struct mmc_data *data = mrq->data;  in sd_rw_multi()
558 	if (host->sg_count < 0) {  in sd_rw_multi()
559 		data->error = host->sg_count;  in sd_rw_multi()
561 			__func__, host->sg_count);  in sd_rw_multi()
562 		return data->error;  in sd_rw_multi()
565 	if (data->flags & MMC_DATA_READ) {  in sd_rw_multi()
566 		if (host->initial_mode)  in sd_rw_multi()
571 		if (host->initial_mode)  in sd_rw_multi()
583 	struct mmc_command *cmd = mrq->cmd;  in sd_normal_rw()
584 	struct mmc_data *data = mrq->data;  in sd_normal_rw()
587 	buf = kzalloc(data->blksz, GFP_NOIO);  in sd_normal_rw()
589 		cmd->error = -ENOMEM;  in sd_normal_rw()
593 	if (data->flags & MMC_DATA_READ) {  in sd_normal_rw()
594 		if (host->initial_mode)  in sd_normal_rw()
597 		cmd->error = sd_read_data(host, cmd, (u16)data->blksz, buf,  in sd_normal_rw()
598 				data->blksz, 200);  in sd_normal_rw()
600 		if (host->initial_mode)  in sd_normal_rw()
603 		sg_copy_from_buffer(data->sg, data->sg_len, buf, data->blksz);  in sd_normal_rw()
605 		sg_copy_to_buffer(data->sg, data->sg_len, buf, data->blksz);  in sd_normal_rw()
607 		cmd->error = sd_write_data(host, cmd, (u16)data->blksz, buf,  in sd_normal_rw()
608 				data->blksz, 200);  in sd_normal_rw()
615 		u8 sample_point, bool rx)  in sd_change_phase()  argument
617 	struct rtsx_pcr *pcr = host->pcr;  in sd_change_phase()
620 			__func__, rx ? "RX" : "TX", sample_point);  in sd_change_phase()
623 	if (rx) {  in sd_change_phase()
691 		rtsx_pci_read_register(host->pcr, SD_DATA_STATE, &val);  in sd_wait_data_idle()
704 	struct rtsx_pcr *pcr = host->pcr;  in sd_tuning_rx_cmd()
761 		dev_dbg(sdmmc_dev(host), "RX raw_phase_map[%d] = 0x%08x\n",  in sd_tuning_rx()
765 	dev_dbg(sdmmc_dev(host), "RX phase_map = 0x%08x\n", phase_map);  in sd_tuning_rx()
770 			return -EINVAL;  in sd_tuning_rx()
776 		return -EINVAL;  in sd_tuning_rx()
785 	return (cmd->opcode == SD_IO_RW_EXTENDED) && (data->blksz == 512);  in sdio_extblock_cmd()
790 	return mmc_op_multi(cmd->opcode) ||  in sd_rw_cmd()
791 		(cmd->opcode == MMC_READ_SINGLE_BLOCK) ||  in sd_rw_cmd()
792 		(cmd->opcode == MMC_WRITE_BLOCK);  in sd_rw_cmd()
799 	struct rtsx_pcr *pcr = host->pcr;  in sd_request()
801 	struct mmc_host *mmc = host->mmc;  in sd_request()
802 	struct mmc_request *mrq = host->mrq;  in sd_request()
803 	struct mmc_command *cmd = mrq->cmd;  in sd_request()
804 	struct mmc_data *data = mrq->data;  in sd_request()
809 	if (host->eject || !sd_get_cd_int(host)) {  in sd_request()
810 		cmd->error = -ENOMEDIUM;  in sd_request()
814 	err = rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD);  in sd_request()
816 		cmd->error = err;  in sd_request()
820 	mutex_lock(&pcr->pcr_mutex);  in sd_request()
824 	rtsx_pci_switch_clock(pcr, host->clock, host->ssc_depth,  in sd_request()
825 			host->initial_mode, host->double_clk, host->vpclk);  in sd_request()
830 	mutex_lock(&host->host_mutex);  in sd_request()
831 	host->mrq = mrq;  in sd_request()
832 	mutex_unlock(&host->host_mutex);  in sd_request()
834 	if (mrq->data)  in sd_request()
835 		data_size = data->blocks * data->blksz;  in sd_request()
840 		cmd->error = sd_rw_multi(host, mrq);  in sd_request()
841 		if (!host->using_cookie)  in sd_request()
842 			sdmmc_post_req(host->mmc, host->mrq, 0);  in sd_request()
844 		if (mmc_op_multi(cmd->opcode) && mrq->stop)  in sd_request()
845 			sd_send_cmd_get_rsp(host, mrq->stop);  in sd_request()
850 	if (mrq->data) {  in sd_request()
851 		if (cmd->error || data->error)  in sd_request()
852 			data->bytes_xfered = 0;  in sd_request()
854 			data->bytes_xfered = data->blocks * data->blksz;  in sd_request()
857 	mutex_unlock(&pcr->pcr_mutex);  in sd_request()
860 	if (cmd->error) {  in sd_request()
862 			cmd->opcode, cmd->arg, cmd->error);  in sd_request()
865 	mutex_lock(&host->host_mutex);  in sd_request()
866 	host->mrq = NULL;  in sd_request()
867 	mutex_unlock(&host->host_mutex);  in sd_request()
875 	struct mmc_data *data = mrq->data;  in sdmmc_request()
877 	mutex_lock(&host->host_mutex);  in sdmmc_request()
878 	host->mrq = mrq;  in sdmmc_request()
879 	mutex_unlock(&host->host_mutex);  in sdmmc_request()
881 	if (sd_rw_cmd(mrq->cmd) || sdio_extblock_cmd(mrq->cmd, data))  in sdmmc_request()
882 		host->using_cookie = sd_pre_dma_transfer(host, data, false);  in sdmmc_request()
884 	schedule_work(&host->work);  in sdmmc_request()
898 		err = rtsx_pci_write_register(host->pcr, SD_CFG1,  in sd_set_bus_width()
906 	struct rtsx_pcr *pcr = host->pcr;  in sd_power_on()
907 	struct mmc_host *mmc = host->mmc;  in sd_power_on()
912 	if (host->prev_power_state == MMC_POWER_ON)  in sd_power_on()
915 	if (host->prev_power_state == MMC_POWER_UP) {  in sd_power_on()
959 		if (pcr->extra_caps & EXTRA_CAPS_SD_EXPRESS)  in sd_power_on()
960 			mmc->caps2 |= MMC_CAP2_SD_EXP | MMC_CAP2_SD_EXP_1_2V;  in sd_power_on()
964 		 * in read-only mode.  in sd_power_on()
968 			pcr->extra_caps &= ~EXTRA_CAPS_SD_EXPRESS;  in sd_power_on()
969 			mmc->caps2 &= ~(MMC_CAP2_SD_EXP | MMC_CAP2_SD_EXP_1_2V);  in sd_power_on()
974 	host->prev_power_state = power_mode;  in sd_power_on()
980 	struct rtsx_pcr *pcr = host->pcr;  in sd_power_off()
983 	host->prev_power_state = MMC_POWER_OFF;  in sd_power_off()
1016 	struct rtsx_pcr *pcr = host->pcr;  in sd_set_timing()
1089 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_set_ios()
1091 	if (host->eject)  in sdmmc_set_ios()
1094 	if (rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD))  in sdmmc_set_ios()
1097 	mutex_lock(&pcr->pcr_mutex);  in sdmmc_set_ios()
1101 	sd_set_bus_width(host, ios->bus_width);  in sdmmc_set_ios()
1102 	sd_set_power_mode(host, ios->power_mode);  in sdmmc_set_ios()
1103 	sd_set_timing(host, ios->timing);  in sdmmc_set_ios()
1105 	host->vpclk = false;  in sdmmc_set_ios()
1106 	host->double_clk = true;  in sdmmc_set_ios()
1108 	switch (ios->timing) {  in sdmmc_set_ios()
1111 		host->ssc_depth = RTSX_SSC_DEPTH_2M;  in sdmmc_set_ios()
1112 		host->vpclk = true;  in sdmmc_set_ios()
1113 		host->double_clk = false;  in sdmmc_set_ios()
1118 		host->ssc_depth = RTSX_SSC_DEPTH_1M;  in sdmmc_set_ios()
1121 		host->ssc_depth = RTSX_SSC_DEPTH_500K;  in sdmmc_set_ios()
1125 	host->initial_mode = (ios->clock <= 1000000) ? true : false;  in sdmmc_set_ios()
1127 	host->clock = ios->clock;  in sdmmc_set_ios()
1128 	rtsx_pci_switch_clock(pcr, ios->clock, host->ssc_depth,  in sdmmc_set_ios()
1129 			host->initial_mode, host->double_clk, host->vpclk);  in sdmmc_set_ios()
1131 	mutex_unlock(&pcr->pcr_mutex);  in sdmmc_set_ios()
1137 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_get_ro()
1141 	if (host->eject)  in sdmmc_get_ro()
1142 		return -ENOMEDIUM;  in sdmmc_get_ro()
1144 	mutex_lock(&pcr->pcr_mutex);  in sdmmc_get_ro()
1148 	/* Check SD mechanical write-protect switch */  in sdmmc_get_ro()
1154 	mutex_unlock(&pcr->pcr_mutex);  in sdmmc_get_ro()
1162 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_get_cd()
1166 	if (host->eject)  in sdmmc_get_cd()
1169 	mutex_lock(&pcr->pcr_mutex);  in sdmmc_get_cd()
1179 	mutex_unlock(&pcr->pcr_mutex);  in sdmmc_get_cd()
1186 	struct rtsx_pcr *pcr = host->pcr;  in sd_wait_voltage_stable_1()
1206 		return -EINVAL;  in sd_wait_voltage_stable_1()
1219 	struct rtsx_pcr *pcr = host->pcr;  in sd_wait_voltage_stable_2()
1251 		return -EINVAL;  in sd_wait_voltage_stable_2()
1260 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_switch_voltage()
1265 			__func__, ios->signal_voltage);  in sdmmc_switch_voltage()
1267 	if (host->eject)  in sdmmc_switch_voltage()
1268 		return -ENOMEDIUM;  in sdmmc_switch_voltage()
1270 	err = rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD);  in sdmmc_switch_voltage()
1274 	mutex_lock(&pcr->pcr_mutex);  in sdmmc_switch_voltage()
1278 	if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330)  in sdmmc_switch_voltage()
1304 	mutex_unlock(&pcr->pcr_mutex);  in sdmmc_switch_voltage()
1312 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_execute_tuning()
1315 	if (host->eject)  in sdmmc_execute_tuning()
1316 		return -ENOMEDIUM;  in sdmmc_execute_tuning()
1318 	err = rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD);  in sdmmc_execute_tuning()
1322 	mutex_lock(&pcr->pcr_mutex);  in sdmmc_execute_tuning()
1327 	switch (mmc->ios.timing) {  in sdmmc_execute_tuning()
1347 	/* Tuning RX phase */  in sdmmc_execute_tuning()
1348 	if ((mmc->ios.timing == MMC_TIMING_UHS_SDR104) ||  in sdmmc_execute_tuning()
1349 			(mmc->ios.timing == MMC_TIMING_UHS_SDR50))  in sdmmc_execute_tuning()
1351 	else if (mmc->ios.timing == MMC_TIMING_UHS_DDR50)  in sdmmc_execute_tuning()
1355 	mutex_unlock(&pcr->pcr_mutex);  in sdmmc_execute_tuning()
1364 	struct rtsx_pcr *pcr = host->pcr;  in sdmmc_init_sd_express()
1367 		pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL2,  in sdmmc_init_sd_express()
1369 		pci_write_config_byte(pcr->pci, 0x80e, 0x02);  in sdmmc_init_sd_express()
1370 		pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL2,  in sdmmc_init_sd_express()
1384 		pcr->option.sd_800mA_ocp_thd);  in sdmmc_init_sd_express()
1386 	if (pcr->ops->disable_auto_blink)  in sdmmc_init_sd_express()
1387 		pcr->ops->disable_auto_blink(pcr);  in sdmmc_init_sd_express()
1396 	pcr->hw_param.interrupt_en &= ~(SD_INT_EN);  in sdmmc_init_sd_express()
1397 	rtsx_pci_writel(pcr, RTSX_BIER, pcr->hw_param.interrupt_en);  in sdmmc_init_sd_express()
1409 	host->eject = true;  in sdmmc_init_sd_express()
1427 	struct mmc_host *mmc = host->mmc;  in init_extra_caps()
1428 	struct rtsx_pcr *pcr = host->pcr;  in init_extra_caps()
1430 	dev_dbg(sdmmc_dev(host), "pcr->extra_caps = 0x%x\n", pcr->extra_caps);  in init_extra_caps()
1432 	if (pcr->extra_caps & EXTRA_CAPS_SD_SDR50)  in init_extra_caps()
1433 		mmc->caps |= MMC_CAP_UHS_SDR50;  in init_extra_caps()
1434 	if (pcr->extra_caps & EXTRA_CAPS_SD_SDR104)  in init_extra_caps()
1435 		mmc->caps |= MMC_CAP_UHS_SDR104;  in init_extra_caps()
1436 	if (pcr->extra_caps & EXTRA_CAPS_SD_DDR50)  in init_extra_caps()
1437 		mmc->caps |= MMC_CAP_UHS_DDR50;  in init_extra_caps()
1438 	if (pcr->extra_caps & EXTRA_CAPS_MMC_HSDDR)  in init_extra_caps()
1439 		mmc->caps |= MMC_CAP_1_8V_DDR;  in init_extra_caps()
1440 	if (pcr->extra_caps & EXTRA_CAPS_MMC_8BIT)  in init_extra_caps()
1441 		mmc->caps |= MMC_CAP_8_BIT_DATA;  in init_extra_caps()
1442 	if (pcr->extra_caps & EXTRA_CAPS_NO_MMC)  in init_extra_caps()
1443 		mmc->caps2 |= MMC_CAP2_NO_MMC;  in init_extra_caps()
1444 	if (pcr->extra_caps & EXTRA_CAPS_SD_EXPRESS)  in init_extra_caps()
1445 		mmc->caps2 |= MMC_CAP2_SD_EXP | MMC_CAP2_SD_EXP_1_2V;  in init_extra_caps()
1450 	struct mmc_host *mmc = host->mmc;  in realtek_init_host()
1451 	struct rtsx_pcr *pcr = host->pcr;  in realtek_init_host()
1453 	mmc->f_min = 250000;  in realtek_init_host()
1454 	mmc->f_max = 208000000;  in realtek_init_host()
1455 	mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;  in realtek_init_host()
1456 	mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED |  in realtek_init_host()
1459 	if (pcr->rtd3_en)  in realtek_init_host()
1460 		mmc->caps = mmc->caps | MMC_CAP_AGGRESSIVE_PM;  in realtek_init_host()
1461 	mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE |  in realtek_init_host()
1463 	mmc->max_current_330 = 400;  in realtek_init_host()
1464 	mmc->max_current_180 = 800;  in realtek_init_host()
1465 	mmc->ops = &realtek_pci_sdmmc_ops;  in realtek_init_host()
1469 	mmc->max_segs = 256;  in realtek_init_host()
1470 	mmc->max_seg_size = 65536;  in realtek_init_host()
1471 	mmc->max_blk_size = 512;  in realtek_init_host()
1472 	mmc->max_blk_count = 65535;  in realtek_init_host()
1473 	mmc->max_req_size = 524288;  in realtek_init_host()
1480 	host->cookie = -1;  in rtsx_pci_sdmmc_card_event()
1481 	mmc_detect_change(host->mmc, 0);  in rtsx_pci_sdmmc_card_event()
1489 	struct pcr_handle *handle = pdev->dev.platform_data;  in rtsx_pci_sdmmc_drv_probe()
1493 		return -ENXIO;  in rtsx_pci_sdmmc_drv_probe()
1495 	pcr = handle->pcr;  in rtsx_pci_sdmmc_drv_probe()
1497 		return -ENXIO;  in rtsx_pci_sdmmc_drv_probe()
1499 	dev_dbg(&(pdev->dev), ": Realtek PCI-E SDMMC controller found\n");  in rtsx_pci_sdmmc_drv_probe()
1501 	mmc = mmc_alloc_host(sizeof(*host), &pdev->dev);  in rtsx_pci_sdmmc_drv_probe()
1503 		return -ENOMEM;  in rtsx_pci_sdmmc_drv_probe()
1506 	host->pcr = pcr;  in rtsx_pci_sdmmc_drv_probe()
1507 	mmc->ios.power_delay_ms = 5;  in rtsx_pci_sdmmc_drv_probe()
1508 	host->mmc = mmc;  in rtsx_pci_sdmmc_drv_probe()
1509 	host->pdev = pdev;  in rtsx_pci_sdmmc_drv_probe()
1510 	host->cookie = -1;  in rtsx_pci_sdmmc_drv_probe()
1511 	host->prev_power_state = MMC_POWER_OFF;  in rtsx_pci_sdmmc_drv_probe()
1512 	INIT_WORK(&host->work, sd_request);  in rtsx_pci_sdmmc_drv_probe()
1514 	pcr->slots[RTSX_SD_CARD].p_dev = pdev;  in rtsx_pci_sdmmc_drv_probe()
1515 	pcr->slots[RTSX_SD_CARD].card_event = rtsx_pci_sdmmc_card_event;  in rtsx_pci_sdmmc_drv_probe()
1517 	mutex_init(&host->host_mutex);  in rtsx_pci_sdmmc_drv_probe()
1521 	pm_runtime_no_callbacks(&pdev->dev);  in rtsx_pci_sdmmc_drv_probe()
1522 	pm_runtime_set_active(&pdev->dev);  in rtsx_pci_sdmmc_drv_probe()
1523 	pm_runtime_enable(&pdev->dev);  in rtsx_pci_sdmmc_drv_probe()
1524 	pm_runtime_set_autosuspend_delay(&pdev->dev, 200);  in rtsx_pci_sdmmc_drv_probe()
1525 	pm_runtime_mark_last_busy(&pdev->dev);  in rtsx_pci_sdmmc_drv_probe()
1526 	pm_runtime_use_autosuspend(&pdev->dev);  in rtsx_pci_sdmmc_drv_probe()
1530 		pm_runtime_dont_use_autosuspend(&pdev->dev);  in rtsx_pci_sdmmc_drv_probe()
1531 		pm_runtime_disable(&pdev->dev);  in rtsx_pci_sdmmc_drv_probe()
1545 	pcr = host->pcr;  in rtsx_pci_sdmmc_drv_remove()
1546 	pcr->slots[RTSX_SD_CARD].p_dev = NULL;  in rtsx_pci_sdmmc_drv_remove()
1547 	pcr->slots[RTSX_SD_CARD].card_event = NULL;  in rtsx_pci_sdmmc_drv_remove()
1548 	mmc = host->mmc;  in rtsx_pci_sdmmc_drv_remove()
1550 	cancel_work_sync(&host->work);  in rtsx_pci_sdmmc_drv_remove()
1552 	mutex_lock(&host->host_mutex);  in rtsx_pci_sdmmc_drv_remove()
1553 	if (host->mrq) {  in rtsx_pci_sdmmc_drv_remove()
1554 		dev_dbg(&(pdev->dev),  in rtsx_pci_sdmmc_drv_remove()
1560 		host->mrq->cmd->error = -ENOMEDIUM;  in rtsx_pci_sdmmc_drv_remove()
1561 		if (host->mrq->stop)  in rtsx_pci_sdmmc_drv_remove()
1562 			host->mrq->stop->error = -ENOMEDIUM;  in rtsx_pci_sdmmc_drv_remove()
1563 		mmc_request_done(mmc, host->mrq);  in rtsx_pci_sdmmc_drv_remove()
1565 	mutex_unlock(&host->host_mutex);  in rtsx_pci_sdmmc_drv_remove()
1568 	host->eject = true;  in rtsx_pci_sdmmc_drv_remove()
1570 	flush_work(&host->work);  in rtsx_pci_sdmmc_drv_remove()
1572 	pm_runtime_dont_use_autosuspend(&pdev->dev);  in rtsx_pci_sdmmc_drv_remove()
1573 	pm_runtime_disable(&pdev->dev);  in rtsx_pci_sdmmc_drv_remove()
1577 	dev_dbg(&(pdev->dev),  in rtsx_pci_sdmmc_drv_remove()
1578 		": Realtek PCI-E SDMMC controller has been removed\n");  in rtsx_pci_sdmmc_drv_remove()
1603 MODULE_DESCRIPTION("Realtek PCI-E SD/MMC Card Host Driver");