Lines Matching +full:idma +full:- +full:addr

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
17 #include <linux/fault-inject.h>
60 * struct dw_mci - MMC controller state shared between all slots
78 * @dma_64bit_address: Whether DMA supports 64-bit address mode or not.
81 * @dma_ops: Pointer to platform-specific DMA callbacks.
83 * @ring_size: Buffer size for idma descriptors.
85 * @dms: structure of slave-dma private data.
135 * @lock is a softirq-safe spinlock protecting @queue as well as
142 * @irq_lock is an irq-safe spinlock protecting the INTMASK register
144 * enough to read-modify-write INTMASK and no other locks are grabbed when
152 * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
284 /* Force 32-bit access to the FIFO */
334 * Registers to support idmac 64-bit address mode
371 /* time-out register defines */
376 /* card-type register defines */
455 /* UHS-1 register defines */
466 /* FIFO register access macros. These should not change the data endian-ness
478 * Some dw_mmc devices have 64-bit FIFOs, but expect them to be
479 * accessed using two 32-bit accesses. If such controller is used
480 * with a 64-bit kernel, this has to be done explicitly.
482 static inline u64 mci_fifo_l_readq(void __iomem *addr) in mci_fifo_l_readq() argument
487 proxy[0] = mci_fifo_readl(addr); in mci_fifo_l_readq()
488 proxy[1] = mci_fifo_readl(addr + 4); in mci_fifo_l_readq()
493 static inline void mci_fifo_l_writeq(void __iomem *addr, u64 value) in mci_fifo_l_writeq() argument
498 mci_fifo_writel(addr, proxy[0]); in mci_fifo_l_writeq()
499 mci_fifo_writel(addr + 4, proxy[1]); in mci_fifo_l_writeq()
504 readl_relaxed((dev)->regs + SDMMC_##reg)
506 writel_relaxed((value), (dev)->regs + SDMMC_##reg)
508 /* 16-bit FIFO access macros */
510 readw_relaxed((dev)->regs + SDMMC_##reg)
512 writew_relaxed((value), (dev)->regs + SDMMC_##reg)
514 /* 64-bit FIFO access macros */
517 readq_relaxed((dev)->regs + SDMMC_##reg)
519 writeq_relaxed((value), (dev)->regs + SDMMC_##reg)
530 (*(volatile u64 __force *)((dev)->regs + SDMMC_##reg))
532 (*(volatile u64 __force *)((dev)->regs + SDMMC_##reg) = (value))
547 * struct dw_mci_slot - MMC slot state
555 * @clock: Clock rate configured by set_ios(). Protected by host->lock.
585 * dw_mci driver data - dw-mshc implementation specific driver data.