21 #define PHUB_STATUS 0x00		/* Status Register offset */
22 #define PHUB_CONTROL 0x04		/* Control Register offset */
23 #define PHUB_TIMEOUT 0x05		/* Time out value for Status Register */
24 #define PCH_PHUB_ROM_WRITE_ENABLE 0x01	/* Enabling for writing ROM */
25 #define PCH_PHUB_ROM_WRITE_DISABLE 0x00	/* Disabling for writing ROM */
26 #define PCH_PHUB_MAC_START_ADDR_EG20T 0x14  /* MAC data area start address
28 #define PCH_PHUB_MAC_START_ADDR_ML7223 0x20C  /* MAC data area start address
30 #define PCH_PHUB_ROM_START_ADDR_EG20T 0x80 /* ROM data area start address offset
32 #define PCH_PHUB_ROM_START_ADDR_ML7213 0x400 /* ROM data area start address
35 #define PCH_PHUB_ROM_START_ADDR_ML7223 0x400 /* ROM data area start address
41 #define PCI_DEVICE_ID_PCH1_PHUB 0x8801
43 #define CLKCFG_CAN_50MHZ 0x12000000
44 #define CLKCFG_CANCLK_MASK 0xFF000000
45 #define CLKCFG_UART_MASK			0xFFFFFF
55 #define PCI_DEVICE_ID_ROHM_ML7213_PHUB		0x801A
58 #define PCI_DEVICE_ID_ROHM_ML7223_mPHUB	0x8012 /* for Bus-m */
59 #define PCI_DEVICE_ID_ROHM_ML7223_nPHUB	0x8002 /* for Bus-n */
62 #define PCI_DEVICE_ID_ROHM_ML7831_PHUB 0x8801
68 #define PCH_PHUB_ID_REG				0x0000
69 #define PCH_PHUB_QUEUE_PRI_VAL_REG		0x0004
70 #define PCH_PHUB_RC_QUEUE_MAXSIZE_REG		0x0008
71 #define PCH_PHUB_BRI_QUEUE_MAXSIZE_REG		0x000C
72 #define PCH_PHUB_COMP_RESP_TIMEOUT_REG		0x0010
73 #define PCH_PHUB_BUS_SLAVE_CONTROL_REG		0x0014
74 #define PCH_PHUB_DEADLOCK_AVOID_TYPE_REG	0x0018
75 #define PCH_PHUB_INTPIN_REG_WPERMIT_REG0	0x0020
76 #define PCH_PHUB_INTPIN_REG_WPERMIT_REG1	0x0024
77 #define PCH_PHUB_INTPIN_REG_WPERMIT_REG2	0x0028
78 #define PCH_PHUB_INTPIN_REG_WPERMIT_REG3	0x002C
79 #define PCH_PHUB_INT_REDUCE_CONTROL_REG_BASE	0x0040
80 #define CLKCFG_REG_OFFSET			0x500
81 #define FUNCSEL_REG_OFFSET			0x508
94  * @intpin_reg_wpermit_reg0:		INTPIN_REG_WPERMIT register 0 val
132 static const int pch_phub_mac_offset[ETH_ALEN] = {0x3, 0x2, 0x1, 0x0, 0xb, 0xa};
200 	for (i = 0; i < MAX_NUM_INT_REDUCE_CONTROL_REG; i++) {  in pch_phub_save_reg_conf()
261 	for (i = 0; i < MAX_NUM_INT_REDUCE_CONTROL_REG; i++) {  in pch_phub_restore_reg_conf()
305 	mask = ~(0xFF << pos);  in pch_phub_write_serial_rom()
313 	i = 0;  in pch_phub_write_serial_rom()
315 						PHUB_STATUS) != 0x00) {  in pch_phub_write_serial_rom()
325 	return 0;  in pch_phub_write_serial_rom()
372 	retval = pch_phub_write_serial_rom(chip, 0x0b, 0xbc);  in pch_phub_gbe_serial_rom_conf()
373 	retval |= pch_phub_write_serial_rom(chip, 0x0a, 0x10);  in pch_phub_gbe_serial_rom_conf()
374 	retval |= pch_phub_write_serial_rom(chip, 0x09, 0x01);  in pch_phub_gbe_serial_rom_conf()
375 	retval |= pch_phub_write_serial_rom(chip, 0x08, 0x02);  in pch_phub_gbe_serial_rom_conf()
377 	retval |= pch_phub_write_serial_rom(chip, 0x0f, 0x00);  in pch_phub_gbe_serial_rom_conf()
378 	retval |= pch_phub_write_serial_rom(chip, 0x0e, 0x00);  in pch_phub_gbe_serial_rom_conf()
379 	retval |= pch_phub_write_serial_rom(chip, 0x0d, 0x00);  in pch_phub_gbe_serial_rom_conf()
380 	retval |= pch_phub_write_serial_rom(chip, 0x0c, 0x80);  in pch_phub_gbe_serial_rom_conf()
382 	retval |= pch_phub_write_serial_rom(chip, 0x13, 0xbc);  in pch_phub_gbe_serial_rom_conf()
383 	retval |= pch_phub_write_serial_rom(chip, 0x12, 0x10);  in pch_phub_gbe_serial_rom_conf()
384 	retval |= pch_phub_write_serial_rom(chip, 0x11, 0x01);  in pch_phub_gbe_serial_rom_conf()
385 	retval |= pch_phub_write_serial_rom(chip, 0x10, 0x18);  in pch_phub_gbe_serial_rom_conf()
387 	retval |= pch_phub_write_serial_rom(chip, 0x1b, 0xbc);  in pch_phub_gbe_serial_rom_conf()
388 	retval |= pch_phub_write_serial_rom(chip, 0x1a, 0x10);  in pch_phub_gbe_serial_rom_conf()
389 	retval |= pch_phub_write_serial_rom(chip, 0x19, 0x01);  in pch_phub_gbe_serial_rom_conf()
390 	retval |= pch_phub_write_serial_rom(chip, 0x18, 0x19);  in pch_phub_gbe_serial_rom_conf()
392 	retval |= pch_phub_write_serial_rom(chip, 0x23, 0xbc);  in pch_phub_gbe_serial_rom_conf()
393 	retval |= pch_phub_write_serial_rom(chip, 0x22, 0x10);  in pch_phub_gbe_serial_rom_conf()
394 	retval |= pch_phub_write_serial_rom(chip, 0x21, 0x01);  in pch_phub_gbe_serial_rom_conf()
395 	retval |= pch_phub_write_serial_rom(chip, 0x20, 0x3a);  in pch_phub_gbe_serial_rom_conf()
397 	retval |= pch_phub_write_serial_rom(chip, 0x27, 0x01);  in pch_phub_gbe_serial_rom_conf()
398 	retval |= pch_phub_write_serial_rom(chip, 0x26, 0x00);  in pch_phub_gbe_serial_rom_conf()
399 	retval |= pch_phub_write_serial_rom(chip, 0x25, 0x00);  in pch_phub_gbe_serial_rom_conf()
400 	retval |= pch_phub_write_serial_rom(chip, 0x24, 0x00);  in pch_phub_gbe_serial_rom_conf()
413 	offset_addr = 0x200;  in pch_phub_gbe_serial_rom_conf_mp()
414 	retval = pch_phub_write_serial_rom(chip, 0x03 + offset_addr, 0xbc);  in pch_phub_gbe_serial_rom_conf_mp()
415 	retval |= pch_phub_write_serial_rom(chip, 0x02 + offset_addr, 0x00);  in pch_phub_gbe_serial_rom_conf_mp()
416 	retval |= pch_phub_write_serial_rom(chip, 0x01 + offset_addr, 0x40);  in pch_phub_gbe_serial_rom_conf_mp()
417 	retval |= pch_phub_write_serial_rom(chip, 0x00 + offset_addr, 0x02);  in pch_phub_gbe_serial_rom_conf_mp()
419 	retval |= pch_phub_write_serial_rom(chip, 0x07 + offset_addr, 0x00);  in pch_phub_gbe_serial_rom_conf_mp()
420 	retval |= pch_phub_write_serial_rom(chip, 0x06 + offset_addr, 0x00);  in pch_phub_gbe_serial_rom_conf_mp()
421 	retval |= pch_phub_write_serial_rom(chip, 0x05 + offset_addr, 0x00);  in pch_phub_gbe_serial_rom_conf_mp()
422 	retval |= pch_phub_write_serial_rom(chip, 0x04 + offset_addr, 0x80);  in pch_phub_gbe_serial_rom_conf_mp()
424 	retval |= pch_phub_write_serial_rom(chip, 0x0b + offset_addr, 0xbc);  in pch_phub_gbe_serial_rom_conf_mp()
425 	retval |= pch_phub_write_serial_rom(chip, 0x0a + offset_addr, 0x00);  in pch_phub_gbe_serial_rom_conf_mp()
426 	retval |= pch_phub_write_serial_rom(chip, 0x09 + offset_addr, 0x40);  in pch_phub_gbe_serial_rom_conf_mp()
427 	retval |= pch_phub_write_serial_rom(chip, 0x08 + offset_addr, 0x18);  in pch_phub_gbe_serial_rom_conf_mp()
429 	retval |= pch_phub_write_serial_rom(chip, 0x13 + offset_addr, 0xbc);  in pch_phub_gbe_serial_rom_conf_mp()
430 	retval |= pch_phub_write_serial_rom(chip, 0x12 + offset_addr, 0x00);  in pch_phub_gbe_serial_rom_conf_mp()
431 	retval |= pch_phub_write_serial_rom(chip, 0x11 + offset_addr, 0x40);  in pch_phub_gbe_serial_rom_conf_mp()
432 	retval |= pch_phub_write_serial_rom(chip, 0x10 + offset_addr, 0x19);  in pch_phub_gbe_serial_rom_conf_mp()
434 	retval |= pch_phub_write_serial_rom(chip, 0x1b + offset_addr, 0xbc);  in pch_phub_gbe_serial_rom_conf_mp()
435 	retval |= pch_phub_write_serial_rom(chip, 0x1a + offset_addr, 0x00);  in pch_phub_gbe_serial_rom_conf_mp()
436 	retval |= pch_phub_write_serial_rom(chip, 0x19 + offset_addr, 0x40);  in pch_phub_gbe_serial_rom_conf_mp()
437 	retval |= pch_phub_write_serial_rom(chip, 0x18 + offset_addr, 0x3a);  in pch_phub_gbe_serial_rom_conf_mp()
439 	retval |= pch_phub_write_serial_rom(chip, 0x1f + offset_addr, 0x01);  in pch_phub_gbe_serial_rom_conf_mp()
440 	retval |= pch_phub_write_serial_rom(chip, 0x1e + offset_addr, 0x00);  in pch_phub_gbe_serial_rom_conf_mp()
441 	retval |= pch_phub_write_serial_rom(chip, 0x1d + offset_addr, 0x00);  in pch_phub_gbe_serial_rom_conf_mp()
442 	retval |= pch_phub_write_serial_rom(chip, 0x1c + offset_addr, 0x00);  in pch_phub_gbe_serial_rom_conf_mp()
455 	for (i = 0; i < ETH_ALEN; i++)  in pch_phub_read_gbe_mac_addr()
476 	for (i = 0; i < ETH_ALEN; i++) {  in pch_phub_write_gbe_mac_addr()
515 	rom_signature &= 0xff;  in pch_phub_bin_read()
518 	rom_signature |= (tmp & 0xff) << 8;  in pch_phub_bin_read()
519 	if (rom_signature == 0xAA55) {  in pch_phub_bin_read()
525 			addr_offset = 0;  in pch_phub_bin_read()
529 			addr_offset = 0;  in pch_phub_bin_read()
533 		for (addr_offset = 0; addr_offset < count; addr_offset++) {  in pch_phub_bin_read()
570 		addr_offset = 0;  in pch_phub_bin_write()
574 		addr_offset = 0;  in pch_phub_bin_write()
584 	for (addr_offset = 0; addr_offset < count; addr_offset++) {  in pch_phub_bin_write()
690 	chip->pch_phub_base_address = pci_iomap(pdev, 1, 0);  in pch_phub_probe()
706 		unsigned int prefetch = 0x000affaa;  in pch_phub_probe()
737 		iowrite32(prefetch, chip->pch_phub_base_address + 0x14);  in pch_phub_probe()
739 		iowrite32(0x25, chip->pch_phub_base_address + 0x44);  in pch_phub_probe()
758 		 * Device4(SDIO #0,1,2):f  in pch_phub_probe()
760 		 * Device8(USB OHCI #0/ USB EHCI #0):a  in pch_phub_probe()
762 		iowrite32(0x000affa0, chip->pch_phub_base_address + 0x14);  in pch_phub_probe()
769 		iowrite32(0x000a0000, chip->pch_phub_base_address + 0x14);  in pch_phub_probe()
771 		iowrite32(0x25, chip->pch_phub_base_address + 0x140);  in pch_phub_probe()
784 		 * Device2(USB OHCI #0,1,2,3/ USB EHCI #0):a  in pch_phub_probe()
785 		 * Device4(SDIO #0,1):f  in pch_phub_probe()
788 		iowrite32(0x0000ffa0, chip->pch_phub_base_address + 0x14);  in pch_phub_probe()
803 		iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14);  in pch_phub_probe()
805 		iowrite32(0x25, chip->pch_phub_base_address + 0x44);  in pch_phub_probe()
813 	return 0;  in pch_phub_probe()
845 	return 0;  in pch_phub_suspend()
852 	return 0;  in pch_phub_resume()